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1 NN30295A ver. beb vin = 4.5 v to 5.6 v, 6 a synchronous dc-dc step down regulator comprising of controller ic and power mosfet with i 2 c interface z high-speed response dc-dc step down regulator circuit that employs hy steretic control system z two 25 m ? (typ.) mosfets for high efficiency at 6 a z mode selection option via i 2 c: (1) pulse skip mode (psm) with coast mode function for high light load efficiency (2) forced continuous co nduction mode (fccm) for quick load transient response z up to 6 a output current z input voltagerange : avin : 4.5 v to 5.6 v, pvin : 3.1 v to 5.6 v, vdd : 1.7 v to 3.6 v output voltage range : 0.6 v to 3.5 v selectable switching frequency 500 khz to 2 mhz ( 7 steps ) using i 2 c : default 1mhz z adjustable soft start z low operating and standby quiescent current z open drain power good indication for output over , under voltage z built-in under voltage lockout (uvlo), thermal shut down (tsd), over voltage detection (ovd), under voltage detection (uvd), over current protection (ocp), short circuit protection (scp) z hqfn024-a3-0404a ( size : 4 mm x 4 mm, 0.5 mm pitch ), 24pin plastic quad flat non-leaded package heat slug down (qfn type) high current distributed power systems such as ? hdds (hard disk drives) ? ssds (solid state drives) ? pcs ? game consoles ? servers ? security cameras ? network tvs ? home appliances ? oa equipment etc. simplified application applications features description NN30295A is a synchronous dc-dc step down regulator (1-ch) comprising of a controller ic and two power mosfets and employs the hysteretic control system. by this system, when load current changes suddenly, it responds at high speed and minimizes the changes of output voltage. since it is possible to use capacitors with small capacitance and it is unnecessary to add external parts for system phase compensation, this ic realizes downsizing of set and reducing in the number of external parts. output voltage is adjustable by user. maximum current is 6 a. notes) this application circuit is an example. the operation of mass production set is not guaranteed. you should perform enough evaluation and verification on the design of mass production set. you are fully responsible for the incorporation of the above application circuit and information in the design of your equipment. vfb en scl pgood bst lx pgnd agnd ss avin pvin vreg avin NN30295A pvin sda vdd vdd vout dcdcout 1.0 v 1.0 h 22 f 100k ? 22 f x 2 0.1 f 1.5k ? 1k ? 10nf 0.1 f 22 f 0.1 f 1 f condition ) v in = 5.0 v, vout = 1.2 v , 1.8 v , 3.3 v, lo = 1 h, co = 44 f (22 f x 2), frequency = 500 khz nn30195a efficiency 500kh 0 10 20 30 40 50 60 70 80 90 100 0.001 0.01 0.1 1 10 load current[a] efficiency[%] fccm_vout=1.2v fccm_vout=1.8v fccm_vout=3.3v skip_vout=1.2v skip_vout=1.8v skip_vout=3.3v NN30295A efficiency 500khz efficiency curve publication date: october 2012
2 NN30295A ver. beb absolute maximum ratings *1, *3 v -0.3 to ( v in + 0.3 ) lx,pgood output voltage range *1, *3 v -0.3 to ( vdd + 0.3 ) scl,sda *1, *3 v -0.3 to ( v in + 0.3 ) en,vfb,vout input voltage range *1 v 3.6 vdd ? kv 2 hbm (human body model) esd *2 c ? 40 to + 150 t j operating junction temperature *2 c ? 55 to + 150 t stg storage temperature notes unit rating symbol parameter *2 c ? 40 to + 85 t opr operating free-air temperature *1 v 6.0 v in supply voltage notes) do not apply external currents and voltages to any pin not specifically mentioned. this product may sustain permanent damage if subjected to conditions higher than the above stated absolute maximum rating. this rating is the maximum rating and device operating at this range is not guaranteeable as it is higher than our stated recommended operating range. when subjected under the absolute maximum rating for a long time, the reliability of the product may be affected. *1:the values under the condition not exceeding the above absolute maximum ratings and the power dissipation. v in is voltage for avin, pvin. vdd is voltage for vdd. *2:except for the power dissipation, operating ambient temperature, and storage temperature, all ratings are for ta = 25 c. *3:( v in + 0.3 ) v must not exceed 6 v. (vdd + 0.3) v must not be exceeded 3.6 v. 1.06 w pd ( ta = 85 c) *1 notes 2.03 w 61.6 c / w 24 pin plastic quad flat non-leaded package heat slug down (qfn type) pd ( ta = 25 c) ja package power dissipation rating caution although this has limited built-in esd protection circuit, but permanent damage may occur on it. therefore, proper esd precautions are recommended to avoid electrostatic damage to the mos gates note). for the actual usage, please refer to the pd-ta characteristics diagram in the package specification, follow the power s upply voltage, load and ambient temperature conditions to ensure that there is enough margin and the thermal design does not exceed the allowable value. *1:glass epoxy substrate ( 4 layers ) [ glass-epoxy: 50 x 50 x 0.8 t ( mm ) ], die pad exposed , soldered.
3 NN30295A ver. beb ? recommended operating conditions ? v 3.3 1.85 1.7 vdd *1 v v in + 0.3 ? ?0.3 pgood v v in + 0.3 ? ?0.3 en *1 v v in + 0.3 ? ?0.3 lx output voltage range ? v 5.6 5.0 3.1 pvin *1 v vdd + 0.3 ? ?0.3 sda ? 5.0 typ. *1 input voltage range *1 v vdd + 0.3 ?0.3 scl 4.5 min. ? v 5.6 avin supply voltage range notes unit max. pin name parameter note) do not apply external currents and voltages to any pin not specifically mentioned. voltage values, unless otherwise specified, are with respect to gnd. gnd is voltage for agnd, pgnd. agnd = pgnd vin is voltage for avin, pvin. avin = pvin. the values under the condition not exceeding the above absolute maximum ratings and the power dissipation. *1 : ( v in + 0.3 ) v must not be exceeded 6 v. (vdd + 0.3) v must not be exceeded 3.6 v.
4 NN30295A ver. beb ? v 0.611 0.603 0.595 ? v fbts vfb comparator threshold internal reference characteristics pgood pin characteristics ? % 92 85 78 pgood : high to low v thpg1 pgood threshold 1 (vfb ratio for uvd detect) ? % 8 5 2 pgood : low to high v hyspg1 pgood hysteresis 1 (uvd hysteresis) ? % 122 115 108 pgood : high to low v thpg2 pgood threshold 2 (vfb ratio for ovd detect) ? % 8 5 2 pgood : low to high v hyspg2 pgood hysteresis 2 (ovd hysteresis) ? ? 15 10 ? en = 0 v rpg pgood on resistance under voltage lock out ? v 2.75 2.60 2.45 pv in = 5 v to 0 v v uvlodet1 pvin uvlo start voltage 1 ? mv 350 200 50 pv in = 0 v to 5 v v uvlohys1 pvin uvlo recover voltage 1 ? v 3.55 3.40 3.25 av in = 5 v to 0 v v uvlodet2 avin uvlo start voltage 2 ? mv 250 100 10 av in = 0 v to 5 v v uvlohys2 avin uvlo recover voltage 2 ? v v in + 0.3 ? 1.5 ? v en1h en pin high-level input voltage ? a 10.0 3.5 ? en = 5 v i leaken1 en pin leak current ? v 1.50 1.25 1.00 vdd = 3 v to 0 v v uvlodet3 vdd uvlo start voltage 2 ? mv 90 50 10 vdd = 0 v to 3 v v uvlohys3 vdd uvlo recover voltage 2 ? v 0.3 ? ?0.3 ? v en1l en pin low-level input voltage enable pin characteristics current consumption ? a 2 ? ? en = 0 v, i out = 0 a i vddstb consumption current at standby ? a 700 400 ? ctl1 = 5 v, i out = 0 a rfb1 = 1.0 k ? rfb2 = 1.5 k ? i vddact consumption current at active limits typ unit max note min condition symbol parameter elecrtrical characteristics co = 22 f x 2, lo= 1 h, vout setting = 1.0 v, v in = av in = pv in = 5 v, switching frequency = 1 mhz, mode = low (skip), t a = 25 c 2 c unless otherwise noted.
5 NN30295A ver. beb protection ? % 85 70 55 fb = 0.6 v to 0.0 v dd shpth dc-dc output gnd short protection threshold *1 % ? 70 ? i out = ? 10 ma dd eff1 dc-dc efficiency 1 dc-dc characteristics ? %/v 1.5 0.5 ? pvin = 4.5 v to 5.6 v i out = ? 1.5 a dd regin dc-dc line regulation *1 % ? 3 ? i out = ? 10 ma to ? 6 a dd regld dc-dc load regulation *1 a ? 9.0 ? ? dd ilmt dc-dc output current limit *1 % ? 81 ? i out = ? 4 a dd eff2 dc-dc efficiency 2 *1 mv [p-p] ? 25 ? i out = ? 10 ma dd vrpl1 dc-dc output ripple voltage 1 *1 mv [p-p] ? 10 ? i out = ? 4 a dd vrpl2 dc-dc output ripple voltage 2 *1 mv ? 20 ? i out = ? 100 ma ? ?4 a t = 0.5 a / s dd dvac dc-dc load transient response ? m ? 50 25 ? vgs = 5 v dd ronh dc-dc high side mos on resistance ? m ? 50 25 ? vgs = 5 v dd ronl dc-dc low side mos on resistance limits typ unit max note min condition symbol parameter elecrtrical characteristics ( continued ) co = 22 f x 2, lo= 1 h, vout setting = 1.0 v, v in = av in = pv in = 5 v, switching frequency = 1 mhz, mode = low (skip), t a = 25 c 2 c unless otherwise noted. *1 : typical value checked by design.
6 NN30295A ver. beb *1 v ? 2 ? dv = pvin ? vout dv min input and out put voltage difference dc-dc soft-start timing ? a 1 ? ?1 vfb = 0 v ileakfb1 vfb pin leak current 1 ? a 1 ? ?1 vfb = 3.6 v ileakfb2 vfb pin leak current 2 switching frequency adjustment *1 khz ? 500 ? i out = ? 6 a i2c setting: 10h:10h dd fsw1 dc-dc switching frequency 1 *1 khz ? 1000 ? i out = ? 6 a i2c setting: 10h:30h dd fsw2 dc-dc switching frequency 2 *1 khz ? 2000 ? i out = ? 6 a i2c setting: 10h:70h dd fsw3 dc-dc switching frequency 3 soft-start timing ? a ? ?2 ?4 v ss = 0.3 v i sschg ss charge current ? k ? 4 2 ? en = 0 v, i out = 0 a r ssdis ss discharge resistance (shut-down) limits typ unit max note min condition symbol parameter elecrtrical characteristics ( continued ) co = 22 f x 2, lo= 1 h, vout setting = 1.0 v, v in = av in = pv in = 5 v, switching frequency = 1 mhz, mode = low (skip), t a = 25 c 2 c unless otherwise noted. *1 : typical value checked by design.
7 NN30295A ver. beb ? khz 400 ? 0 ? fosc scl clock frequency *2 v ? ? 0.05 vdd v io > 2 v, hysteresis 1 of sda, scl vhys1 hysteresis of schmitt trigger input 1 *2 v ? ? 0.1 vdd v io < 2 v, hysteresis 2 of sda, scl vhys2 hysteresis of schmitt trigger input 2 *2 ns 250 ? 20+ 0.1 c b bus capacitance : 10pf to 400pf i p 6 ma, (v olmax = 0.6 v) i p : max. sink current tof output fall time from v ihmin to v ilmax *2 ns 50 ? 0 ? tsp pulse width of spikes which must be suppressed by the input filter *2 pf 10 ? ? ? ci capacitance for each i/o pin ? a 10 ? ?10 sda, scl = 0.1 vdd max to 0.9 vdd max il input current each i/o pin ? v 0.2 vdd ? 0 vdd < 2 v sda (sink current=3 ma) vol2 low-level output voltage 2 *1 v vdd max +0.5 ? 0.7 vdd voltage which recognized that sda and scl are high-level vih1 high-level input voltage *1 v 0.3 vdd ? ?0.5 voltage which recognized that sda and scl are low-level vil1 low-level input voltage ? v 0.4 ? 0 vdd > 2 v sda (sink current=3 ma) vol1 low-level output voltage 1 i 2 c bus ( internal i/o st age characteristics ) reference values typ unit max note min condition symbol parameter application information reference values for design co = 22 f x 2, lo= 1 h, vout setting = 1.0 v, v in = av in = pv in = 5 v, switching frequency = 1 mhz, mode = low (skip), t a = 25 c 2 c unless otherwise noted. note) checked by design, not production tested. *1 : the input threshold voltage of i 2 c bus (vth) is linked to vdd. in case the pull-up voltage is not vdd, the threshold voltage (vth) is fixed to ((vdd / 2) (schmitt width) / 2 ) and high-level, low-level of input voltage are not specified. in this case, pay attention to low-level (max.) value (v ilmax ). it is recommended that the pull-up voltage of i 2 c bus is set to the i 2 c bus i/o stage supply voltage (vdd). *2 : the timing of fast-mode devices in i2c-bus is specified as the following. all values referred to vihmin and vilmax level.
8 NN30295A ver. beb *3 s ? ? 0.6 the first clock pulse is generated after t hd:sta . t hd:sta hold time (repeated) start condition *3 s ? ? 1.3 ? t low low period of the scl clock *3 s ? ? 0.6 ? t high high period of the scl clock *3 s ? ? 0.6 ? t su:sta set-up time for a repeat start condition *3 s 0.9 ? 0 ? t hd:dat data hold time *3 ns ? ? 100 ? t su:dat data set-up time *3 ns 300 ? 20+ 0.1 c b ? t r rise time of both sda and scl signals *3 ns 300 ? 20+ 0.1 c b ? t f fall time of both sda and scl signals *3 pf 400 ? ? ? c b capacitive load for each bus line i 2 c bus (internal i/o stage characteristics) *3 s ? ? 0.6 ? t su:sto set-up time of stop condition *3 s ? ? 1.3 ? t buf bus free time between stop and start condition *3 v ? ? 0.1 vdd ? v nl noise margin at the low-level for each connected device *3 v ? ? 0.2 vdd ? v nh noise margin at the high-level for each connected device reference values typ unit max note min condition symbol parameter note) checked by design, not production tested. *3 : the timing of fast-mode devices in i 2 c-bus is specified as the following. all values referred to v ihmin and v ilmax level. s : start condition sr : repeat start condition p : stop condition scl sda t low t f t r t hd;sta t hd;dat t high t su;dat t f t su;sta t hd;sta t sp sr t su;sto t buf ps t r s application information ( continued ) reference values for design co = 22 f x 2, lo= 1 h, vout setting = 1.0 v, v in = av in = pv in = 5 v, switching frequency = 1 mhz, mode = low (skip), t a = 25 c 2 c unless otherwise noted.
9 NN30295A ver. beb pin functions supply input pin for high side fet gate driver output bst 21 power supply pin for power mosfet power supply pvin 22 23 24 ground pin for radiation of heat ground agnd 25 power supply pin for radiation of heat power supply pvin 26 soft start capacitor connect pin output ss 17 power supply pin power supply avin 18 power good open drain pin output pgood 19 ground pin ground agnd 20 power mosfet output pin for radiation of heat output lx 27 power mosfet output pin output lx 1 output voltage sense pin input vout 16 comparator negative input pin input vfb 15 power supply pin for digital circuit power supply vdd 14 i 2 c interface data i/o pin input/output sda 13 5 4 2 ground pin ground agnd 11 i 2 c interface clock input pin input scl 10 9 8 ground pin for power mosfet ground pgnd 7 6 3 on/off control pin input en 12 description type pin name pin no. pin configuration top view 16 7 10 12 13 18 19 20 24 26 pvin 25 agnd 27 lx 21 22 23 17 16 15 14 11 8 9 5 4 3 2 pgnd lx scl agnd en sda vdd vfb vout ss avin pgood agnd bst pvin notes) concerning detail about pin description, please refer to operation and application information section.
10 NN30295A ver. beb functional block diagram notes) this block diagram is for explaining functions. part of the block diagram may be omitted, or it may be simplified. lgo lpd hgd hpd control logic osc enc vreg ss ton timer + comp toff timer + comp on cmp ref aux timer uvlo shp ocp tsd vref soft-start soft-start vreg:2.55v vin ss avin pvin pgood bst lx pgnd agnd vfb vout en bgr vref on/off bs sw coast fault 0.6v +10% 0.6v +10% avin + - + - - + + current sense dac sda scl vdd i 2 c fccm/skip 22,23,24,26 19 21 1,2,3,4,5,6,27 7,8,9 11,20,25 10 15 16 12 13 17 18 14
11 NN30295A ver. beb operation figure : ovd and uvd operation 115 % 110 % 90 % 85 % 0.603 v 0.603 v vfb pgood 1 ms 1 ms note: pgood pin is pulled up to vreg pin 1) 2) 3) 4) note) the characteristics listed below are reference values derived from the design of the ic and are not guaranteed. (3).thermal shut down (tsd) when the ic internal temperature becomes more than about 140 c, tsd operates and dcdc turns off. (2).over voltage detection (ovd) and under voltage detection (uvd) 1).the nmos connected to the pgood pin turns on when the output voltage rises and the vfb pin voltage reaches 115 % of its set voltage (0.6 v). 2).after (1) above, the nmos connected to the pgood pin is turned off after 1 ms when the output voltage drops and the vfb pin voltag e reaches 110 % of its set voltage (0.6 v). 3).the nmos connected to the pgood pin turns on when the output voltage drops and the vfb pin voltage reaches 85 % of its set voltage (0.6 v). 4).after (3) above, the nmos connected to the pgood pin is turned off after 1 ms when the output voltage drops and the vfb pin voltage reaches 90 % of its set voltage (0.6 v). 1. protection ( 1).output over-current protection (ocp) function and short-circuit protection (scp) function 1) the over current protecti on is activated at about 9 a (typ.) during the ocp, the output voltage continues to drop at the specified current. 2) the short-circuit protecti on function is implemented when the output voltage decreases and the vfb pin reaches to about 70 % of the set voltage of 0.6 v. 3) the scp operates intermittently at 2 ms-on, 16 ms off intervals. figure : ocp and scp operation output current [a] pendency characteristics (ground short protection detection about 70% of vout ) intermittent operation area over current protection ( typ : 9 a ) ground short protection hysteresis output voltage [v] about 1.5 a 1) 2) 3) 2. output voltage setting the output voltage is set by adjusting the value of the external resistors rfb1 and rfb2. the equation below represents the relation between the external resistors and vout. (vin = 5v, iout = ? 1 a, fccm, fsw = 1 mhz) the following table represents the feedback resistor setting ( rfb ) below resistors are recommended for following popular output voltage. 1.5 k 1.0 k 1.0 1.0 k 1.5 k rfb2 [ ? ] 1.0 k 1.2 3.0 k 1.8 rfb1 [ ? ] vout [v] vout rfb1 vfb ( 0.603 v ) rfb2 note: rfb2 can be set to a maximum value of 10 k ? . a larger fbr2 value will be more susceptible to noise. vfb comparator threshold is adjusted to 1.33 %, but the actual output voltage accuracy becomes more than 1.33 % due to the influence fr om the circuits other than vfb comparator. in the case of vout setting = 1.0 v, the actual output voltage accuracy becomes 2 %. (vin = 5.0 v, iout = ? 1 a, skip mode, fsw = 1 mhz). vout = ? 0.0119 rfb1 rfb2 + 0.616 rfb1 rfb2 + 0.593 2 6.1 a to 13 a
12 NN30295A ver. beb operation ( continued ) note) the characteristics listed below are reference values derived from the design of the ic and are not guaranteed. 3. soft start setting soft start function maintains the smooth control of the output voltage during start up by adjusting soft start time. when the ctl1 or ctl2 (or both) pin becomes high, the current (2 a) begin to charge toward the external capacitor (css) of ss pin, and the voltage of ss pin increases straightly. when css is set at 10 nf, soft-start time is approximately 3 ms. css time start soft = 2 6 . 0 (sec) because the voltage of fb pin is controlled by the voltage of ss pin during star t up, the voltage of fb increase straightly to the regulation voltage (0.6 v) together with the voltage of ss pin and keep the regulation voltage after tha t. on the other hand, the voltage of ss pin increase to about 2.8 v and keep the voltage. the calculation of soft start time is as follows. ctl1 or ctl2 ss vout vfb 0.6 v soft start time (s) figure : soft start operation uvlo vreg 2.2 v 2.55 v 4. power on / off sequence (1) when the en pin is set to ?high? after the vin settles, uvlo is released if vin exc eeds its threshold, then the vreg starts up. (2) when vreg voltage exceeds its threshold, the soft start sequence is enabled. the capacitor connected to the ss pin begins to charge and the ss pin voltage increases linearly. (3) the vout pin (dcdc ou tput) voltage increases at the same rate as the ss pin. normal operation begins after the vout pin reaches the set voltage. (4) when the en pin is set to ?low?, vreg and uvlo stop operation. the vout pin / ss pin voltage drops to 0 v. note: the ss pin capacitor should be discharged completely before restarting the startup sequence. an incomplete discharge process might result in an overshoot of the output voltage. soft start time (s) = css 0.6 2 time to pgood flap (s) 2 0.2 css + 1.25m = (1) (2) (3) (4) av in pv in (pin) ss (pin) vout (pin) vfb (pin) vdd (pin) pgood (pin) en (pin) uvlo (int.) vreg (int.) scl (pin) sda (pin) 5 v 2.5 v 5 v 2.55 v 2.55 v 0.6 v 2.5 v 2.5 v 1 v 2.5 v ?????? 5 v
13 NN30295A ver. beb note) the characteristics listed below are reference values derived from the design of the ic and are not guaranteed. operation ( continued ) 5. inductor and output capacitor setting il io ic 0 0 eo S il/2 ton t=1/f vo S il/2 vrpl q2 q1 vo(eo) lo co il ei io ic rc given the desired input and ou tput voltages, the inductor value and operating frequency determine the ripple current. 2 il iox = () f lo ei eo ei eo il ? ? ? ? = highest efficiency operation is obtained at low frequency with small ripple current. however, achieving this requires a large inductor. there is a trade-off among component size, efficiency and operating frequency. a reasonable starting point is to choose a ripple current that is about 40 % of iout(max). the largest ripple current occurs at the highes t vin. to guarantee that ripple current does not exce ed a specified maximum, the inductance should be chosen according to: () ei_max ei @ 2 = ? ? ? ? f iox ei eo ei eo lo and its maximum current rating is ei_max) ei (@ 2 io_max _max = + = il il the selection of cout is primarily determined by the esr (rc) required to minimize voltage ripple and load transients. the output ri pple vrpl is approximately bounded by: () 2 2 2 8 2 8 2 f co lo ei eo ei eo lo rc co ei f co il lo rc co ei vob vop vrpl ? ? ? ? ? + ? ? = ? + ? ? = ? = from the above equation, to achieve desired output ripple, low esr ceramic capacitors are recommended, and its required rms current rating is: ei_max) ei (@ 3 2 (rms)_max = = il ic
14 NN30295A ver. beb note) the characteristics listed below are reference values derived from the design of the ic and are not guaranteed. operation ( continued ) 6. i 2 c-bus interface a.) basic rules b.) start and stop conditions start condition stop condition sda scl acknowledgement signal from slave acknowledgement signal from receiver start or repeated start condition stop or repeated start condition scl sda msb ack ack 12 789 123 ?89 sr or p sr p s or sr this ic, i2c-bus, is designed to correspond to the standard-mode (100 kbps) and fast-mode(400 kbps) devices in the version 2. 1 of nxp's specification. however, it does not corre spond to the hs-mode (to 3.4 mbps). this ic will operate as a slave device in the i 2 c- bus system. this ic will not operate as a master device. the program operation check of this ic has not been conducted on the multi-master bus system and the mix- speed bus system, yet. the connected confirmation of this ic to the cbus receiver also has not been checked. please confirm with our company if the ic will be used in these mode systems. the i 2 c is the brand of nxp. a high to low transition on the sda line while scl is high is one such unique case. this situation indicates start condition. a low to high transition on the sda line while scl is high defines stop condition. start and stop conditions are always generated by the master. after start condi tion occur, the bus will be busy. the bus is considered to be free again a certain time after the stop condition. every byte put on the sda line must be 8-bits long. the number of bytes that can be transmitted per transfer is unrestricted. each byte has to be followed by an acknowledge bit. data is transferred with the most significant bit (msb) first. d1.) when sub address is not specified d2.) when sub address is specified ex) when writing data into address and reading data from "01 h". sub-address should be assigned first. stop condition ack start condition write mode : 0 data byte sub address slave address a p a a w s stop condition ack start condition read mode : 1 data byte slave address p a a r s data byte sub address 01h slave address ap a a 0 s ap data byte slave address a 1 s write read stop condition acknowledge bit start condition write mode : 0 repeated start condition read mode : 1 ack ack data byte slave address sub address slave address s ap a a 1 a 0 s d.) data format 72h hex 1 a5 x r/w 1 a1 0 a3 0 0 1 1 a0 a2 a4 a6 slave address write mode read mode when data is read without assi gning sub-address, it is possible to read the value of sub-address specified in write mode immediately before.
15 NN30295A ver. beb note) the characteristics listed below are reference values derived from the design of the ic and are not guaranteed. operation ( continued ) 6. i 2 c-bus interface fsel[6:4] 2.00 1 1 1 1.75 0 1 1 1.50 1 0 1 1.25 0 0 1 1.00 1 1 0 0.75 0 1 0 0.50 1 0 0 1.00 ( default ) 0 0 0 frequency (mhz) d4 d5 d6 d1: fccm: 0 : default ( skip mode ) 1 : force ccm mode d0: dcdcoff 0 : default ( dcdc on ) 1 : dcdc off d6-d4 (fsel setting) dcdcoff fccm default name bit 0 0 0 0 0 fsel[2:0] cnt r/w 10h r/w register name sub address d5 d6 d7 data d0 d1 d2 d3 d4 d3-0 : dcdc output vo ltage setting register 1.045 0 0 1 1 1.060 1 0 1 1 vdc1[3:0] 1.000 ( default ) 0 0 0 0 0.880 1 0 0 0 0.895 0 1 0 0 0.910 1 1 0 0 0.925 0 0 1 0 0.940 1 0 1 0 0.955 0 1 1 0 0.970 1 1 1 0 0.985 0 0 0 1 1.000 1 0 0 1 1.015 0 1 0 1 1.030 1 1 0 1 1.075 0 1 1 1 1.090 output voltage [v] 1 1 1 1 d0 d1 d2 d3 note) the required output voltage is set by changing the dac step by 1 bit at a time. an interval of more than 50 s is required at every bi t step while changing the dac. vdc[3:0] default name bit 0 0 0 0 dac r/w 11h r/w register name sub address d5 d6 d7 data d0 d1 d2 d3 d4 dcdcoff fccm vdc[3:0] name dac r/w 11h 0 0 0 0 default default name bit 0 0 0 0 0 fsel[2:0] cnt r/w 10h r/w register name sub address d5 d6 d7 data d0 d1 d2 d3 d4
16 NN30295A ver. beb typical characteristics curves (1) output ripple voltage condition : vin=5v,vout = 1.0v,frequency = 1000khz,skip mode i load = 0a i load = 1a i load = 3a i load = 6a vout lx vout lx vout lx vout lx
17 NN30295A ver. beb typical characteristics curves ( continued ) (1) output ripple voltage condition : vin=5v,vout = 1.0v,frequency = 1000khz,fccm mode i load = 0a i load = 1a i load = 3a i load = 6a vout lx vout lx vout lx vout lx
18 NN30295A ver. beb typical characteristics curves ( continued ) (2) load transient condition : vin = 5.0 v, vout = 1.0 v, frequency = 1 mhz, iout = 10 ma ?? 6 a ( 0.5 a / s ) skip mode fccm mode (3) efficiency condition : vin = 5.0 v, vout = 1.0 v, frequency = 1 mhz, iout = 0.6 a ?? 5.4 a ( 0.5 a / s ) skip mode fccm mode condition : vin = 5.0 v, vout = 1.0 v / 1.2 v / 1.8v / 3.3v, l = 1 h, cout = 44 f (22 f x 2), frequency = 500 khz condition : vin = 5.0 v, vout = 1.0 v / 1.2 v / 1.8v / 3.3v, l = 1 h, cout = 44 f (22 f x 2), frequency = 1 mhz time (100 us/div) vout (50 mv/div) iout (5 a/div) 22.4mv 18.8mv time (100 us/div) vout (50 mv/div) iout (5 a/div) 24.6mv 25.8mv time (100 us/div) vout (50 mv/div) iout (5 a/div) 23mv 26.5mv time (100 us/div) vout (50 mv/div) iout (5 a/div) 20.7mv 24.3mv frequency = 500 khz 0 10 20 30 40 50 60 70 80 90 100 0.001 0.010 0.100 1.000 10.000 iout (a) efficiency (%) fccm/ vo= 1. 0v fccm/ vo= 1. 2v fccm/ vo= 1. 8v fccm/ vo= 3. 3v skip/ vo= 1.0v skip/ vo= 1.2v skip/ vo= 1.8v skip/ vo= 3.3v frequency = 1000 khz 0 10 20 30 40 50 60 70 80 90 100 0.001 0.010 0.100 1.000 10.000 iout (a) efficiency (%) fccm/ vo= 1.0v fccm/ vo= 1.2v fccm/ vo= 1.8v fccm/ vo= 3.3v skip/ vo= 1.0v skip/ vo= 1.2v skip/ vo= 1.8v skip/ vo= 3.3v
19 NN30295A ver. beb (4) load regulation (5) line regulation condition : vin = 5.0 v, vout = 1.0 v, frequency = 500 khz condition : vin = 5.0 v, vout = 1.0 v, frequency = 1 mhz condition : vin = 5.0 v, vout = 1.0 v, frequency = 1 mhz, iout = 1.5 a typical characteristics curves ( continued ) load regulation_f = 500khz (skip mode) 0.90 0.95 1.00 1.05 1.10 0.00 1.00 2.00 3.00 4.00 5.00 6.00 iout (a) vout (v) load regulation_f = 500khz (fccm mode) 0.90 0.95 1.00 1.05 1.10 0.00 1.00 2.00 3.00 4.00 5.00 6.00 iout (a) vout (v) load regulation_f = 1000khz (skip mode) 0.90 0.95 1.00 1.05 1.10 0.00 1.00 2.00 3.00 4.00 5.00 6.00 iout (a) vout (v) load regulation_f = 1000khz (fccm mode) 0.90 0.95 1.00 1.05 1.10 0.00 1.00 2.00 3.00 4.00 5.00 6.00 iout (a) vout (v) line regulation_f = 1000khz (skip mode) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.0 1.0 2.0 3.0 4.0 5.0 vin (v) vout (v) line regulation_f = 1000khz (fccm mode) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.0 1.0 2.0 3.0 4.0 5.0 vin (v) vout (v)
20 NN30295A ver. beb (6) start/shut down condition : vin = 5.0 v, vout = 1.0 v, frequency = 1 mhz, skip mode, iout = 0 a condition : vin = 5.0 v, vout = 1.0 v, frequency = 1 mhz, skip mode, rload = 0.5 ? typical characteristics curves ( continued ) en (2 v/div) vout (0.5 v/div) ss (2 v/div) en (2 v/div) vout (0.5 v/div) ss (2 v/div) time (10 ms/div) time (10 ms/div) en (2 v/div) vout (0.5 v/div) ss (2 v/div) en (2 v/div) vout (0.5 v/div) ss (2 v/div) time (10 ms/div) time (10 ms/div) (7) short current protection condition : vin = 5.0 v, vout = 1.0 v, frequency = 1 mhz skip mode fccm mode lx (5 v/div) vout (1 v/div) ss (2 v/div) iout (10 a/div) time (10 ms/div) lx (5 v/div) vout (1 v/div) ss (2 v/div) iout (10 a/div) time (10 ms/div)
21 NN30295A ver. beb (8) switching frequency typical characteristics curves ( continued ) condition : vin = 5.0 v, vout = 1.0 v, frequency = 1 mhz, iout = 10 ma ~ 6 a condition : vout = 1.0 v, frequency = 1 mhz, iout = 3 a lx average frequency (mhz) skip mode 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.01 0.1 1 10 iload (a) lx average frequency (mhz) lx average frequency (mhz) fccm mode 0 0.2 0.4 0.6 0.8 1 1.2 0.01 0.1 1 10 iload (a) lx average frequency (mhz) lx average frequency (mhz) skip mode 0.80 0.82 0.84 0.86 0.88 0.90 0.92 0.94 0.96 0.98 1.00 4.4 4.6 4.8 5.0 5.2 5.4 5.6 vin(v) lx average frequency (mhz) lx average frequency (mhz) fccm mode 0.80 0.82 0.84 0.86 0.88 0.90 0.92 0.94 0.96 0.98 1.00 4.4 4.6 4.8 5.0 5.2 5.4 5.6 vin(v) lx average frequency (mhz)
22 NN30295A ver. beb (9) thermal performance typical characteristics curves ( continued ) condition : vin=5v , vout = 1.0v , frequency = 1000khz , iload = 5a , fccm mode
23 NN30295A ver. beb package information ( reference data ) outline drawing unit : mm
24 NN30295A ver. beb package information ( reference data ) power dissipation (supplementary explanation)
25 NN30295A ver. beb important notice 1.the products and product specificat ions described in this book are subject to change without notice for modification and/or improvement. at the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date product standards in advance to ma ke sure that the latest specifications satisfy your requirements. 2.when using the lsi for new models, verify the safe ty including the long-term reliability for each product. 3.when the application system is designed by using this lsi, be sure to confirm notes in this book. be sure to read the notes to descr iptions and the usage notes in the book. 4.the technical information described in this book is inten ded only to show the main characteristics and application circuit examples of the products. no license is granted in and to any intellectual property right or other right owned by panasonic corporation or any other company. therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other company which may arise as a result of the use of technical information de-scribed in this book. 5.this book may be not reprinted or r eproduced whether wholly or partially, without the prior written permission of our company. 6.this lsi is intended to be used for general electronic equipment. consult our sales staff in advance for information on the following applications: special applications in which exceptional quality and reliability are required, or if the failu re or malfunction of this lsi may directly jeopardize life or harm the human body. any applications other than t he standard applications intended. (1) space appliance (such as artificial satellite, and rocket) (2) traffic control equipment (such as fo r automobile, airplane, train, and ship) (3) medical equipment for life support (4) submarine transponder (5) control equipment for power plant (6) disaster prevention and security device (7) weapon (8) others : applications of which reliabili ty equivalent to (1) to (7) is required it is to be understood that our company sh all not be held responsible for any damage incurred as a result of or in connection with your using the lsi described in this book for any special application, unless our company agrees to your using the lsi in this book for any special application. 7.this lsi is neither designed nor intended for use in aut omotive applications or envir onments unless the specific product is designated by our company as comp liant with the iso/ts 16949 requirements. our company shall not be held responsible for any damage incurred by you or any third party as a result of or in connection with your using the lsi in aut omotive application, unless our compan y agrees to your using the lsi in this book for such application. 8.if any of the products or technical in formation described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially , those with regard to security export control, must be observed. 9. please use this product in compliance with all applicable la ws and regulations that regula te the inclusion or use of controlled substances, including withou t limitation, the eu rohs directive. our company shall not be held responsible for any dama ge incurred as a result of your using the lsi not complying with the applicable laws and regulations.
26 NN30295A ver. beb usage notes 1. when designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions (operating power supply voltage and operating environment etc. ). especially, please be careful not to exceed the range of absolute maximum rati ng on the transient state, such as power-on, power-off and mode-switching. otherwise, we will not be liable for any defect which may arise later in your equipment. even when the products are used within the guaranteed val ues, take into the consideration of incidence of break down and failure mode, possible to occur to semi conductor products. measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are reco mmended in order to prevent physical injury, fire, social damages, for example, by using the products. 2. comply with the instructions for use in order to pr event breakdown and characteristics change due to external factors (esd, eos, thermal stress and mechanical stress) at the time of handling, mo unting or at customer's process. when using products for which damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages. 3. pay attention to the direction of lsi. when mounting it in the wrong directi on onto the pcb (printed-circuit-board), it might smoke or ignite. 4. pay attention in the pcb (printed-circuit-board) pattern layout in order to prevent damage due to short circuit between pins. in addition, refer to the pin description for the pin configuration. 5. perform a visual inspection on the pcb before applying power, otherwise damage might happen due to problems such as a solder-bridge between the pins of t he semiconductor device. also, perform a full technical verification on the assembly quality, because the same damage possibly can happen due to conductive substances, such as solder ball, that adhere to the lsi during transportation. 6. take notice in the use of this pr oduct that it might break or occasionally smoke when an abnormal state occurs such as output pin-vcc short (power supply fault), out put pin-gnd short (ground faul t), or output-to-output-pin short (load short) . and, safety measures such as an installation of fuses are recommended becaus e the extent of the above- mentioned damage and smoke emission will depend on the current capability of the power supply. 7. the protection circuit is for maintaining safety agai nst abnormal operation. theref ore, the protection circuit should not work during normal operation. especially for the thermal protection ci rcuit, if the area of safe operation or the absolute maximum rating is momentarily exceeded due to output pin to vcc short (pow er supply fault), or output pin to gnd short (ground fault), the lsi might be damaged before t he thermal protection circuit could operate. 8. unless specified in the product specifications, make sure that negative voltage or excessive voltage are not applied to the pins because the device might be damage d, which could happen due to negative voltage or excessive voltage generated during the on and off timing when the inductive load of a motor coil or actuator coils of optical pick-up is being driven. 9. the product which has spec ified aso (area of safe oper ation) should be operated in aso 10. verify the risks which might be caused by the malfunctions of external components. 11. connect the metallic plates on the back side of the lsi with their respecti ve potentials (agnd, pvin, lx). the thermal resistance and the electrical characteristics ar e guaranteed only when the meta llic plates are connected with their respective potentials.
request for your special attention and precautions in using the technical information and semiconductors described in this book (1) if any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. (2) the technical information described in this book is intended only to show the main characteristics and application circuit examples of the products. no license is granted in and to any intellectual property right or other right owned by panasonic corporation or any other company. therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other company which may arise as a result of the use of technical information described in this book. (3) the products described in this book are intended to be used for general applications (such as office equipment, communications equipment, measuring instruments and household appliances), or for specific applications as expressly stated in this book. consult our sales staff in advance for information on the following applications: ? special applications (such as for airplanes, aerospace, automotive equipment, traffic signaling equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body. it is to be understood that our company shall not be held responsible for any damage incurred as a result of or in connection with your using the products described in this book for any special application, unless our company agrees to your using the products in this book for any special application. (4) the products and product specifications described in this book are subject to change without notice for modification and/or im- provement. at the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date product standards in advance to make sure that the latest specifications satisfy your requirements. (5) when designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions (operating power supply voltage and operating environment etc.). especially, please be careful not to exceed the range of absolute maximum rating on the transient state, such as power-on, power-off and mode-switching. otherwise, we will not be liable for any defect which may arise later in your equipment. even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products. (6) comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (esd, eos, thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. when using products for which damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages. (7) this book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of our company. 20100202

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