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as3647/47b 1600ma high curren t led flash driver www.austriamicrosystems.com/as3647 1.5-4 1 - 37 (ptr) datasheet 1 general description the as3647/47b is an inductive high efficient dcdc step up converter with two current sinks. the dcdc step up converter operates at a fixed frequency of 4mhz and includes soft startup to allow easy integration into noise sensitive rf systems. the two current sinks can operate in flash / torch / assist (=video) light modes. the as3647/47b includes flash timeout, overvoltage, overtemperature, undervoltage and led short circuit protection functions. a txmask/torch function reduces the flash current in case of parallel operation to the rf power amp lifier and avoids a system shutdown. alternatively this pin can be used to directly operate the torch light directly. the as3647/47b is controlled by an i 2 c interface and has a hardware automatic shutdown if scl=0 for 100ms. therefore no additional enable input is required for shutting down of the device once the system shuts down. the as3647/47b is available in a space-saving wl- csp package measuring only 2.25x1.5x0.6mm (as3647b: 2.25x1.5x0.5mm) and operates over the - 30oc to +85oc temperature range. figure 1. typical operating circuit 2 key features ?? high efficiency 4mhz fixed frequency dcdc boost converter with soft start allows small coils - stable even in coil current limit ?? led current adjustable up to 1600ma ?? automatic current adjustment for low battery voltage ?? pwm operation for lower output current for reliable light output of th e led; running at 31.25khz to avoid audible noise ?? protection functions: automatic flash timeout timer to protect the led(s) overvoltage and undervoltage protection overtemperature protection led short/open circuit protection ?? i 2 c interface with automatic shutdown ?? 5v constant voltage mode operation ?? available in tiny wl-csp packages, 13 balls 0.5mm pitch 2.25x1.5x0.6mm, 15 balls 0.4mm pitch 2.25x1.5x0.5mm package size 3 applications flash/torch/videolight for smartphones, feature-phones, tablets, dscs, dvcs as3647/47b ams ag technical content still valid
www.austriamicrosystems.com/as3647 1.5-4 2 - 37 as3647/47b datasheet, confidential - pinout 4 pinout pin assignment figure 2. pin assignments (top view) as3647 figure 3. pin assignments (top view) as3647b

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www.austriamicrosystems.com/as3647 1.5-4 3 - 37 as3647/47b datasheet, confidential - pinout pin description table 1. pin description for as3647 pin number pin name description a1 vout1 dcdc converter output capacitor - make a short connection to c vout / vout2 a2 gnd power and analog ground; make a short connection between both balls a3 led_out1 flash led current sink b1 sw1 dcdc converter switching node - make a short connection to sw2 / coil l dcdc b2 gnd power and analog ground; make a short connection between both balls c1 vout2 dcdc converter output capacitor - make a short connection to c vout / vout1 c2 sw2 dcdc converter switching node - make a short connection to sw1 /coil l dcdc c3 led_out2 flash led current sink d1 scl serial clock input for i 2 c interface d2 vin positive supply voltage input - connect to supply and make a short connection to input capacitor c vin and to coil l dcdc e1 sda serial data input/output for i 2 c interface (needs external pullup resistor) e2 strobe digital input with pulldown to control strobe time for flash function e3 txmask/ torch function 1: connect to rf power amplifier enable signal - reduces currents during flash to avoid a system shutdown due to parallel operation of the rf pa and the flash driver function 2: operate torch current level without using the i 2 c interface to operate the torch without need to start a camera processor (if the i 2 c is connected to the camera processor table 2. pin description for as3647b pin number pin name description a1 vout1 dcdc converter output capacitor - make a short connection to c vout / vout2 a2 gnd power ground; make a short connection between both balls a3 led_out1 flash led current sink b1 vout2 dcdc converter output capacitor - make a short connection to c vout / vout1 b2 sw2 dcdc converter switching node - make a short connection to sw1 /coil l dcdc b3 gnd power ground; make a short connection between both balls c1 sw1 dcdc converter switching node - make a short connection to sw2 / coil l dcdc c2 sw3 dcdc converter switching node - make a short connection to sw3 /coil l dcdc c3 led_out2 flash led current sink d1 scl serial clock input for i 2 c interface d2 gnda analog ground - internally connected to gnd ball a2; for improving thermal performance connect to ground plane (optional) d3 vin positive supply voltage input - connect to supply and make a short connection to input capacitor c vin and to coil l dcdc e1 sda serial data input/output for i 2 c interface (needs external pullup resistor) ams ag technical content still valid
www.austriamicrosystems.com/as3647 1.5-4 4 - 37 as3647/47b datasheet, confidential - pinout e2 strobe digital input with pulldown to control strobe time for flash function e3 txmask/ torch function 1: connect to rf power amplifier enable signal - reduces currents during flash to avoid a system shutdown due to parallel operation of the rf pa and the flash driver function 2: operate torch current level without using the i 2 c interface to operate the torch without need to start a camera processor (if the i 2 c is connected to the camera processor table 2. pin description for as3647b pin number pin name description ams ag technical content still valid
www.austriamicrosystems.com/as3647 1.5-4 5 - 37 as3647/47b datasheet, confidential - absolute maximum ratings 5 absolute maximum ratings stresses beyond those listed in table 3 may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other cond itions beyond those indicated in table 4, ?electrical characteristics,? on page 6 is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. table 3. absolute maximum ratings parameter min max units comments vin to gnd -0.3 +7.0 v strobe, txmask/torch, scl, sda to gnd -0.3 vin + 0.3 vmax. +7v sw1/2/3, vout1/2, led_out1/2 to gnd -0.3 +7.0 v vout1/2 to sw1/2/3 -0.3 v note: diode between vout1/2 and sw1/2/3 voltage between 2xgnd, gnda pins 0.0 0.0 v short connection recommended input pin current without causing latchup -100 +100 +i in ma norm: eia/jesd78 continuous power dissipation (t a = +70oc) continuous power dissipation 1230 mw p t at 70oc 1 1. depending on actual pcb layout and pcb used measured on demoboard; for peak power dissipation during flashing see document 'as364 7/47b thermal measurements' continuous power dissipation derating factor 16.7 mw/oc p derate 2 2. p derate derating factor changes the total continuous power dissipation (p t ) if the ambient te mperature is not 70oc. therefore for e.g. t amb =85oc calculate p t at 85oc = p t - p derate * (85oc - 70oc) electrostatic discharge esd hbm pins led_out1/2 3 3. pins led_out1 connected to led_out2 and capacitor c vout connected to vout1/2 and gnd; both gnd pins connected together 8000 v norm: jedec jesd22-a114f esd hbm 2000 v esd cdm 500 v norm: jedec jesd 22-c101e esd mm 100 v norm: jedec jesd 22-a115-b temperature ranges and storage conditions junction to ambient thermal resistance 60 4 4. measured on as3647/47b demoboard. oc/w for more information about thermal metrics, see application note an01 thermal characteristics junction temperature +150 oc internally limited (overtemperature protection), max. 20000s storage temperature range -55 +125 oc humidity 5 85 % non condensing body temperature during soldering +260 oc according to ipc/jedec j-std-020 moisture sensitivity level (msl) msl 1 represents a max. floor life time of unlimited ams ag technical content still valid
www.austriamicrosystems.com/as3647 1.5-4 6 - 37 as3647/47b datasheet, confidential - electrical characteristics 6 electrical characteristics v vin = +2.7v to +4.4v, t amb = -30oc to +85oc, unless otherwise specified. typical values are at v vin = +3.7v, t amb = +25oc, unless otherwise specified. table 4. electrical characteristics symbol parameter condition min typ max unit general operating conditions v vin supply voltage pin vin 2.7 3.7 4.4 v v vinreduce d_func supply voltage as3647/47b functionally working, but not all parameters fulfilled 2.5 2.7 v 4.4 5.5 i shutdown shutdown current txmask/torch=l, scl=sda=0v, v vin <3.7v 0.6 2.0 a i stanby standby current interface active, txmask/torch=l, v vin <3.7v 1 1.0 10 a t amb operating temperature -30 25 85 oc eta application efficiency (dcdc and current sink) l coil =0.6h@3a, l esr =60m ? , led_out1,2=1300ma 2 , t flash <300ms 84 % dcdc step up converter v vout dcdc boost output voltage (pin vout1/2) 2.8 5.5 v v vout5v dcdc boost output voltage (pin vout1/2) constant voltage mode operation const_v_mode (see page 25) =1 5.0 v r pmos on-resistance dcdc internal pmos switch 70 m ? r nmos on-resistance dcdc internal nmos switch 70 m ? f clk operating frequency all internal timings are derived from this oscillator -7.5% 4.0 +7.5% mhz current sinks v led led forward voltage single led at 1600ma 2.8 3.5 4.2 v i led_out led_out1/2 current sinks output combined single led 0 1600 ma i led_out ? led_out1/2 current sink accuracy i led_out >=800ma or i led_out <500ma 0oc < t j < 100oc -7 +7 % 500ma www.austriamicrosystems.com/as3647 1.5-4 7 - 37 as3647/47b datasheet, confidential - electrical characteristics v voutmax v vout overvoltage protection dcdc converter overvoltage protection 5.0 5.3 5.6 v i limit current limit for coil l dcdc (pin sw) measured at 40% pwm duty cycle 3 maximum 40000s lifetime operation in overcurrent limit coil_peak =00b 1.8 2.0 2.23 a coil_peak =01b 2.25 2.5 2.78 default value coil_peak (see page 24) =10b 2.7 3.0 3.34 coil_peak =11b 3.15 3.5 3.9 v ledshort flash led short circuit detection voltage voltage measured between pins vout1,2 and led_out1,2 1.0 v t ovtemp overtemperature protection junction temperature 144 oc t ovtemphy st overtemperature hysteresis 5oc t flashtimeo ut flash timeout timer can be adjusted with register flash_timeout (page 26) 2 1280 ms accuracy -7.5 +7.5 % v uvlo undervoltage lockout falling v vin 2.25 2.4 2.5 v rising v vin v uvlo +0.05 v uvlo +0.1 v uvlo +0.15 v digital interface v ih high level input voltage pins scl, sda. pin txmask/torch in external torch mode ( ext_torch_on =10) 1.26 v vin v v il low level input voltage 0.0 0.54 v v ihflash high level input voltage pin strobe. pin txmask/torch for txmask mode ( ext_torch_on =01) 4 0.7 v vin v v ilflash low level input voltage 0.0 0.54 v v ol low level output voltage pin sda, i ol =3ma 0.3 v i leak leakage current pins scl, sda -1.0 0.0 +1.0 a i pd pulldown current to gnd 5 pins torch, strobe and txmask/torch 36 a t debtorch torch debounce time 6.3 9 11.7 ms t timeout scl timeout in indicator, assist or flash mode, if scl is low longer than this timeout, the as3647/47b automatically enters shutdown mode 35 100 ms i 2 c mode timings - see figure 4 on page 9 f sclk scl clock frequency 1/ t timeo ut 400 khz t buf bus free time between a stop and start condition 1.3 s table 4. electrical characteristics (continued) symbol parameter condition min typ max unit ams ag technical content still valid
www.austriamicrosystems.com/as3647 1.5-4 8 - 37 as3647/47b datasheet, confidential - electrical characteristics t hd:sta hold time (repeated) start condition 6 0.6 s t low low period of scl clock 1.3 s t high high period of scl clock 0.6 s t su:sta setup time for a repeated start condition 0.6 s t hd:dat data hold time 7 00 . 9 s t su:dat data setup time 8 100 ns t r rise time of both sda and scl signals 20 + 0.1c b 300 ns t f fall time of both sda and scl signals 20 + 0.1c b 300 ns t su:sto setup time for stop condition 0.6 s c b capacitive load for each bus line c b ? total capacitance of one bus line in pf 400 pf c i/o i/o capacitance (sda, scl) 10 pf 1. for vbat=4.5v, scl=1.8v, sda=1.8v maximum i stanby is <16a. 2. to improve efficiency at low output currents, the active pa rt of the internal switchin g transistor pmos is reduced in size to 1/5 its original size. this reduces the curre nt required to drive the pmos transistor and therefore improves overall efficiency at low output currents. 3. due to slope compensation of the current limit, i limit changes with duty cycle - see figure 17 on page 12 . 4. the logic input levels v ih and v il allow for 1.2v or 1.8v supplied driving circuit 5. a pulldown current of 36a is equal to a pulldown resistor of 42k ? at 1.5v 6. after this period, the first clock pulse is generated. 7. a device must internally provide a hold time of at least 300ns for the sda signal (referred to the v ihmin of the scl signal) to bridge the undefined region of the falling edge of scl. 8. a fast-mode device can be used in a st andard-mode system, bu t the requirement t su:dat = to 250ns must then be met. this is autom atically the case if the device does not stretc h the low period of the scl signal. if such a device does stretch the low period of the scl signal, it must output the next data bit to the sda line t r max + t su:dat = 1000 + 250 = 1250ns before the scl line is released. table 4. electrical characteristics (continued) symbol parameter condition min typ max unit ams ag technical content still valid
www.austriamicrosystems.com/as3647 1.5-4 9 - 37 as3647/47b datasheet, confidential - electrical characteristics timing diagrams figure 4. i 2 c mode timing diagram scl sda t buf t hd:sta t su:sta repeated start t su:sto t f t su:dat t high t hd:dat t r t low t hd:sta start stop ams ag technical content still valid
www.austriamicrosystems.co m/as3647 1.5-4 10 - 37 as3647/47b datasheet, confidential - typical operating characteristics 7 typical operating characteristics v vin = 3.7v, t a = +25oc (unless otherwise specif ied), led: osram phaser 2 (vf led =3.8v at 1a) figure 5. dcdc efficiency vs. v vin figure 6. application efficiency (p led /p vin ) vs. v vin 60 65 70 75 80 85 90 95 100 2,8 3,2 3,6 4 4,4 4,8 5,2 % input voltage (v) iout = 1600ma/1 led iout = 1300ma/1 led iout = 1300ma/1 led/ 1/4mhz on iout = 1000ma/1 led 60 65 70 75 80 85 90 2,8 3,2 3,6 4 4,4 4,8 5,2 % input voltage (v) iout = 1600ma/1 led iout = 1300ma/1 led iout = 1300ma/1 led/ 1/4mhz on iout = 1000ma/1 led figure 7. battery current vs. v vin figure 8. efficiency at low currents (300ma) 0 0,5 1 1,5 2 2,5 3 3,5 4 2,8 3,2 3,6 4 4,4 4,8 5,2 a input voltage (v) iout = 1600ma/1 led iout = 1300ma/1 led iout = 1300ma/1 led/ 1/4mhz on iout = 1000ma/1 led 60 65 70 75 80 85 90 95 100 2,8 3,0 3,2 3,4 3,6 3,8 4,0 4,2 4,4 % input voltage (v) iout = 300ma/1 leds dcdc efficiency iout = 300ma/1 leds application efficiency figure 9. i led startup (i led_out =1.0a) figure 10. i vin , i led startup (i led_out =800ma) ams ag technical content still valid
www.austriamicrosystems.co m/as3647 1.5-4 11 - 37 as3647/47b datasheet, confidential - typical operating characteristics figure 11. i led startup (i led_out =60ma) figure 12. vout / i led_out ripple, i led_out = 1.0a figure 13. i led rampdown (i led_out =1.0a) figure 14. i led_out vs. t amb 58 59 60 61 62 63 -30 -10 10 30 50 70 ma ambient temperature (c) figure 15. oscillator frequency f clk vs. t amb figure 16. flash timeout 3.8 3.9 4.0 4.1 4.2 -30 -10 10 30 50 70 mhz ambient temperature (c) ams ag technical content still valid
www.austriamicrosystems.co m/as3647 1.5-4 12 - 37 as3647/47b datasheet, confidential - detailed description 8 detailed description the as3647/47b is a high performance dcdc step up converter with internal pmos and nmos switches. its output is connected to one flash led with an inte rnal current sink. the device is controlled by the pins sda and scl in i 2 c mode. the actual operating mode like standby, assist light, indicato r or flash mode, can then be ch osen by the interface. if not in standby mode, the device automatically enters sh utdown mode by keeping scl low for more than t timeout 1 . the as3647/47b includes a fixed frequen cy dcdc step-up with accurate startup control. together with the current sink (on led_out1/2) it includes several protection and safety functions. internal circuit diagram figure 17. internal circuit diagram softstart / soft ramp down during startup and ramp down the led current is smoothly ramped up and ramped down. if the dcdc converter goes out of regulation (measured by monitori ng the voltage across the current sinks), the ramp up is temporarily stopped in order for the dcdc to return to regulation 2 . 1. following registers are reset to their default value if the timeout expires: out_on =0, ext_torch_on =00, mode_setting =00, const_v_mode =0. 2. the actual value of the led current setting can be readout by the register led_current_actual (see page 28) to allow the camera processor to adopt to the actual operating conditions.

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www.austriamicrosystems.co m/as3647 1.5-4 13 - 37 as3647/47b datasheet, confidential - detailed description 4mhz/1mhz operating mode switching if freq_switch_on (see page 28) =1 and in flash and assist light mode (indicator mode or low current mode using pwm mode -see mode_setting (page 26) - always will use pulseskip) if led_current >=40h , the dcdc converter always oper- ates in pwm mode (exception: pfm mode is allowed during st artup) to reduce emi in emi sensitive systems. for flash and assist light mode and high duty cycles close to 100% on-time (maximum duty cycle) of the pmos, the dcdc con- verter can switch into a 1mhz operating mode and maximu m duty cycle to improve efficiency for this load condition 3 . the dcdc converter returns back to its normal 4mhz operating frequency when load or supply conditions change. due to this switching between two fixed frequencies the noi se spectrum of the system is exactly defined and predict- able. if improved efficiency is required, the fixed switching between 1mhz / 4mhz can be disabled by freq_switch_on (see page 28) =0. in this case pulseskip will be used. the internal circuit for switching between these two frequencies is shown in figure 18 : figure 18. internal circuit of 4mhz/1mhz selection note: for simplicity figure 18 shows only a single current sink. protection and fault detection functions the protection functions protect the as3647/47b and t he led(s) against physical damage. in most cases a fault reg- ister bit is set, which can be readout by the i 2 c interface. the fault bits are automatically cleared by a i 2 c readout of the fault register. additionally the dcdc is st opped and the current sinks are disabled 4 by resetting out_on =0, mode_setting =00 and ext_torch_on =00. overvoltage protection in case of no or a broken led(s) at the pin led_out1 /2 and an enabled dcdc converter, the voltage on vout1/2 rises until it reaches v voutmax (overvoltage condition) and the voltage across the current source is below low_vds 5 ., the dcdc converter is stopped, the curre nt sources are disabled and the bit fault_ovp (see page 27) is set 6 . 3. efficiency compared to a 4m hz only dcdc converter forced to operate with minimum duty cycle. 4. applies for all faults except txmask event occurred 5. if overvoltage is reached, but none of the low_vds co mparator(s) triggers, vout1/2 is still regulated below v voutmax . 6. in constant voltage mode (5v generation, register bit const_v_mode =1) this fault is disabled.
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www.austriamicrosystems.co m/as3647 1.5-4 14 - 37 as3647/47b datasheet, confidential - detailed description short circuit protection after the startup of the dcdc converter, the voltage on le d_out1/2 is continuously monitored and compared against v ledshort if the led current is above 25ma 7 (see figure 19 ). if the voltage across the led (vf led = vout1/2- led_out1/2) stays below v ledshort , the dcdc is stopped (as a shorted led is assumed), the current sinks are dis- abled and the bit fault_led_short (see page 27) is set. figure 19. short led detection overtemperature protection the junction temperature of the as3 647/47b is continuously monitored. if the temperature exceeds t ovtemp , the dcdc is stopped, the current sinks ar e disabled (instantaneous) and the bit fault_overtemp (see page 27) is set. the driver is automatically re-enabled 8 once the junction temperature drops below t ovtemp -t ovtemphyst . txmask event occurred if during flash, txmask current reduction is enabled (see txmask on page 16 , configured by ext_torch_on =01) and a txmask event happened (pin txmask/ torch=1), the fault register bit fault_txmask (see page 27) is set. flash timeout if the flash is started a timeout timer is started in parallel. if the flash duration defined by the strobe input ( strobe_on = 1 and strobe_type = 1, see figure 26 on page 19 ) exceeds t flashtimeout (adjustable by register flash_timeout (see page 26) ), the dcdc is stopped and the flash current sinks (on pin led_out1/2) are disabled and fault_timeout is set. if the flash duration is defined by the timeout timer itself ( strobe_on = 0, see figure 24 on page 19 ), the register fault_timeout is set after the flash has been finished. supply undervoltage protection if the voltage on the pin vin (=battery voltage) is or falls below v uvlo , the as3647/47b is kept in shutdown state and all registers are set to their default state. wakeup circuit - power off detection in flash, assist light and indicator mode (register mode_setting (page 26) =01, 10 or 11) and out_on (page 26) =1, if scl is l for more than t timeout , shutdown mode is automatically entered. this feature automatically detects a power-off of the controlling circuit driving scl and sda (vdd_i/f goes to 0v e.g. due to a low power condition of the driving circuit) - the internal circuit is shown in figure 20 : 7. to avoid errors in short led detection for leds with a high leakage current 8. in constant voltage mode ( const_v_mode =1) the dcdc will not be automatically re-enabled.

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www.austriamicrosystems.co m/as3647 1.5-4 15 - 37 as3647/47b datasheet, confidential - detailed description figure 20. device shutdown and wakeup in shutdown mode once pin scl goes high for the first time, the internal counter shown in figure 20 is immediately reset thus releasing the internal reset (assuming vin is above v uvlo ) signal and allows instant communication on the i 2 c bus. therefore no additional action is required to leave the shutdown mode and start i 2 c communication. purpose of this circuit the purpose of this circuit is an additional security mechanism. assume the user programmed torch or i ndicator operation (there is no timeout for these operating modes) and the bat- tery slowly drops below the undervoltage limit of the syst em. the processor would get an reset by the pmic and the ldo operating vdd_i/f is switched off, but the processor mi ght not have been able to switch-off the torch/indicator operation of the as3647/47b. due to the implemented secu rity mechanism the as3647/47b detects a power off of vdd_i/f and automatical ly enters shutdown. current consumption in standby/shutdown mode the as3647/47b is designed to draw minimum current in standby and shutdown mode. there is a small difference in current consumption between these two operating modes (typ. 300na) only due to the internal level shifters (see the schmitt trigger input buffers connected to scl and sda in figure 20 ) for shifting up the voltage on scl/sda (vdd_i/f e.g. 1.8v) to the supply voltage on vin (e .g. 3.7v). if the as3647/47b is driven wit h digital levels close to 0v/vin, the current consumption for standby mode is identical to shutdown mode. operating mode and currents the output currents and operating mode are selected according to the following table: table 5. operating mode and current settings as3647/47b configuration operating mode and currents scl and sda torch strobe mode_ setting (see page 26) out_on (see page 26) condition mode led_out1/2 output current scl low for t time out 1 xx x x if previous operating mode was indicator, assist light or flash mode shutdown all registers are reset to their default values 0
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www.austriamicrosystems.co m/as3647 1.5-4 16 - 37 as3647/47b datasheet, confidential - detailed description flash current reductions txmask usually the flash current is defined by the register led_current . if the txmask/torch input is used and (configured by ext_torch_on =01), the flash current is reduced to flash_txmask_current if txmask/torch=1. current reduction by vin measurements in flash mode due to the high load of the flash driver and the esr of the bat tery (especially critical at low temperatures), the voltage on the battery drops. if the voltage drops below the reset threshold of the system would reset. to prevent this condition the as3647/47b monitors the battery voltage and keeps it above vin_low_v_run as follows: before a flash is started the voltage on vin is measured. if the voltage is below the setting of vin_low_v the fault_uvlo (see page 27) is set and the flash is disabled (driver stays in shutdown) if vin_low_v_shutdown =1. the flash current is reduced to flash_txmask_current if vin_low_v_shutdown =0. i 2 c commands are accepted xx 10, 01 or 11 0 standby 0 xx 00 x ext_torch_on (see page 24) not 10 0x ext_torch_on =10 1x ext_torch_on =10 external torch mode led current is defined by the 7lsb 2 bits of led_current xx 01 1 indicator mode or low current pwm mode 3 led current is defined by the 6lsb bits (bits 5...0) of led_current pwm modulated with 31.25khz defined by register inct_pwm (1/ 16...4/16) x x 10 1 assist light mode led current is defined by the 7lsb 2 bits (6...0) of led_current xx 11 1 strobe_on (see page 27) = 0 flash mode; flash duration defined by flash_timeout (see page 26) led current is defined by led_current - the current can be reduced during flash, see flash current reductions below x0->1 strobe_on = 1 and strobe_type (see page 27) = 0 x1 strobe_on = 1 and strobe_type = 1 flash mode; flash duration defined by strobe input; timeout defined by flash_timeout 1. scl low for t timeout and operating mode is indicator, assist or flash mode then shutdown mode is entered. 2. the msb bit of this register not used to protect the led; theref ore the maximum assist / to rch light current = half the maximum flash current 3. the low current mode is a general purpose pwm mode to drive less current through the led in average, but keep the actual pulsed current in a range where the light output from the led is still specified. as only the 6 lsbs of led_current are used the maximum current is limited to 1/4 of the maximum flash current. table 5. operating mode and current settings (continued) as3647/47b configuration operating mode and currents scl and sda torch strobe mode_ setting (see page 26) out_on (see page 26) condition mode led_out1/2 output current ams ag technical content still valid
www.austriamicrosystems.co m/as3647 1.5-4 17 - 37 as3647/47b datasheet, confidential - detailed description during flash, if the voltage on vin drops below the threshold defined by vin_low_v_run , the flash current is reduced (or ramping of the current is stopped during flash current startup) and fault_uvlo is set. the timing for the reduction of the current is 8s/lsb current change. during the flash pulse the actual used cu rrent can be readout by the register led_current_actual . after the flash pulse the minimum current can be readout by the register led_current_min - this allows to adjust the camera sensitivity (gain or iso-settings) for the subsequen t flash pulse (e.g. when using a pre-flash and a main flash pulse). the internal circuit for low voltage current reductions are shown in figure 21 : figure 21. low voltage current reduction internal circuit a mobile phone camera flash system can tr igger a diagnostic flash and a main-flash: the diagnostic flash is initiated by the processor. after th is diagnostic flash, the determined maximum flash current can be read back through the i 2 c interface from register led_current_min (see page 28) and used for the setting for the main flash. theref ore the current in the main-flash is constant and additionally the camera system can use this current for picture quality adjustments - the wave forms for this concept are shown in figure 22 :
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www.austriamicrosystems.co m/as3647 1.5-4 18 - 37 as3647/47b datasheet, confidential - detailed description figure 22. low voltage current reduction waveform with diagnostic-flash and main-flash phase if the diagnostic flash should be short (e.g. 10ms) it is re commended to operate this diagnostic flash at slightly higher vin_low_v_run setting compared to the main flash as shown in figure 23 : figure 23. low voltage current reduction waveform with short diagnostic-flash and main-flash phase the different settings for vin_low_v_run allow a constant main flash cu rrent without dropping vin below vin_low_v_run . flash strobe timings the flash timing are defined as follows: 1. flash duration defined by register flash_timeout and flash is started immediately when this mode is selected by the i 2 c command (see figure 24) : set strobe_on = 0, start the flash by setting out_on = 1 2. flash duration defined by register flash_timeout and flash started with a rising edge on pin strobe (see fig- ure 25) : set strobe_on = 1 and strobe_type = 0 3. flash start and timing defined by the pin strobe; the flash duration is limited by the timeout timer defined by flash_timeout (see figure 26 and figure 34 ): set strobe_on = 1 and strobe_type = 1 #$%& ' ()%*+ #$%& ' ()%*+ ,-./0

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www.austriamicrosystems.co m/as3647 1.5-4 19 - 37 as3647/47b datasheet, confidential - detailed description figure 24. as3647/47b flash duration defined by flash_timeout without using strobe input figure 25. as3647/47b flash duration defined by flash_timeout , starting flash with strobe rising edge figure 26. as3647/47b flash duration a nd start defined by strobe, limited by flash_timeout ; timer not expired figure 27. as3647/47b flash duration a nd start defined by strobe, limited by flash_timeout ; timer expired + + + ,

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www.austriamicrosystems.co m/as3647 1.5-4 20 - 37 as3647/47b datasheet, confidential - detailed description i 2 c serial data bus the as3647/47b supports the i 2 c bus protocol. a device that sends data onto the bus is defined as a transmitter and a device receiving data as a receiver. the device that cont rols the message is called a master. the devices that are controlled by the master are referred to as slaves. a master device that generates the serial clock (s cl), controls the bus access, and generates the start and stop conditions must control the bus. the as3647/47b operates as a slave on the i 2 c bus. within the bus specifications a standard mode (100khz maximum clock rate) and a fast mode (400khz maximum clock rate) are defined. the as3647/47b works in both modes. connections to the bus are made through the open-drain i/o lines sda and scl. the following bus protocol has been defined ( figure 28 ): ?? data transfer may be initiated only when the bus is not busy. ?? during data transfer, the data line must remain stable whenever the clock line is high. changes in the data line while the clock line is high are interpreted as control signals. accordingly, the following bus conditions have been defined: bus not busy both data and clock lines remain high. start data transfer a change in the state of the data line, from high to low, while the clock is high, defines a start condition. stop data transfer a change in the state of the data line, from low to high, while the clock line is high, defines the stop condition. data valid the state of the data line represents valid data when, after a start condition, the data line is stable for the duration of the high period of the clock signal. the data on the line mu st be changed during the low period of the clock signal. there is one clock pulse per bit of data. each data transfer is initiated with a start condition and te rminated with a stop condition. the number of data bytes transferred between start and stop conditions are not li mited, and are determined by the master device. the information is transferred byte-wise and each receiver acknowledges with a ninth bit. acknowledge each receiving device, when addressed, is obliged to generate an acknowledge after the reception of each byte. the master device must generate an extra clock pulse that is associated with this acknowledge bit. a device that acknowledges must pull down the sda line duri ng the acknowledge clock pulse in such a way that the sda line is stable low during the high period of the acknowledge-related clock pulse. of course, setup and hold times must be taken into account. a master must signal an end of data to the slave by not generating an acknowledge bit on the last byte that has been clocked out of the slave. in this case, the slave must leave the data line high to enable the master to generate the stop condition. ams ag technical content still valid
www.austriamicrosystems.co m/as3647 1.5-4 21 - 37 as3647/47b datasheet, confidential - detailed description figure 28. data transfer on i 2 c serial bus depending upon the state of the r/w bit, two types of data transfer are possible: 1. data transfer from a master transmitter to a slave receiver. the first byte transmitt ed by the master is the slave address. next follows a number of data bytes. the slave returns an acknowledge bit after each received byte. data is transferred with the most significant bit (msb) first. 2. data transfer from a slave transmitter to a master receiver. the master transmits the first byte (the slave address). the slave then returns an acknowledge bit, followed by the slave transmitting a number of data bytes. the master returns an acknowledge bit after all rece ived bytes other than the la st byte. at the end of the last received byte, a ?not acknowledge? is returned. the master device generates all of the serial clock pulses and the start and stop conditions. a transfer is ended with a stop condition or with a repeated start condition. since a repeated start condition is also the beginning of the next serial transfer, the bus is not released. data is transferred with t he most significant bit (msb) first. the as3647/47b can operate in the following two modes: 1. slave receiver mode (write mode): serial data and clock are received through sda and scl. after each byte is received an acknowledge bit is transmitted. start and stop conditions are recognized as the begin- ning and end of a serial transfer. address recognition is performed by hardware after reception of the slave address and direction bit (see figure 29) . the slave address byte is the first byte received after the master generates the start condition. the slave address byte contains the 7-bit as3647/47b address, which is 0110000, followed by the direction bit (r/w), which, for a write, is 0. 9 after receiving and decoding the slave address byte the device outputs an acknowledge on th e sda line. after the as3647/47b acknowledges the slave address + write bit, the master transmits a regist er address to the as3647/47b. this sets the register pointer on the as3647/47b. the master may then tran smit zero or more bytes of data, with the as3647/47b acknowledging each byte received. the address pointer wil l increment after each data byte is transferred. the master generates a stop condition to terminate the data write. 2. slave transmitter mode (read mode): the first byte is received and handled as in the slave receiver mode. however, in this mode, the direction bit indicates that t he transfer direction is reversed. serial data is transmit- ted on sda by the as3647/47b while the serial clock is input on scl. start and stop conditions are recog- nized as the beginning and end of a serial transfer ( figure 30 and figure 31 ). the slave address byte is the first byte received after the master generates a star t condition. the slave address byte contains the 7-bit as3647/47b address, which is 0110000, followed by the direction bit (r/w), which, for a read, is 1. 10 after receiving and decoding the slave address byte the devi ce outputs an acknowledge on the sda line. the as3647/47b then begins to transmit data starting with the r egister address pointed to by the register pointer. if 9. the address for writing to the as3647/47b is 60h = 01100000b 10.the address for read mode from the as3647/47b is 61h = 01100001b slave address acknowledgement signal from receiver acknowledgement signal from receiver repeated if more bytes are transferred stop condition or repeated start condition start condition scl sda msb r/w direction bit ack 1 2 6 78 9 1 2 3-7 89 ams ag technical content still valid
www.austriamicrosystems.co m/as3647 1.5-4 22 - 37 as3647/47b datasheet, confidential - detailed description the register pointer is not written to be fore the initiation of a read mode the first address that is read is the last one stored in the register pointer. the as3647/47b must receive a ?not acknowledge? to end a read. figure 29. data write - slave receiver mode figure 30. data read (from current po inter location) - slave transmitter mode figure 31. data read (write pointer, then read) - slave receive and transmit s 0110000 0 a xxxxxxxx a aa xxxxxxxx xxxxxxxx a xxxxxxxx p s - start a - acknowledge (ack) p - stop data transferred (x + 1 bytes + acknowledge) s 0110000 1 a xxxxxxxx a aa xxxxxxxx xxxxxxxx na xxxxxxxx p s - start a - acknowledge (ack) p - stop na - not acknowledge (nack) data transferred (x + 1 bytes + acknowledge) note: last data byte is followed by a nack s 0110000 0 a xxxxxxxx a 1 a 0110000 s - start sr - repeated start a - acknowledge (ack) p - stop na - not acknowledge (nack) xxxxxxxx a aa xxxxxxxx xxxxxxxx na xxxxxxxx p sr data transferred (x + 1 bytes + acknowledge) note: last data byte is followed by a nack ams ag technical content still valid
www.austriamicrosystems.co m/as3647 1.5-4 23 - 37 as3647/47b datasheet, confidential - detailed description register description table 6. chipid register addr: 0 chipid register this register has a fixed id bit bit name default access description 2:0 version xh r as3647/47b chip version number 7:3 fixed_id 10110b r this is a fixed identificat ion (e.g. to verify the i 2 c communication) table 7. current set register addr: 1 current set register this register defines design versions bit bit name default access description 7:0 led_current 9ch r/w define the current on pin led_out1/2 (combined; each current sink has identical currents) caution: assist mode uses bits 6:0 of this current setting (max. half of full current setting) indicator or low current pwm mode uses only 5:0 of this current setting (max. 1/4 of full current setting) 0h 0ma 1h 6.3ma 2h 12.5ma ... ... 3fh 393.3ma (maximum current for indicator or low current pwm mode, mode_setting =01) ... ... 7fh 796.9ma (maximum current for assist light mode, mode_setting =10) ... ... 9ch 979ma - default setting ... ... feh 1593.7ma ffh 1600ma ams ag technical content still valid
www.austriamicrosystems.co m/as3647 1.5-4 24 - 37 as3647/47b datasheet, confidential - detailed description table 9. txmask register addr: 3 txmask register this register defines the txmask settings and coil peak current bit bit name default access description 1:0 ext_torch_on 00 r/w defines operating mode for input pin txmask/torch 00 pin has no effect 01 txmask-mode; during flash if txmask/torch=1, the led current is set to flash_txmask_current - (see txmask on page 16) 10 external torch mode: if txmask/torch=1 and mode_setting =00, the as3647/47b is set into external torch mode (led current is defined by the 7lsb 1 bits of led_current ) 11 don?t use 3:2 coil_peak 10 r/w defines the maximum coil current (parameter i limit ) 00 i limit = 2.0a 01 i limit = 2.5a 10 i limit = 3.0a 11 i limit = 3.5a 7:4 flash_txmask_current 2 6h r/w define the current on pin led_out1/2 in flash mode if ext_torch_on =01 and txmask/torch=1 0h 0ma 1h 100ma 2h 201ma 3h 301ma 4h 402ma 5h 502ma 6h 602ma - default 7h 703ma 8h 803ma 9h 904ma ah 1004ma bh 1104ma ch 1205ma dh 1305ma eh 1405ma fh 1506ma 1. the msb bit of this register not used to protect the led; therefore the maximum current = half the maximum flash current 2. ams ag technical content still valid
www.austriamicrosystems.co m/as3647 1.5-4 25 - 37 as3647/47b datasheet, confidential - detailed description table 10. low voltage register addr: 4 low voltage register this register defines the operating mode with low battery voltages bit bit name default access description 2:0 vin_low_v_run 4h r/w voltage level on vin where current reduction triggers during operation (see current reduction by vin measurements in flash mode on page 16) - only in flash mode; if vin drops below this voltage during current ramp up, the current ramp up is stopped; during operation the current is decreased until the voltage on vin rises above this threshold - fault_uvlo is set 0h function is disabled 1h 3.0v 2h 3.07v 3h 3.14v 4h 3.22v - default 5h 3.3v 6h 3.38v 7h 3.47v 5:3 vin_low_v 5h r/w voltage level on vin where driver will change current before startup (only in flash mode) if before startup ( out_on set from 0 to 1), the voltage on vin is below vin_low_v , the current is changed to flash_txmask_current ( vin_low_v_shutdown =0) or 0=shutdown ( vin_low_v_shutdown =1) and fault_uvlo is set 0h function is disabled 1h 3.0v 2h 3.07v 3h 3.14v 4h 3.22v 5h 3.3v - default 6h 3.38v 7h 3.47v 6 vin_low_v_shutdown 0r/w enables shutdown of current reduction under low voltage conditions 0 if before startup ( out_on set from 0 to 1), the voltage on vin is below vin_low_v , the current is changed to flash_txmask_current and fault_uvlo is set 1 if before startup ( out_on set from 0 to 1), the voltage on vin is below vin_low_v , the operating mode stays in shutdown (zero led current) and fault_uvlo is set 7 const_v_mode 0r/w enables constant output voltage mode 0 normal operation defined by mode_setting 1 5v constant voltage mode on vout1/2; reset registers mode_setting , out_on and ext_torch_on before setting this bit ams ag technical content still valid
www.austriamicrosystems.co m/as3647 1.5-4 26 - 37 as3647/47b datasheet, confidential - detailed description table 11. flash timer register addr: 5 flash timer register this register identi fies the flash timer and timeout settings bit bit name default access description 7:0 flash_timeout 23h r/w define the duration of the flash timer and timeout timer 0h 2ms 1h 4ms 2h 6ms ... ... 23h 72ms - default ... ... 7f 256ms 80 264ms(now 8 ms lsb steps from here on) 1 81 272ms 82 280ms ... ... feh 1272ms ffh 1280ms 1. internal calculation for codes above 80h: flash timeout [ms] = ( flash_timeout -127) * 8 + 256 [ms] table 12. control register addr: 6 control register this register identifies the operating mode and includes an all on/off bit bit bit name default access description 1:0 mode_setting 00 r/w define the as3647/47b operating mode 00 shutdown or external torch mode if ext_torch_on (page 24) =10 01 indicator mode (or low current mode using pwm) led current is defined by the 6lsb bits of led_current pwm modulated with 31.25khz defined by register inct_pwm (1/16...4/16) 10 assist light mode: led current is defined by the 7lsb 1 bits of led_current 11 flash mode: led current is defined by led_current ( out_on and mode_setting are automatically cleared after a flash pulse) 2 reserved x r reserved - don?t use, always write 0 3 out_on 0r/w enables the output current sinks (pin led_out1/2) 0 outputs disabled 1 outputs enabled ( out_on and mode_setting are automatically cleared after a flash pulse) ams ag technical content still valid
www.austriamicrosystems.co m/as3647 1.5-4 27 - 37 as3647/47b datasheet, confidential - detailed description 1. the msb bit of this register not used to protect the le d; therefore the maximum assi st light current = half the maximum flash current table 13. strobe signalling register addr: 7 strobe signalling register this register defines the flash current reducing and mode for strobe bit bit name default access description 6 strobe_type 1r/w defines if the strobe input is edge or level sensitive; see also bit strobe_on (page 27) 0 strobe input is edge sensitive 1 strobe input is level sensitive 7 strobe_on 1r/w enables the strobe input 0 strobe input disabled 1 strobe input enabled in flash mode table 14. fault register addr: 8 fault register this register identifies all the di fferent fault condi tions and provide information about the led detection bit bit name default access description 0 fault_uvlo 0 r/sc 1 an undervoltage event has happened - see current reduction by vin measurements in flash mode on page 16 0no 1yes 1 reserved 0 r reserved - don?t use 2 reserved 0 r reserved - don?t use 3 fault_txmask 0 r/sc 1 txmask/torch event triggered during flash - see txmask event occurred on page 14 0no 1yes 4 fault_timeout 0 r/sc 1 see flash timeout on page 14 0n o f a u l t 1 flash timeout exceeded 5 fault_overtemp 0 r/sc 1 see overtemperature protection on page 14 0n o f a u l t 1 junction temperature limit has been exceeded 6 fault_led_short 0 r/sc 1 see short circuit protection on page 14 0no fault 1 a shorted led is detected (pin led_out1/2) 7 fault_ovp 0 r/sc 1 see overvoltage protection on page 13 0no fault 1 an overvoltage condition is detected (pin vout) ams ag technical content still valid
www.austriamicrosystems.co m/as3647 1.5-4 28 - 37 as3647/47b datasheet, confidential - detailed description 1. r/sc = read, self clear; after readou t the register is automatically cleared table 15. pwm and indicator register addr: 9 pwm and indicator register this register defines the pwm mode (e.g. for indicator) and 4/1mhz mode switching bit bit name default access description 1:0 inct_pwm 00 r/w define the as3647/47b pwm with 31.25khz operation for indicator or low current mode ( mode_setting =01) 00 1/16 duty cycle 01 2/16 duty cycle 10 3/16 duty cycle 11 4/16 duty cycle 2 freq_switch_on 0r/w exact frequency switching between 4mhz/1mhz for assist and flash modes for operation close to maximum pulsewidth 0 pulseskip operation is allowed for all modes - results in better efficiency 1 in flash and assist light mode (indicator mode or low current mode using pwm always will use pulseskip) if led_current >=40h , the dcdc is running at 4mhz or 1mhz (pulseskip is disabled) - results in improved noise performance; table 17. minimum led current register addr: eh minimum led current register this register reports the minimum led current from the last operation cycle bit bit name default access description 7:0 led_current_min 12 00h r minimum current through the curr ent sink (only including all current reductions as described in current reduction by vin measurements in flash mode excluding current reductions caused by txmask) 1. as the internal change of this register is asynchronous to the readout, it is recommended to readout the register after the flash pulse. the register will store the minimu m current through the led after e.g. a previous flash. this current can be used for a subsequent flash pulse for a safe operating range. 2. this register is only set if an actual current reduction happens ( fault_uvlo (see page 27) =1) otherwise led_current_min =0. table 18. actual led current register addr: fh actual led current register this register reports the actual set led current bit bit name default access description 7:0 led_current_actual 1 00h r actual set current through the current sink (including all current reductions as described in flash current reductions including led current ramp up/down) 1. as the internal change of this register is asynchronous to the readout, it is recommended to readout the register twice and compare the results. ams ag technical content still valid
www.austriamicrosystems.co m/as3647 1.5-4 29 - 37 as3647/47b datasheet, confidential - detailed description register map table 21. register map 1 1. always write?0? to undefined register bi ts (e.g. to bits 4..7 of register 6) register definition addr default content name b7 b6 b5 b4 b3 b2 b1 b0 chipid 0 bxh fixed_id version current set 1 9ch led_current txmask 3 68h flash_txmask_current coil_peak ext_torch_on low voltage 4 2ch const_v _mode vin_low _v_shut down vin_low_v vin_low_v_run flash timer 5 23h flash_timeout control 6 00h out_on reserve d mode_setting strobe signalling 7 c0h strobe_ on strobe_t ype fault 8 00h fault_ov p fault_le d_short fault_ov ertemp fault_ti meout fault_tx mask reserve d reserve d fault_uvl o pwm and indicator 900h freq_swi tch_on inct_pwm minimum led current eh 00h led_current_min actual led current fh 00h led_current_actual ams ag technical content still valid
www.austriamicrosystems.co m/as3647 1.5-4 30 - 37 as3647/47b datasheet, confidential - application information 9 application information external components input capacitor c vin low esr input capacitors reduce input switching noise and reduce the peak current drawn from the battery. ceramic capacitors are required for input decoupling and should be located as close to the device as is practical. if a different input capacitor is chosen, ensure similar esr value and at least 3f capacitance at the maximum input supply voltage. larger capacitor val ues (c) may be used without limitations. add a smaller capacitor in parallel to the input pin vin (e.g. murata grm155r61c104, >50nf @ 3v, 0402 size). output capacitor c vout low esr capacitors should be used to minimize vout ripple. multi-layer ceramic capacitors are recommended since they have extremely low esr and are available in small foot prints. the capacitor should be located as close to the device as is practical. x5r dielectric material is recommended due to their ability to maintain capacitance over wide voltage and temperature range. if a different output capacitor is chosen, ensure similar esr values and at least 4.2f capa citance at 5v output volt- age. table 22. recommended input capacitor part number c tc code rated voltage size manufacturer grm188r60j106me47 10 >3f@4.5v >2f@5.25v x5r 6v3 0603 murata www.murata.com lmk107bbj106ma 10 >3f@4.5v x5r 6v3 0603 taiyo yuden www.t-yuden.com table 23. recommended output capacitor part number c tc code rated voltage size manufacturer grm219r61a116u 10f +/-10% >4.2f@5v x5r 10v 0805 murata www.murata.com grm188r60j106me84 1 1. use only for vled < 3.75v 10f +/-20% >4.2f@4v x5r 6.3v 0603 (1.6x0.8x0.85mm max. 0.95mm height) ams ag technical content still valid
www.austriamicrosystems.co m/as3647 1.5-4 31 - 37 as3647/47b datasheet, confidential - application information inductor l dcdc the fast switching frequency (4mhz) of the as3647/47b allows for the use of sm all smds for the ex ternal inductor. the saturation current i saturation should be chosen to be above the maximum value of i limit 11 . the inductor should have very low dc resistan ce (dcr) to reduce the i 2 r power losses - high dcr values will reduce efficiency. if a different inductor is chosen, ensure similar dcr values and at least0.6h inductance at i limit . 11.can be adjusted in i 2 c mode with register coil_peak (see page 24) table 24. recommended inductor part number l dcr i saturation size manufacturer c3-p1.5r 1.5h 58m ? 2.4a@25oc, 2.0a 1 1. do not exceed maximum i saturation - can be ensured by setting coil_peak (will limit led current) 3x3x1.5mm (height is max.) mitsumi www.mitsumi.com lqm32pn1r0mg0 1.0h >0.6h @ 3.0a 60m ? 3.0a 2 2. flash pattern: 200ms/3a, 200ms pause, 200ms/3a, 2s then repeat again (no limit on the number of total cycles) alternative pattern with 1000ms/1.6a, 200ms pause, 200ms/3a, 200ms pause, 200m s/3a, 2s then repeat again. (no limit on the number of total cycles) 3.2x2.5x0.9 mm max 1.0mm height murata www.murata.com lqm2hpn1r0mgc 1.0h >0.6h @ 2.0a 100m ? 1.5a (2.0a) 3 3. set current limit to 2a ( coil_peak =00b) - will limit maximum output current. flash cycle limit: 150ms on, 500ms off; repeat maximum 50 times. 2.5x2.0x0.9 mm max 1.00mm height cig32w1r0mne 1.0h >0.7h @ 2.7a >0.6h @ 3.0a 60m? +/-25% 3.0a 3.2x2.5mm max 1.0mm height samsung electro- mechancs www.sem.samsung.co.kr nrh2412t1r0n 1.0h >0.6h @ 2.5a 77m ? 2.5a 4 4. set current limit to 2.5a ( coil_peak =01b) - will limit maximum output current. 2.4x2.4x1.2 mm (height is max.) taiyo yuden www.t-yuden.com ckp3225n1r0m 1.0h >0.6h @ 3.0a <60m ? 3.0a 3.2x2.5x0.9 mm max 1.0mm height mamk2520t1r0m 1.0h >0.6h @ 2.75a 45m ? 3.0a 5 5. set current limit to 3.0a ( coil_peak =10b) - can limit maximum output current. 2.5x2.0x1.2 mm height is max mdmk2020t1r0m 1.0h >0.6h @ 2.75a 56m ? 2.55a 6 6. set current limit to 2.5a ( coil_peak =01b) - will limit maximum output current. 2.0x2.0x1.2 mm height is max makk2016t1r0m 1.0h >0.6h @ 2.75a 65m ? 2.0a 7 7. set current limit to 2a ( coil_peak =00b) - will limit maximum output current. 2.0x1.6x1.0 mm height is max ams ag technical content still valid
www.austriamicrosystems.co m/as3647 1.5-4 32 - 37 as3647/47b datasheet, confidential - application information pcb layout guideline the high speed operation requires proper layout for optimum per formance. route the power traces first and try to min- imize the area and wire length of th e two high frequency/high current loops: loop1: c vin /c vin2 - l dcdc - pin sw1/2 - pin gnd - c vin /c vin2 loop2: c vin /c vin2 - l dcdc - pin sw1/2 - pin vout1/2 - c vout - pin gnd - c vin /c vin2 at the pin gnd a single via (or more vias, which are closely combined) connects to the common ground plane. this via(s) will isolate the dcdc high frequency currents from th e common ground (as most high frequency current will flow between loop1 and loop2 and will not pass the ground plane) - see the ?island? in figure 32 . figure 32. layout recommendation note: if component placement rules allow, move all compo nents close to the as3647/47b to reduce the area and length of loop1 and loop2. an additional 100nf (e.g. murata grm155r61c104, >50nf @ 3v, 0402 size) capacitor c vin2 in parallel to c vin is rec- ommended to filter high frequency noise for the power supply of as3647/47b. this capacitor should be as close as possible to the gnd/vin pins of as3647/47b.

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www.austriamicrosystems.co m/as3647 1.5-4 33 - 37 as3647/47b datasheet, confidential - application information 5v operating mode the as3647/47bcan be used to power a 5v system (e.g. audi o amplifier). the operating mode is selected by setting register bit const_v_mode (page 25) =1. in this operating mode, the current sinks are disabled and cannot be switched on (no flash/torch operation is possible). note: there is always a diode between vin and vout1/2 due to the internal circuit. therefore vout1/2 cannot be completely switched off figure 33. 5v operating mode

as3647/47b ams ag technical content still valid
www.austriamicrosystems.co m/as3647 1.5-4 34 - 37 as3647/47b datasheet, confidential - package drawings and markings 10 package drawings and markings figure 34. wl-csp13 marking as3647 note: line 1: austriamicrosystems logo line 2: as3647 line 3: encoded datecode (4 characters) figure 35. wl-csp13 package dimensions as3647 the coplanarity of the balls is 40m. as3647 !" #$% &$' ( ( ) ) ) * * + + + % % % ) ) ) * * + + + % % % ams ag technical content still valid www.austriamicrosystems.co m/as3647 1.5-4 35 - 37 as3647/47b datasheet, confidential - package drawings and markings figure 36. wl-csp15 marking as3647b note: line 1: austriamicrosystems logo line 2: as3647b line 3: encoded datecode (4 characters) figure 37. wl-csp15 package dimensions as3647b the coplanarity of the balls is 40m. ! , , , , as3647b !" # $ % % %$ & & ' ' '$ $ ( ( $ &$ ( ( ( $ $ ( $) $) % % %$ & & ' ' '$ $ $ &$ ( ams ag technical content still valid www.austriamicrosystems.co m/as3647 1.5-4 36 - 37 as3647/47b datasheet, confidential - ordering information 11 ordering information the devices are available as the standard products shown in table 25 . note: all products are rohs complian t and austriamicrosystems green. buy our products or get free samples online at icdirect: http://www.austriamicr osystems.com/icdirect technical support is found at http://www.austriamicrosystems.com/technical-support for further information and requests, please contact us mailto:sales@austriamicrosystems.com or find your local distributor at http://www.a ustriamicrosystems.com/distributor note: as3647/47b-zwlt as3647/47b- z temperature range: -30oc - 85oc wl package: wafer level chip scale package (wl-csp) 2.25x1.5x0.6mm t delivery form: tape & reel table 25. ordering information model description delivery form package AS3647-ZWLT 1600ma high current led flash driver tape & reel 13-pin wl-csp (2.25x1.5x0.6mm) 0.5mm pitch rohs compliant / pb-free / green as3647b- zwlt 1 1. check with austriamicrosystems for availability and lead time of as3647b. as3647b is only available upon request. 1600ma high current led flash driver tape & reel 15-pin wl-csp (2.25x1.5x0.5mm) 0.4mm pitch rohs compliant / pb-free / green ams ag technical content still valid www.austriamicrosystems.co m/as3647 1.5-4 37 - 37 as3647/47b datasheet, confidential - ordering information copyrights copyright ? 1997-2012, austriamicrosystems ag, schloss premstaetten, 8141 unterpremstaetten, austria-europe. trademarks registered ?. all rights reserved. the material herei n may not be reproduced, adapted, merged, trans- lated, stored, or used without the prior written consent of the copyright owner. all products and companies mentioned are trademarks or registered trademarks of their respective companies. disclaimer devices sold by austriamicrosystems ag are covered by the warranty and patent indemnification provisions appearing in its term of sale. austriamicrosystems ag makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriami- crosystems ag reserves the right to change specifications a nd prices at any time and without notice. therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems ag for current information. this product is intended for use in normal commercial a pplications. applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life- sustaining equipment are specifically not recommended without additional processing by austriamicrosystems ag for each application. for shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. the information furnished here by austriamicrosystems ag is believed to be correct and accurate. however, austriamicrosystems ag shall not be liable to recipient or any third party for any damages, in cluding but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the tech- nical data herein. no obligation or liability to recipie nt or any third party shall arise or flow out of austriamicrosystems ag rendering of technical or other services. contact information headquarters austriamicrosystems ag tobelbaderstrasse 30 schloss premstaetten a-8141 austria tel: +43 (0) 3136 500 0 fax: +43 (0) 3136 525 01 for sales offices, distributors and representatives, please visit: http://www.austriamicrosystems.com/contact ams ag technical content still valid

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