datashee t product structure silicon monolithic integrated circuit this product has not designed prot ection against radioactive rays . 1/34 tsz02201-0f1f0c100240-1-2 ? 2013 rohm co., ltd. all rights reserved. 13.feb.2014 rev.004 tsz22111 ? 14? 001 www.rohm.com led drivers for lcd backlights 1ch boost up type white led driver for large lcd bd9486f 1.1 general description bd9486f is a high efficiency driver for white leds and is designed for large lcds. bd9486f has a boost dcdc converter that employs an a rray of leds as the light source. bd9486f has some protect functions against fault conditions, such as over-voltage protection (ovp), over current limit protection of dcdc (ocp), led ocp protection, and over boost protection (fbmax). therefore it is available for the fail-safe design over a wide range output voltage. features ? dcdc converter with current mode ? vout discharge function at shutdown ? led protection circuit (over boost protection, led ocp protection) ? over-voltage protection (ovp) for the output voltage vout ? adjustable soft start ? adjustable oscillation frequency of dcdc ? wide range of analog dimming 0.2v to 3.0v ? uvlo detection for the input voltage of the power stage applications ? tv, computer display, lcd backlighting key specifications ? operating power supply voltage range:9.0v to 18.0v ? oscillator frequency of dcdc: 150khz (rt=100k ? ) ? operating current: 2.6ma(typ.) ? operating temperature range: -40c to +85c 1.2 package(s) w(typ) x d(typ) x h(max) sop16 10.00mm x 6.20mm x 1.71mm pin pitch 1.27mm figure 1. sop16 1.3 typical appli cation circuit(s) figure 2. typical application circuit
datasheet datasheet 2/34 tsz02201-0f1f0c100240-1-2 ? 2013 rohm co., ltd. all rights reserved. 13.feb.2014 rev.004 www.rohm.com tsz22111 ? 15? 001 bd9486f 1.4 absolute maximum ratings (ta=25c) parameter symbol ratings unit power supply voltage vccmax 20 v stb, ovp, uvlo, pwm, adim terminal voltage stb, ovp, uvlo, pwm, adim 20 v ss, rt, isense, fb, cs, cp, reg50 terminal voltage ss, rt, isense, fb, cs, cp, reg50 7 v dimout, gate terminal voltage dimout, gate vcc v power dissipation pd 625 (*1) mw operating temperature range topr -40 to +85 c junction temperature tjmax 150 c storage temperature range tstg -55 to +150 c *1 in the case of mounting 1 layer glass epoxy base-plate of 70mm70mm1.6mm, derate by 5.0mw/ c when operating above ta=25 c . 1.5 operating ratings parameter symbol range unit power supply voltage vcc 9.0 to 18.0 v dc/dc oscillation frequency fsw 50 to 800 khz effective range of adim signal vadim 0.2 to 3.0 v pwm input frequency fpwm 90 to 2000 hz 1.6 pin configuration 1.7 physical dimension and marking diagram figure 3. pin configuration figure4. physical dimens ion and marking diagram of sop16 bd9486f lot no.
datasheet datasheet 3/34 tsz02201-0f1f0c100240-1-2 ? 2013 rohm co., ltd. all rights reserved. 13.feb.2014 rev.004 www.rohm.com tsz22111 ? 15? 001 bd9486f 1.8 electrical characteristics (unless otherwise specified, ta=25c vcc=12v) parameter symbol limit unit condition min. typ. max. total current consumption circuit current icc 2.6 5.2 ma vstb=3.0v, pwm=3.0v, gate=l,ireg50=0ma circuit current (standby) ist 40 80 a vstb=0v uvlo block operation voltage vcc vuvlo_vcc 6.5 7.5 8.5 v vcc=sweep up hysteresis voltage vcc vuhys_vcc 150 300 600 mv vcc=sweep down uvlo release voltage vuvlo 2. 88 3.00 3.12 v vuvlo=sweep up uvlo hysteresis voltage vuhys 250 300 350 mv vuvlo=sweep down uvlo pin leak current uvlo_lk -2 0 2 a vuvlo=4.0v dc/dc block isense threshold voltage 1 vled1 0.225 0.233 0.242 v vadim=0.7v isense threshold voltage 2 vled2 0.656 0.667 0.677 v vadim=2.0v isense threshold voltage 3 vled3 0.988 1.000 1.012 v vadim=3.0v isense clamp voltage vled4 0.989 1.015 1.040 v vadim=3.3v (at masked analog dimming) oscillation frequency fct 142.5 150 157.5 khz rt=100k ? rt short protection range rt_det -0.3 - vrt 90% v rt=sweep down rt terminal voltage vrt 1.6 2.0 2.4 v rt=100k ? rt pin on resistance at off rrt_l - 2.0 4.0 k ? at latch off gate pin max duty output max_duty 90 95 99 % rt=100k ? gate pin on resistance (as source) ronso 2.5 5.0 10.0 ? gate pin on resistance (as sink) ronsi 2.0 4.0 8.0 ? ss pin source current i ssso -3.75 -3.0 -2.25 a vss=2.0v ss pin on resistance at off rss_l - 3.0 5.0 k ? soft start ended voltage vss_end 3.52 3.70 3.88 v ss=sweep up fb source current ifbso -115 -100 -85 a visense=0.2v, vadim=3.0v, vfb=1.0v fb sink current ifbsi 85 100 115 a visense=2.0v, vadim=3.0v, vfb=1.0v ocp detect voltage vcs 360 400 440 mv cs=sweep up ocp latch off detect voltage vcs 0.85 1.00 1.15 v cs=sweep up dc/dc protection block ovp detect voltage vovp 2.88 3.00 3.12 v vovp sweep up ovp detect hysteresis vovp_hys 150 200 250 mv vovp sweep down ovp pin leak current ovp_lk -2 0 2 a vovp=4.0v, vstb=3.0v
datasheet datasheet 4/34 tsz02201-0f1f0c100240-1-2 ? 2013 rohm co., ltd. all rights reserved. 13.feb.2014 rev.004 www.rohm.com tsz22111 ? 15? 001 bd9486f 1.8 electrical characteristics (unless otherwise specified, ta=25c vcc=12v) parameter symbol limit unit condition min. typ. max. led protection block led ocp detect voltage vledocp 2.88 3.0 3.12 v visense=sweep up over boost detection voltage vfbh 3.84 4.00 4.16 v vfb=sweep up dimming block adim pin leak current iladim -2 0 2 a vadim=2.0v isense pin leak current il_isense -2 0 2 a visense=4.0v dimout source on resistance ronso 5.0 10 20 ? dimout sink on resistance ronsi 4.0 8.0 16 ? reg50 block reg50 output voltage 1 reg50 _1 4.95 5.00 5.05 v io=0ma reg50 output voltage 2 reg 50_2 4.925 5.00 5.075 v io=-5ma reg50 available current | ireg50 | 5 - - ma reg50_uvlo detect voltag e reg50_th 2.0 2.3 2.6 v vreg50=sweep down vstb=0v reg50 discharge current reg50_dis 3.0 5.0 7.0 a stb=on->off, reg50=4.0v, pwm=l stb block stb pin high voltage stbh 2.0 - 18 v stb pin low voltage stbl -0.3 - 0.8 v stb pull down resistance rstb 600 1000 1400 k ? vstb=3.0v pwm block pwm pin high voltage pwm_h 1.5 - 18 v pwm pin low voltage pwm_l -0.3 - 0.8 v pwm pin pull down resistance rpwm 600 1000 1400 k ? vpwm=3.0v fail block cp detect voltage vcp 2.85 3.0 3.15 v vcp=sweep up cp charge current icp 2.7 3.0 3.3 a
datasheet datasheet 5/34 tsz02201-0f1f0c100240-1-2 ? 2013 rohm co., ltd. all rights reserved. 13.feb.2014 rev.004 www.rohm.com tsz22111 ? 15? 001 bd9486f 2.1 pin function no. pin name in/out function rating [v] 1 reg50 out 5.0v output voltage pin and shutdown timer pin -0.3 to 7 2 stb in ic on/off pin -0.3 to 20 3 ovp in over voltage protection detection pin -0.3 to 20 4 uvlo in under voltage lock out detection pin -0.3 to 20 5 ss out slow start setting pin -0.3 to 7 6 pwm in external pwm dimming signal input pin -0.3 to 20 7 cp out charge timer for abnormal state -0.3 to 7 8 adim in adim signal input pin -0.3 to 20 9 rt out dc/dc switching frequency setting pin -0.3 to 7 10 fb out error amplifier output pin -0.3 to 7 11 isense in led current detection input pin -0.3 to 7 12 gnd - - 13 dimout out dimming signal output for nmos -0.3 to vcc 14 gate out dc/dc switchi ng output pin -0.3 to vcc 15 cs in dc/dc output current detect pin, ocp input pin -0.3 to 7 16 vcc in power supply pin -0.3 to 20
datasheet datasheet 6/34 tsz02201-0f1f0c100240-1-2 ? 2013 rohm co., ltd. all rights reserved. 13.feb.2014 rev.004 www.rohm.com tsz22111 ? 15? 001 bd9486f 2.2 pin esd type ovp uvlo ss uvlo 50k 5v rt reg50 cp reg50 adim fb dimout / vcc 20k 5v adim vcc dimout gnd 100k vcc gate / vcc / cs pwm / stb isense vcc gate gnd cs 100k vcc pwm 1m 100k 5v stb 1m 100k 5v figure 5. pin esd type
datasheet datasheet 7/34 tsz02201-0f1f0c100240-1-2 ? 2013 rohm co., ltd. all rights reserved. 13.feb.2014 rev.004 www.rohm.com tsz22111 ? 15? 001 bd9486f 2.3 block diagram figure 6. block diagram
datasheet datasheet 8/34 tsz02201-0f1f0c100240-1-2 ? 2013 rohm co., ltd. all rights reserved. 13.feb.2014 rev.004 www.rohm.com tsz22111 ? 15? 001 bd9486f 2.4 typical performance curves (reference data) figure 7. circuit current (active) figure 8. fsw vs rt characteristic figure 9. fb sink current vs fb voltage characteristic figure 10. fb source current vs fb voltage characteristic figure 11. isense feedback voltage vs adim voltage characteristic
datasheet datasheet 9/34 tsz02201-0f1f0c100240-1-2 ? 2013 rohm co., ltd. all rights reserved. 13.feb.2014 rev.004 www.rohm.com tsz22111 ? 15? 001 bd9486f 2.5 pin description pin 1: reg50 this is the 5.0v(typ.) output pin. available current is 5ma (min). and this terminal is also used as timer for discharging dcdc output capacitor. please refer to section 3.2.2 shutdown method and reg50 capacitance setting?, for detailed explanation. pin 2: stb this is the on/off setting terminal of the ic. input reset-signal to this terminal to reset ic from latch-off. at startup, internal bias starts at high level, a nd then pwm dcdc boost starts after pwm rise edge inputs. note: ic status (ic on/off) transits depending on the voltage inputted to stb terminal. avoid the use of intermediate level (from 0.8v to 2.0v). in order to discharge output voltag e while stb=l and reg50uvlo=h, dimo ut can assert high, depending on pwm logic. about discharge behavior at end, please refer to sect ion ?3.5.3 timing chart? or section ?3.2.2 shutdown method and reg50 capacitance setting?. pin 3: ovp the ovp terminal is the input for over-voltage protection. if ovp is more than 3.0v(typ ), the over-voltage protection (ovp) will work. at the moment of thes e detections, it sets gate=l, dimout=l and starts to count up the abnormal interval. if ovp detection continued to count four gate clocks, ic reaches latch off. (please refer to ?3.5.5 timing chart?) the ovp pin is high impedance, because the internal resistance is not connected to a certain bias. even if ovp function is not used, pin bias is still required because the open connection of this pin is not a fixed potential. the setting example is separately described in the section ?3.2.7 ovp setting?. as pwm=l interval, ic operates to keep the ovp pin voltage therefore the output voltage. please refer the section ?tbd the retaining function of the output voltage?. pin 4: uvlo under voltage lock out pin is the input voltage of the power st age. , ic starts the boost operat ion if uvlo is more than 3.0v(typ) and stops if lower than 2.7v(typ). the uvlo pin is high impedance, because the inter nal resistance is not connected to a certain bias. even if uvlo function is not used, pin bias is still required because the open connection of this pin is not a fixed potential. the setting example is separately described in the section ?3.2.6 uvlo setting? pin 5: ss this is the pin which sets the soft start interval of dc/ dc converter. it performs the c onstant current charge of 3.0 a to external capacitance css. the switching duty of gate out put will be limited during 0v to 3.7v of the ss voltage. so the soft start interval tss can be expressed as follows tss = 1.23*10 6 *css css: the external capacitance of the ss pin . the logic of ss pin asserts low is defined as the latch-off state or pwm is not input high level after stb reset release. when ss capacitance is under 1nf, take note if the in-rush curr ent during startup is too large, or if over boost detection (fbmaxi) mask timing is too short. please refer to soft start behavior in the section ?3.5.4 timing chart ?. pin 6: pwm this is the pwm dimming signal input terminal. the high / low level of pwm pins are the following. state pwm input voltage pwm=h pwm=1.5v to 18.0v pwm=l pwm= \0.3v to 0.8v pin 7: cp timer pin for counting the abnormal state of the over boost protection (fbmax). if the abnormal state is detected, the cp pin starts charging the external capacitance by 3 a. as the cp voltage reaches 3.0v, ic will be latched off. (gate=l, dimout=l). please refer to section 3.2.8 interval until latch off setting?, for detailed explanation. pin 8: adim this is the input pin for analog dimming signal. the isense feedb ack point is set as 1/3 of this pin bias. if more than 3.0v is input, isense feedback voltage is clamped to limit to flow led large current. in this condition, the input current is caused. please refer to terminal explanation.
datasheet datasheet 10/34 tsz02201-0f1f0c100240-1-2 ? 2013 rohm co., ltd. all rights reserved. 13.feb.2014 rev.004 www.rohm.com tsz22111 ? 15? 001 bd9486f pin 9: rt this is the dc/dc switching frequency setting pin. dcdc frequency is decided by connected resistor. the relationship between the frequency and rt resistance value (ideal) the oscillation setting ranges from 50khz to 800khz. the setting example is separately described in the section ?3.2.5 dcdc oscillation frequency setting? the fail logic indicating the abnormal state can be obtained by using the right circuit example. the gate capacitor is limited to 200pf. we recommend re1c001vn for m1.the rt pin output the 2.0v(typ.) in the normal state and drops to 0v in the latch off state. w hen reg50 reaches to 0v,there is a point that fail output voltage is uns table, if this is a problem, please add c1 capacitor. please refer to section ?2.7 behavior list of the protect functions? or ?3.5 timing chart?. pin 10: fb this is the output terminal of error amplifier. fb pin rises with the same slope as the ss pin during the soft-start period. after soft -start completion (ss>3.7v), it operates as follows. when pwm=h, it detects isense terminal voltage and outputs error signal compared to analog dimming signal (adim). it detects over boost (fbmax) over fb=4.0v(typ). after the ss completion, if fb>4.0v and pwm=h continues 4clk gate, the cp charge starts. after that, only the fb>4.0v is monitored, if cp charge continues to the cp=3.0v, ic will be latched off. (please refer to section ?3.5.6 timing chart?.) the loop compensation setting is described in section "3.4 loop compensation". pin 11: isense this is the input terminal for the current detection. error amplifier compares the lower one among 1/3 of the voltage terminal adim analog dimming and 1.0v(typ). and it detects abnormal led overcurrent at isense=3.0v(typ) over. if gate terminal continues during four clks (equivalent to 40 s at fosc = 100khz), it becomes latch-off. (please refer to section ?3.5.7 timing chart?.) adim[v] 0 3.0 1.0v gain=1/3 0.2 error amp vth[v] 67mv 1.015v 3.3 figure 13. relationship of the feedback voltage and adim figure 14. isense terminal circuit example pin 12: gnd this is the gnd pin of the ic. ]k[ ]khz[f r sw rt ? ? 15000 figure 12. rt terminal circuit example ch1: stb ch2: reg50 ch3: fail
datasheet datasheet 11/34 tsz02201-0f1f0c100240-1-2 ? 2013 rohm co., ltd. all rights reserved. 13.feb.2014 rev.004 www.rohm.com tsz22111 ? 15? 001 bd9486f pin 13: dimout this is the output pin for external dimming nmos. the table below shows the rough output logic of each operation state, and the output h level is vcc. please refer to ?3.5 timing chart? for detailed explanations, because dimout logic has an exceptional behavior. please insert the resistor r dim between the dimming mos gate to improv e the over shoot of led current, as pwm turns from low to high. status dimout output normal same logic to pwm abnormal gnd level pin 14: gate this is the output terminal for driving t he gate of the boost mosfet. the high level is vcc. frequency can be set by the resistor connected to rt. refer to |