View ADA4084-2ARMZ_7575492.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

30 v, low noise, rail - to - rail i/o, low power operational amplifier data sheet ada4084 - 2 rev. c document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specif ications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 ? 2011 C 2013 analog devices, inc. all rights reserved. technical support www.analog.com features rail - to - r ail i nput/ o utput low p ower: 625 a typ ical gain bandwidth product : 15.9 mhz at a v = 100 typ ical unity - gain crossover: 9.9 mhz typ ical ? 3 db c losed - l oop b andwidth: 13.9 mhz typ ical at 15 v low offset voltage: 100 v max imum ( soic ) unity - ga in stable high slew rate: 4.6 v/s typ ical low noise: 3.9 nv/hz typical at 1 khz applications battery - powered instrumentation power supply control and protection telecom munications dac output amplifier adc input buffer general description the ada40 84 - 2 is a dual, s ingle - supply, 10 mhz bandwidth amplifier featuring rail - to - rail inputs and outputs. it is guaran - teed to operate from 3 v to 3 0 v (or 1 .5 v to 1 5 v). these amplifiers are well suited for single - sup ply applications requiring both ac and precision dc performance. the combina - tion of wide bandwidth, low noise, and precision makes the ada4084 - 2 useful in a wide variety of applications, including filters a nd instrumentation. other applications for these amplifiers include portable telecom - munications equipment, power supply control and protection, and use as amplifiers or buffers for transducers with wide output ranges. sensors requiring a rail - to - rail inp ut ampli fier include hall effect, piezo electric, and resistive transducers. the ability to swing rail - to - rail at both the input and output enables designers to build multistage filters in single - supply systems and to maintain high signal - to - noise ratios. t he ada4084 - 2 is s pecified ov er the industrial temperature range of ?40c to +125c . the dual ada4084 - 2 is available in the 8 - lead soic , msop , and lfcsp surface - mo unt package s. pin configuration 1 2 3 4 8 7 6 5 out b ?in b +in b v+ out a ?in a +in a v? ada4084-2 top view (not to scale) notes 1. for the lfscp package the exposed pad must be connected to v?. 08237-001 figure 1. 8 - lead msop (rm ) 8- lead soic ( r ) 8- lead lfcsp (cp) the ada4084 - 2 is a member of a growing series of high voltage, low noise op amp s offered by analog devices, inc., (see table 1 ). for a more complete selection table of low input voltage noise amplifiers , see the a n - 940 application note, low noise amplifier selecti on guide for optimal noise performance, available at www.analog.com . table 1 . low noise op amps voltage noise single dual quad 1.1 nv/hz ad8597 ad8599 1.8 nv/hz ada4004 -1 ada4004 -2 ada4004 -4 2.8 nv/hz rro 1 ad8675 ad8676 2.8 nv/hz ad8671 ad8672 ad8674 3.2 nv/hz op27 / op37 3.9 nv/hz rrio 2 ada4084 -2 1 rail - to - rail output. 2 rail - to - rail input/output.
ada4084-2 data sheet rev. c | page 2 of 28 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 pin configuration ............................................................................. 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 electrical characteristics ............................................................. 3 absolute maximum ratings ............................................................ 6 thermal resistance ...................................................................... 6 esd caution .................................................................................. 6 typical performance characteristics ............................................. 7 1.5 v characteristics .................................................................. 7 5 v characteristics ................................................................... 12 15 v characteristics ................................................................ 17 applications information .............................................................. 22 functional description .............................................................. 22 startup characteristics .............................................................. 23 input protection ......................................................................... 23 output phase reversal ............................................................... 23 designing low noise circuits in single-supply applications ................................................................................ 24 comparator operation .............................................................. 24 outline dimensions ....................................................................... 25 ordering guide .......................................................................... 26 revision history 4/13rev. b to rev. c changes to figure 48 caption ........................................................ 15 updated outline dimensions ........................................................ 25 6/12rev. a to rev. b added lfcsp package ....................................................... universal changes to figure 1 ........................................................................... 1 changes to output voltage high parameter, table 4 ................... 5 added figure 5 and figure 7, renumbered sequentially ............ 7 added figure 30 and figure 32...................................................... 12 added figure 55 and figure 57...................................................... 17 added startup characteristics section ......................................... 23 moved figure 78 .............................................................................. 23 changes to output phase reversal section and comparator operation section ............................................................................ 24 updated outline dimensions ........................................................ 25 changes to ordering guide ........................................................... 26 2/12rev. 0 to rev. a changes to data sheet title ............................................................. 1 changes to voltage range in general description ....................... 1 changes to supply current/amplifier parameter, table 2 .......... 3 changes to common-mode rejection ratio parameter, table 3 .. 4 changes to common-mode rejection ratio parameter, table 4 .. 5 changes to figure 2 ........................................................................... 6 changes to figure 24 ...................................................................... 10 changes to figure 32 ...................................................................... 12 changes to figure 47 ...................................................................... 14 changes to figure 55 ...................................................................... 16 changes to figure 62 ...................................................................... 17 changes to figure 73 ...................................................................... 20 10/11revision 0: initial version
data sheet ada4084- 2 rev. c | page 3 of 28 specifications electrical character istics v s y = 3 v, v cm = 1.5 v, t a = 25c, unless otherwise noted. table 2 . parameter symbol test conditions /comments min typ max unit input characteristics offset voltage v os soic package 100 v ? 40c t a +125c 200 v msop package 130 v ? 40c t a +125c 250 v lfcsp package 200 v ? 40c t a +125c 300 v offset voltage drift v os /t ? 40c t a +125c 0.5 1.75 v/c offset voltage matching c hannel a vs. channel b, t a = 25c 150 v input bias current i b 140 300 na C 40c t a +125c 450 na input offset current i os 25 na C 40c t a +125c 50 na input voltage range 0 3 v common - mode rejection ratio cmrr v cm = 0 v to 3 v 64 80 db ? 40c t a +125c 60 db large signal voltage gain a vo r l = 2 k?, 0.5 v v o 2.5 v 100 104 db r l = 2 k?, ?40c t a +125c 97 db input impedance, differential 100||1.1 k?||pf input impedance, common - mod e 80||2.9 m?||pf output characteristics output voltage high v oh r l = 10 k? to v cm 2.85 2.95 v C 40c t a +125c 2.8 v r l = 2 k? to v cm 2.8 2.9 v C 40c t a +125c 2.7 v output voltage low v ol r l = 10 k? to v cm 10 20 m v C 40c t a +125c 40 mv r l = 2 k? to v cm 50 mv C 40c t a +125c 75 mv short - circuit current i sc ? 17/+10 ma power supply power supply rejection ratio psrr v sy = 1.25 v to 1.75 v 100 110 db C 40c t a +125 c 90 db supply current/amplifier i sy i o = 0 ma 565 650 a C 40c t a +125c 950 a dynamic performance slew rate sr r l = 2 k? 2.0 2.6 v/s gain bandwidth product gbp v in = 5 mv p - p, r l = 10 k?, a v = 100 15.4 mhz unity - gain crossover ugc v in = 5 mv p - p, r l = 10 k?, a v = 1 8.08 mhz phase margin m 86 degrees ? 3 db closed - loop bandwidth ? 3 db a v = 1, v in = 5 mv p -p 12.3 mhz noise performance voltage noise e n p - p 0.1 hz to 10 hz 0.14 v p -p vol tage noise density e n f = 1 khz 3.9 nv/hz current noise density i n f = 1 khz 0.55 pa/hz
ada4084- 2 data sheet rev. c | page 4 of 28 v s y = 5 .0 v, v cm = 0 v, t a = 25c, unless otherwise noted. table 3 . parameter symbol conditions min typ max unit input characte ristics offset voltage v os soic package 100 v ? 40c t a +125c 250 v msop package 1 30 v ? 40c t a +125c 2 50 v lfcsp package 200 v ? 40c t a +125c 300 v offset voltage drift v os /t ? 40c t a +125c 0.5 1.75 v/c offset voltage matching channel a vs. channel b, t a = 25c 150 v input bias current i b 140 300 na ? 40c t a +125c 450 na input offset current i os 25 na ? 40c t a +125c 50 na input voltage range ? 5 +5 v common - mode rejection ratio cmrr v cm = 4 v 106 124 db v cm = 5 v , ?40c t a +125c 76 db large signal voltage gain a vo r l = 2 k?, ?4 v v o 4 v 108 112 db r l = 2 k?, ?40c t a +125c 103 db input impedance, different ial 100||1.1 k?||pf input impedance, common - mode 200||2.5 m?||pf output characteristics output voltage high v oh r l = 10 k? to v cm 4.9 4.95 v ? 40c t a +125c 4.8 v r l = 2 k? to v cm 4.8 4.85 v ? 40c t a +125c 4.7 v output voltage low v ol r l = 10 k? to v cm ? 4.95 ? 4.9 v ? 40c t a +125c ? 4.8 v r l = 2 k? to v cm ? 4.95 ? 4.8 v ? 40c t a +125c ? 4.7 v short circuit current i sc ? 24/+17 ma power supply power supply rejection ratio ps rr v s y = 2 v to 18 v 110 120 db ? 40c t a +125c 105 db supply current/amplifier i sy i o = 0 ma 595 700 a ? 40c t a +125c 1000 a dynamic performance slew rate sr r l = 2 k? to v cm 2.4 3.7 v/s gain bandwidth product gbp v in = 5 mv p - p, r l = 10 k?, a v = 100 15.9 mhz unity - gain crossover ugc v in = 5 mv p - p, r l = 10 k?, a v = 1 9.6 mhz phase margin m 85 degrees ? 3 db closed - loop bandwidth ? 3 db a v = 1, v in = 5 mv p -p 13.9 mhz noise performance voltage noise e n p - p 0.1 hz to 10 hz 0.14 v p - p voltage noise density e n f = 1 khz 3.9 nv/hz current noise density i n 0.55 pa/hz
data sheet ada4084- 2 rev. c | page 5 of 28 v s y = 15.0 v, v cm = 0 v, t a = 25c, unless otherwise noted. table 4 . parameter sy mbol conditions min typ max unit input characteristics offset voltage v os soic package 100 v ? 40c t a +125c 200 v msop package 1 3 0 v ? 40c t a +125c 250 v lfcsp package 200 v ? 40c t a +125c 300 v offset voltage drift v os /t 0.5 1.75 v/c offset voltage matching channel a vs. channel b, t a = 25c 150 v input bias current i b 140 300 na ? 40c t a +125c 450 na input offset current i os 25 na ? 40c t a +125c 50 na input voltage range ? 15 +15 v common - mode rejection ratio cmrr v cm = 14 v 106 124 db v cm = 15 v , ?40c t a +125c 85 db large signal voltage gain a vo r l = 2 k?, ?13.5 v v o +13.5 v 110 117 db ? 40c t a +125c 105 db input impedance, differential 100||1.1 k?||pf input impedance, common - mode 200||2.5 m?||pf output characteristics output voltage high v oh r l = 10 k? to v cm 14.8 14.9 v ? 40c t a +125c 14.8 v r l = 2 k? to v cm 14.5 14.6 v ? 40c t a +125c 14. 0 v output voltage low v ol r l = 10 k? to v cm ? 14.95 ? 14.9 v ? 40c t a +125c ? 14.8 v r l = 2 k? to v cm ? 14.9 ? 14.8 v ? 40c t a +125c ? 14.7 v short circuit current i sc 30 ma power supply pow er supply rejection ratio psrr v s y = 2 v to 18 v 110 120 db ? 40c t a +125c 105 db supply current/amplifier i sy i o = 0 ma 625 750 a ? 40c t a +125c 1050 a dynamic performance slew rate sr r l = 2 k? 2.4 4.6 v/s gain bandwidth product gbp v in = 5 mv p - p, r l = 10 k?, a v = 100 15.9 mhz unity - gain crossover ugc v in = 5 mv p - p, r l = 10 k?, a v = 1 9.9 mhz phase margin m 86 degrees ? 3 db closed - loop bandwidth ? 3 db a v = 1, v in = 5 mv p -p 13.9 mhz noise performance voltage noise e n p - p 0.1 hz to 10 hz 0.1 v p - p voltage noise density e n f = 1 khz 3.9 nv/hz current noise density i n 0.55 pa/hz
ada4084- 2 data sheet rev. c | page 6 of 28 absolute maximum rat ings table 5 . parameter rating supply voltage 18 v input voltage v? v in v+ differential input voltage 1 0.6 v output short - circuit duration to gnd indefinite storage temperature range ? 65c to +150c operating temperature range ? 40c to +125c junction temperature range ? 65 c to +150c lead temperature (soldering 60 sec) 300c 1 for input differential voltages greater than 0.6 v, the input current should be limited to less than 5 ma to prevent degradation or destruction of the input devices. stresses above those listed und er absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. e xposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance ja is specified for the device soldered on a 4 - layer jedec standard printed circuit board (pcb) with zero airflow. table 6 . thermal resistance package type ja jc unit 8 - lead soic 121 43 c/w 8 - lead m so p 142 45 c/w 8 - lead lfcsp 1 55 6 c/w 1 n umbers are based on 4 - layer jedec thermal boards with the exposed pad soldered to the pcb . esd caution d2 d101 d100 d5 d4 d1 q1 q4 q3 q24 q21 d20 q13 q18 q19 q23 q2 folded cascade v ee v out v cc v bias mirror 08237-002 r4 r5 r6 r7 c2 c1 r1 r2 r3 figure 2 . simplified schematic
data sheet ada4084- 2 rev. c | page 7 of 28 typical performance characteristics t a = 25c, unless otherwise noted. 1.5 v characteristi cs 120 0 ?100 ?50 50 0 100 number of amplifiers v os (v) 20 40 60 80 100 ada4084-2 v sy = 1.5v t a = 25c r l = ?25 25 ?75 75 08237-003 figure 3 . input offset voltage distribution , soic 50 0 ?100 ?50 ?25 25 ?75 75 50 0 100 number of amplifiers v os (v) ada4084-2 v sy = 1.5v t a = 25c r l = 5 10 15 20 25 30 35 40 45 08237-004 figure 4 . input offset voltage distribution , msop 0 50 100 150 200 ?200 ?150 ?100 ?50 0 50 100 number of amplifiers v os (v) 08237-081 v sy = 1.5v t a = 25c r l = figure 5 . input offset voltage distribution, lfcsp 60 0 0 2.0 number of amplifiers tcv os (v/c) ada4084-2 v sy = 1.5v t a = 25c r l = C40 t a +125c 10 20 30 40 50 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 08237-005 figure 6 . tcv os distribution , soic and msop 0 5 10 15 20 25 30 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 number of amplifiers tcv os ( v/c) 08237-082 ada4084-2 v sy = 1.5v t a = 25c r l = C40 t a +125c figure 7 . tcv os dist ribution, lfcsp 500 ?500 0 0.50 0.75 1.00 1.25 1.50 0.25 3.00 2.75 2.50 2.25 2.00 1.75 input offset voltage (v) common-mode voltage (v) ?400 ?300 ?200 ?100 0 100 200 300 400 ada4084-2 v sy = 1.5v t a = 25c r l = 08237-006 figure 8 . input offset voltage vs. common - mode voltage
ada4084- 2 data sheet rev. c | page 8 of 28 ?50 ?100 ?150 ?200 ?250 ?40 125 input bias (na) temperature (c) ?25 ?10 5 20 35 50 65 80 95 110 ada4084-2 v sy = 1.5v v cm = 0v r l = i b + i b ? 08237-007 figure 9 . input bias current vs. temperature 600 ?600 ?1.5 ?1.0 1.0 ?0.5 0.5 0 1.5 input bias (na) v cm (v) ?400 ?200 0 200 400 t a = +85c t a = +25c t a = +125c t a = ?40c ada4084-2 v sy = 1.5v 08237-008 figure 10 . input bias current vs. v cm and temperature 1000 100 10 1 0.001 0.01 0.1 1 10 v do (mv) load current (ma) ada4084-2 v sy = 1.5v t a = 25c (v+) ?v oh 08237-009 figure 11 . dropout voltage vs. source current 1000 100 10 1 0.001 0.01 0.1 1 10 v do (mv) load current (ma) ada4084-2 v sy = 1.5v t a = 25c v ol ? (v?) 08237-010 figure 12 . dropout voltage vs. sink current 120 ?40 270 ?90 0.1 100k gain (db) phase (degrees) frequency (khz) ?45 0 45 90 135 180 225 ?20 20 0 40 60 80 100 1 10 100 1k 10k ada4084-2 v sy = 1.5v t a = 25c r l = 10k? 08237-0 1 1 figure 13 . open - loop gain and phase vs. frequency 60 ?20 10 100m gain (db) frequency (hz) ?10 0 10 20 30 40 50 100 1k 10k 100k 10m 1m a v = +100 a v = +10 a v = +1 ada4084-2 v sy = 1.5v t a = 25c 08237-012 figure 14 . closed - loop gain vs. frequency
data sheet ada4084- 2 rev. c | page 9 of 28 1000 100 10 1 0.10 0.01 10 100m z out (?) frequency (hz) 100 1k 10k 100k 10m 1m ada4084-2 v sy = 1.5v t a = 25c a v = +10 a v = +100 a v = +1 08237-013 figure 15 . output impedance vs. frequency 140 ?20 10 100m psrr (db) frequency (hz) 0 20 40 60 80 100 120 100 1k 10k 100k 10m 1m ada4084-2 v sy = 1.5v t a = 25c psrr? psrr+ 08237-014 figure 16 . psrr vs. frequency 120 20 10 100m cmrr (db) frequency (hz) 100 1k 10k 100k 10m 1m ada4084-2 v sy = 1.5v t a = 25c 30 40 50 60 70 80 90 100 110 08237-015 figure 17 . cmrr vs. frequency 1.5 1.0 0.5 0 ?1.5 ?1.0 ?0.5 0 2 4 6 8 10 12 14 16 18 voltage (v) time (s) ada4084-2 v sy = 1.5v t a = 25c r l = 2k? c l = 100pf 08237-016 figure 18 . large signal transient response 80 60 40 20 0 ?80 ?60 ?40 ?20 0 18 voltage (mv) time (s) ada4084-2 v sy = 1.5v t a = 25c r l = 2k? c l = 100pf 08237-017 2 4 6 8 10 12 14 16 figure 19 . small signal transient response 2 ?10 ?8 ?6 ?4 ?2 0 0.08 ?0.04 ?0.02 0 0.02 0.04 0.06 ?1 0 2 1 4 3 7 8 6 5 9 voltage (v) voltage (v) time (s) ada4084-2 v sy = 1.5v t a = 25c output input 08237-018 figure 20 . settling time
ada4084- 2 data sheet rev. c | page 10 of 28 10 4 1 1 10 100 1k 10k 100k voltage noise density (nv/hz) frequency (hz) ada4084-2 v sy = 1.5v t a = 25c 08237-019 figure 21 . voltage noise density 60 50 40 30 20 10 0 1 1000 100 10 overshoot (%) capacitance (pf) ada4084-2 v sy = 1.5v v in = 100mv p-p r l = 2k? t a = 25c os+ os? 08237-020 figure 22 . overshoot vs. capacitance 80 ?80 0 1 2 3 4 5 6 7 8 9 10 voltage noise (nv) time (seconds) ?60 ?40 ?20 0 20 40 60 ada4084-2 v sy = 1.5v t a = 25c 08237-021 figure 23 . voltage noise 0.1 hz to 10 hz 0 ?160 ?140 ?120 ?100 ?80 ?60 ?40 ?20 100 1k 10k 100k channel separation (db) frequency (hz) ada4084-2 v sy = 1.5v t a = 25c v in = 1v p-p 08237-022 figure 24 . channel separation 1 0.1 0.01 0.001 0.001 0.01 0.1 1 thd + n (%) amplitude (v rms ) ada4084-2 v sy = 1.5v t a = 25c f = 1khz 08237-023 figure 25 . thd + n vs. amplitude 0.01 0.001 0.0001 10 100 1k 10k 100k thd + n (%) frequency (hz) ada4084-2 r l = 2k? v in = 0.4v rms v sy = 1.5v t a = 25c 500khz filter 08237-024 figure 26 . thd + n vs. frequency
data sheet ada4084- 2 rev. c | page 11 of 28 2.0 ?2.0 0 1000 voltage (v) time (s) ?1.5 ?1.0 ?0.5 0 0.5 1.0 1.5 100 200 300 400 500 600 700 800 900 ada4084-2 v sy = 1.5v t a = 25c output input 08237-025 figure 27 . no phase reversal
ada4084-2 data sheet rev. c | page 12 of 28 5 v characteristics 120 0 ?100 ?50 50 ?25 25 0 ?75 75 100 number of amplifiers v os (v) 20 40 60 80 100 ada4084-2 v sy = 5v t a = 25c r l = 08237-026 figure 28. input offset voltage distribution soic 60 0 ?100 100 number of amplifiers v os (v) 10 20 30 40 50 ?50 50 ?25 25 0 ?75 75 ada4084-2 v sy = 5v t a = 25c r l = 08237-027 figure 29. input offset vo ltage distribution msop 0 50 100 150 200 250 ?200 ?150 ?100 ?50 0 50 100 number of amplifiers v os (v) 08237-080 v sy = 5v t a = 25c r l = figure 30. input offset voltage distribution, lfcsp 50 0 02.0 number of amplifiers tcv os (v/c) 5 10 15 20 25 30 35 40 45 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 ada4084-2 v sy = 5v r l = ?40 t a +125c 08237-028 figure 31. tcv os distribution, soic and msop 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 number of amplifiers tcv os (v/c) 0 5 10 15 20 25 30 35 08237-084 ada4084-2 v sy = 5v r l = ?40 t a +125c figure 32. tcv os distribution, lfcsp 600 ?600 ?5 5 input offset voltage (v) common-mode voltage (v) ?400 ?500 ?300 ?200 ?100 0 100 200 300 400 500 ada4084-2 v sy = 5v t a = 25c r l = ?4 ?3 ?2 ?1 0 1 2 3 4 08237-029 figure 33. input offset voltage vs. common-mode voltage
data sheet ada4084- 2 rev. c | page 13 of 28 ?50 ?100 ?150 ?200 ?250 ?40 125 input bias (na) temperature (c) ?25 ?10 5 20 35 50 65 80 95 110 ada4084-2 v sy = 5v v cm = 0v r l = i b + i b ? 08237-030 figure 34 . input bias current vs. temperature 800 ?800 ?5 5 input bias (na) v cm (v) ?400 ?600 ?200 0 200 400 600 t a = +125c t a = ?40c ada4084-2 v sy = 5v ?4 ?3 ?2 ?1 0 1 2 3 4 t a = +25c t a = +85c 08237-031 figure 35 . input bias current vs. v cm and temperature 1000 100 10 1 0.001 0.01 0.1 1 10 v do (mv) load current (ma) ada4084-2 v sy = 5v t a = 25c (v+) ?v oh 08237-032 figu re 36 . dropout voltage vs. source current 1000 100 10 1 0.001 0.01 0.1 1 10 v do (mv) load current (ma) ada4084-2 v sy = 5v t a = 25c v ol ? (v?) 08237-033 figure 37 . dropout voltage vs. sink current 120 ?40 270 ?90 0.1 100k gain (db) phase (degrees) frequency (khz) ?45 0 45 90 135 180 225 ?20 20 0 40 60 80 100 1 10 100 1k 10k ada4084-2 v sy = 5v t a = 25c r l = 10k? 08237-034 figure 38 . open - loop gain and phase vs. frequency 60 ?20 10 100m gain (db) frequency (hz) ?10 0 10 20 30 40 50 100 1k 10k 100k 10m 1m ada4084-2 v sy = 5v t a = 25c 08237-035 a v = +100 a v = +10 a v = +1 figure 39 . closed - loop gain vs. frequency
ada4084- 2 data sheet rev. c | page 14 of 28 1000 100 10 1 0.10 0.01 10 100m z out (?) frequency (hz) 100 1k 10k 100k 10m 1m ada4084-2 v sy = 5v t a = 25c a v = +100 a v = +1 a v = +10 08237-036 figure 40 . output impedance vs. frequency 140 ?20 10 100m psrr (db) frequency (hz) 0 20 40 60 80 100 120 100 1k 10k 100k 10m 1m ada4084-2 v sy = 5v t a = 25c psrr? psrr+ 08237-037 figure 41 . psrr vs. frequency 120 20 10 100m cmrr (db) frequency (hz) 100 1k 10k 100k 10m 1m ada4084-2 v sy = 5v t a = 25c 30 40 50 60 70 80 90 100 110 08237-038 figure 42 . cmrr vs. frequency 5 ?5 voltage (v) time (s) ada4084-2 v sy = 5v t a = 25c r l = 2k? c l = 100pf ?4 ?3 ?2 ?1 0 1 2 3 4 08237-039 0 18 2 4 6 8 10 12 14 16 figure 43 . large signal transient response 80 60 40 20 0 ?80 ?60 ?40 ?20 voltage (mv) time (s) ada4084-2 v sy = 5v t a = 25c r l = 2k? c l = 100pf 08237-040 0 10 2 3 1 4 6 7 5 8 9 figure 44 . small signal transient response 10 ?25 ?20 ?5 ?10 ?15 0 5 0.16 ?0.12 ?0.08 ?0.04 0 0.04 0.08 0.12 ?2 0 2 4 8 6 18 16 12 10 14 voltage (v) voltage (v) time (s) ada4084-2 v sy = 5v t a = 25c output input 08237-041 figure 45 . settling time
data sheet ada4084- 2 rev. c | page 15 of 28 10 1 1 10 100 1k 10k 100k voltage noise density (nv/hz) frequency (hz) ada4084-2 v sy = 5v t a = 25c 08237-042 4 figure 46 . voltage noise density 60 50 40 30 20 10 0 1 1000 100 10 overshoot (%) capacitance (pf) ada4084-2 v sy = 5v v in = 100mv p-p r l = 2k? t a = 25c os+ os? 08237-043 figure 47 . overshoot vs. load capacitance 80 ?80 0 1 2 3 4 5 6 7 8 9 10 voltage noise (nv) time (seconds) ?60 ?40 ?20 0 20 40 60 ada4084-2 v sy = 5v t a = 25c 08237-044 figure 48 . vol t age noise 0.1 hz to 10 hz 0 ?160 ?140 ?120 ?100 ?80 ?60 ?40 ?20 100 1k 10k 100k channel separation (db) frequency (hz) ada4084-2 v sy = 5v t a = 25c v in = 5v p-p 08237-045 figure 49 . channel separation 1 0.1 0.01 0.0001 0.001 0.001 0.01 0.1 1 thd + n (%) amplitude (v rms ) ada4084-2 v sy = 5v t a = 25c f = 1khz 08237-046 figure 50 . thd + n vs. amplitude 1 0.001 0.01 0.1 0.0001 10 100 1k 10k 100k thd + n (%) frequency (hz) ada4084-2 r l = 2k? v in = 2.0v rms v sy = 5v t a = 25c 500khz filter 08237-047 figure 51 . thd + n vs. frequency
ada4084- 2 data sheet rev. c | page 16 of 28 6 4 2 ?4 ?2 ?6 0 1000 voltage (v) time (s) 0 100 200 300 400 500 600 700 800 900 ada4084-2 v sy = 5v t a = 25c output input 08237-048 figure 52 . no phase reversal
data sheet ada4084-2 rev. c | page 17 of 28 15 v characteristics 100 0 ?100 ?50 50 ?25 25 0 ?75 75 100 number of amplifiers v os (v) 20 30 10 40 50 60 70 80 90 ada4084-2 v sy = 15v t a = 25c r l = 08237-049 figure 53. input offset voltage distribution, soic 60 0 ?100 100 number of amplifiers v os (v) 10 20 30 40 50 ?50 50 ?25 25 0 ?75 75 ada4084-2 v sy = 15v t a = 25c r l = 08237-050 figure 54. input offset vo ltage distribution, msop 0 50 100 150 200 ?200 ?150 ?100 ?50 0 50 100 number of amplifiers v os (v) 08237-079 v sy = 15v t a = 25c r l = figure 55. input offset voltage distribution, lfcsp 60 0 02.0 number of amplifiers tcv os (v/c) 10 20 30 40 50 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 ada4084-2 v sy = 15v r l = ?40 t a +125c 08237-051 figure 56. tcv os distribution, soic and msop 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 number of amplifiers tcv os (v/c) 0 5 10 15 20 25 30 08237-085 ada4084-2 v sy = 15v r l = ?40 t a +125c figure 57. tcv os distribution, lfcsp 600 ?600 ?15 ?10 ?5 5 15 10 input offset voltage (v) common-mode voltage (v) ?400 ?500 ?300 ?200 ?100 0 100 200 300 400 500 ada4084-2 v sy = 15v t a = 25c r l = 0 08237-052 figure 58. input offset voltage vs. common-mode voltage
ada4084- 2 data sheet rev. c | page 18 of 28 ?50 ?100 ?150 ?200 ?250 ?40 125 input bias (na) temperature (c) ?25 ?10 5 20 35 50 65 80 95 110 ada4084-2 v sy = 15v v cm = 0v r l = i b + i b ? 08237-053 figure 59 . input bias current vs. temperature 1200 ?1200 ?15 ?10 ?5 5 10 15 input bias (na) v cm (v) ?400 ?800 0 400 800 t a = +125c t a = ?40c ada4084-2 v sy = 15v 0 t a = +25c t a = +85c 08237-054 figure 60 . input bias current vs. v cm and temperature 1000 10000 100 10 1 0.001 0.01 0.1 1 10 v do (mv) load current (ma) ada4084-2 v sy = 15v t a = 25c (v+) ?v oh 08237-055 figu re 61 . dropout voltage vs. source current 1000 10000 100 10 1 0.001 0.01 0.1 1 10 v do (mv) load current (ma) ada4084-2 v sy = 15v t a = 25c v ol ? (v?) 08237-056 figure 62 . dropout voltage v s. sink current 120 ?40 270 ?90 100 100m gain (db) phase (degrees) frequency (hz) ?45 0 45 90 135 180 225 ?20 20 0 40 60 80 100 1k 10k 100k 1m 10m ada4084-2 v sy = 15v t a = 25c r l = 10k? 08237-057 figure 63 . open - loop gain and phase vs. frequency 60 ?20 10 100m gain (db) frequency (hz) ?10 0 10 20 30 40 50 100 1k 10k 100k 10m 1m ada4084-2 v sy = 15v t a = 25c 08237-058 a v = +100 a v = +10 a v = +1 figure 64 . closed - loop gain vs. frequency
data sheet ada4084- 2 rev. c | page 19 of 28 1000 100 10 1 0.1 0.01 10 100m z out (?) frequency (hz) 100 1k 10k 100k 10m 1m ada4084-2 v sy = 15v t a = 25c a v = +100 a v = +1 a v = +10 08237-059 figure 65 . output impedance vs. frequency 140 ?20 10 100m psrr (db) frequency (hz) 0 20 40 60 80 100 120 100 1k 10k 100k 10m 1m ada4084-2 v sy = 15v t a = 25c psrr? psrr+ 08237-060 figure 66 . psrr vs. frequency 120 20 10 100m cmrr (db) frequency (hz) 100 1k 10k 100k 10m 1m ada4084-2 v sy = 15v t a = 25c 30 40 50 60 70 80 90 100 110 08237-061 figure 67 . cmrr vs. frequency 15 10 ?15 ?10 ?5 0 5 0 4 8 12 36 28 32 24 20 16 voltage (v) time (s) ada4084-2 v sy = 15v t a = 25c r l = 2k? c l = 100pf 08237-062 figure 68 . large signal transient response 80 60 40 20 0 ?80 ?60 ?40 ?20 0 2 1 4 3 7 8 9 6 5 10 voltage (mv) time (s) ada4084-2 v sy = 15v t a = 25c r l = 2k? c l = 100pf 08237-063 figure 69 . small signal transient response 10 ?25 ?20 ?5 ?10 ?15 0 5 0.20 ?0.15 ?0.10 ?0.05 0 0.05 0.10 0.15 ?2 0 2 4 8 6 18 16 12 10 14 voltage (v) voltage (v) time (s) ada4084-2 v sy = 15v t a = 25c input output 08237-064 figure 70 . settling time
ada4084- 2 data sheet rev. c | page 20 of 28 10 1 1 10 100 1k 10k 100k voltage noise density (nv/hz) frequency (hz) ada4084-2 v sy = 15v t a = 25c 08237-065 4 figure 71 . voltage noise density 70 50 60 40 30 20 10 0 1 1000 100 10 overshoot (%) capacitance (pf) ada4084-2 v sy = 15v v in = 100mv p-p r l = 2k? t a = 25c os+ os? 08237-066 figure 72 . overshoot vs. load capacitance 0 2 4 6 8 10 60 ?60 voltage noise (nv) time (seconds) ?40 ?20 0 20 40 ada4084-2 v sy = 15v t a = 25c 08237-067 figure 73 . voltage noise 0.1 hz to 10 hz 0 ?180 ?140 ?160 ?120 ?100 ?80 ?60 ?40 ?20 100 1k 10k 100k channel separation (db) frequency (hz) ada4084-2 v sy = 15v t a = 25c v in = 10v p-p 08237-068 figure 74 . channel sepatation 1 0.001 0.01 0.1 0.0001 0.001 0.01 0.1 1 10 thd + n (%) amplitude (v rms ) ada4084-2 v sy = 15v t a = 25c f = 1khz 08237-069 figure 75 . thd + n vs. amplitude 1 0.001 0.01 0.1 0.0001 10 100 1k 10k 100k thd + n (%) frequency (hz) ada4084-2 v sy = 15v t a = 25c 500khz filter 08237-070 figure 76 . thd + n vs. frequency
data sheet ada4084- 2 rev. c | page 21 of 28 20 15 10 5 ?15 ?10 ?5 ?20 0 1000 voltage (v) time (s) 0 100 200 300 400 500 600 700 800 900 ada4084-2 v sy = 15v t a = 25c output input 08237-071 figure 77 . no phase reversal
ada4084- 2 data sheet rev. c | page 22 of 28 applications informa tion functional descripti on the ada4084 - 2 is a precision single - supply, rai l - to - rail operational amplifier. intended for portable instrumentation, the ada4084 - 2 combine s the attributes of precision, wide bandwidth, and low noise to make it an ideal choice in single - supply applicati ons that require both ac and precision dc performance. other low supply voltage applications for which the ada4084 - 2 is well suited are active filters, audio microphone preamplifiers, power supply control, a nd tele - communications. to combine all of these attributes with rail - to - rail input/output operation, novel circuit design techniques are used. d2 d101 d100 d5 d4 d1 q1 q4 q3 q2 08237-073 r4 r1 r2 r3 figure 78 . ada4084 - 2 equivalent input circuit for example, figure 78 illustrates a simplified equivalent circuit for the input stage of the ada4084 - 2 . it comprises a p np differential pair, q1 and q2, and a n n pn differ ential pair, q3 and q4, operating concurrently. diode d1 00 and diode d101 serve to clamp the applied differential input voltage to the ada4084 - 2 , thereby protecting the input transistors against zener breakd own of the emitter - base junctions . input stage voltage gains are kept low for input rail - to - rail operation. the two pairs of differential outpu t voltages are connected to the second stage of the ada4084 - 2 , w hich is a modified compound folded cascade gain stage. it is also in the second gain stage, where the two pairs of differential output voltages are combined into a single - ended output signal voltage used to drive the output stage. a key issue in the input stage is the behavior of the input bias currents over the input common - mode voltage range. input bias currents in the ada4084 - 2 are the arithmetic sum of the base currents in q1 and q 4 and in q2 and q 3 . as a result of this design approach, the input bias currents in the ada4084 - 2 not only exhibit different amplitudes; they also exhibit different polarities . this effect is best illustrated by figure 9 , figure 10, figure 34, figure 35, figure 59, and figure 60. it is therefore importan t that the effectiv e source impedances connected to the ada4084 - 2 inputs be balanced for optimum dc and ac performance. to achieve rail - to - rail output, the ada4084 - 2 output stag e design employs a unique topology for both sourcing and sinking current. this circuit topology is illustrated in figure 79 . the output stage is voltage - driven from the second gain stage. the signal path through the output stage is inverting; that is, for positive input signals, q1 3 provides the base current drive to q 19 so that it conducts (sinks) current. for negative input signals, the signal path via q1 8 mirror q 2 4 provides the base current drive for q 23 to conduct (sourc e) current. both transistors provide output current until they are forced into saturation . q24 q21 d20 q13 q18 q19 q23 v ee v out v cc v bias mirror 08237-074 r5 r6 r7 c2 c1 figure 79 . ada4084 - 2 equivalent output circuit thus, the saturation voltage of the output transistors sets the limit on the ada4084 - 2 maximum output voltage swing. output short - circuit current limiting is determined by the maximum signal current into the base of q1 3 from the second gain stage. th e output stage also exhibits voltage gain. this is accomplished by the use of common - emitter amplifiers, and, as a result, the voltage gain of the output stage (thus, the open - loop gain of the device) exhibits a dependence on the total load resistance at t he output of the ada4084 - 2 .
data sheet ada4084- 2 rev. c | page 23 of 28 startup characterist ics the ada4084 - 2 is specified to operate from 3 v to 30 v (1.5 v to 15 v) under nominal power supplies. dur ing power up as the supply voltage increases from 0 v to the nominal power supply voltage, the supply current (i sy ) increases as well to the point at which it stabilizes and the amplifier is ready to operate. the stabilization varies with temperature , as s hown in figure 80, below such that at ? 40 c it takes a higher voltage and stabilizes at a lower supply current than at hot temperatures where it takes a lower voltage but stabilizes at a higher current. in all cases, the ada4084 - 2 is specified to start up and operate at a minimum of 3 v under all temperature conditions. 1000 0 0 36 i sy /amplifier (a) v sy (v) 100 200 300 400 500 600 700 800 900 4 8 12 16 20 24 28 32 ada4084-2 t a = 25c r l = +125c +25c ?40c +85c 08237-072 figure 80 . supply current vs. supply voltage input protection as with any semiconductor device, if conditions exist where the applied input voltages to the device exceed either supply voltage, the input overvoltage i - to - v characteristic of the device must be considered. when an overvoltage occurs, the amplifier may be damaged, depending on the magnitude of the applied voltage and the magnitude of the fau lt current. the d1, d2, d4, and d5 diodes conduct when the input common - mode voltage exceeds eith er supply pin by a diode drop. this var ies with temperature and is in the range of 0.3 v to 0.8 v. as illustrated in the simplified equivalent circuit shown i n figure 78, the ada4084 - 2 does not have any internal current limiting resis - tors; thus, fault currents can quickly rise to damaging levels. this input current is not inherently da maging to the device, provided that it is limited to 5 ma or less . if a fault condition cause s more than 5 ma to flow, an external series resistor should be added at the expense of additional thermal noise. figure 81 illustrates a t ypical noninverting configuration for an overvoltage - protected amplifier where the series resistance, r s , is chosen , such that ( ) ma 5 supply max in s v v r ? = for example, a 1 k resistor protects the ada4084 - 2 against inpu t signals up to 5 v above and below the supplies. note that the thermal noise of a 1 k ? resistor at room temperature is 4 nv/ hz, which exceeds the voltage noise of the ada4084 - 2 . for other configurations where both inputs are used, each input should be protected against abuse with a series resistor. again, to ensure optimum dc and ac performance, it is recommended that source impedance levels be balanced . r1 r2 v in v out 1/2 ada4084-2 08237-075 figure 81 . resistance in series with input limits overvoltage currents to safe values to protect q1 - q2 and q3 - q4 from large differential voltages that may result in zen er breakdown of the emitter - base junction, d100 and d101 are connected between the two inputs. this precludes operation as a comparator. for a more complete description , see the mt - 035 tutorial, op amp inputs, ou tputs, single - supply, and rail - to - rail issues ; the mt - 083 tutori a l , comparators , the mt - 084 tutorial, using op amps as comparators ; and the an - 849 application note, using op amps as comparators , at www.analog.com . output phase reversa l some operational amplifiers designed for single - supply operation exhibit an output voltage phase reversal when their inputs are driven beyond their useful common - mode range. typically, for single - supply bipolar op amps, the negative supply determines the lower limit of their common - mode range. with these devices, external clamping diodes, with the anode connected to ground and the cathode to the inputs, prevent input signal excurs ions from exceeding the negative supply of the device (that is, gnd), preventing a condition that causes the output voltage to change p hase. jfet input am plifiers can also exhibit phase reversal , and, if so, a series input resistor is usually required to prevent it. the ada4084 - 2 is free from reasonable input voltage range restrictions, provided that input vo ltages no greater than the supply voltages are applied (see figure 27 , figure 52 , and figure 77) . although device output does not change phase, large currents can flow through the input protectio n diodes. therefore, the technique recommended in the input protection section should be applied to those applications where the likelihood of input voltages exceed ing the supply voltages is high .
ada4084-2 data sheet rev. c | page 24 of 28 designing low noise circuits in single- supply applications in single-supply applications, devices like the ada4084-2 extend the dynamic range of the application through the use of rail-to-rail operation. referring to the op amp noise model circuit configu- ration illustrated in figure 82, the expression for an amplifiers total equivalent input noise voltage for a source resistance level, r s , is given by ? ? 2 2 2 )()()(2 noa snoa nr nt e ee ri ???? , units in hz v where: r s = 2 r, the effective, or equivalent, circuit source resistance. (e nr ) 2 is the source resistance thermal noise voltage power (4ktr). k is the boltzmanns constant, 1.38 10 C23 j/k. t is the ambient temperature in kelvin of the circuit, 273.15 + t a (c). ( i noa ) 2 is the op amp equivalent input noise current spectral power (1 hz bandwidth). ( e noa ) 2 is the op amp equivalent input noise voltage spectral power (1 hz bandwidth). e nr e nr e noa i noa i noa r noiseless r noiseless 08237-076 ideal noiseless op amp r s = 2r figure 82. op amp noise circuit model used to determine total circuit equivalent input noise voltage and noise figure as a design aid, figure 83 shows the total equivalent input noise of the ada4084-2 and the total thermal noise of a resistor for comparison. note that for source resistance less than 1 k, the equivalent input noise voltage of the ada4084-2 is dominant. total source resistance, r s ( ? ) 100 1 equivalent thermal noise (nv/ hz) 10 10k ada4084-2 total equivalent noise resistor thermal noise only 08237-077 100 1k 100k frequency = 1khz t a = 25c figure 83. ada4084-2 equivalent thermal noise vs. total source resistance because circuit snr is the critical parameter in the final analysis, the noise behavior of a circuit is sometimes expressed in terms of its noise figure, nf. the noise figure is defined as the ratio of a circuits output signal-to-noise to its input signal-to-noise. noise figure is generally used for rf and microwave circuit analysis in a 50 system. this is not very useful for op amp circuits where the input and output impedances can vary greatly. for a more complete description of noise figure, see the mt-052 tutor ia l, op amp noise figure: dont be mislead , available at www.analog.com . signal levels in the application invariably increase to maximize circuit snr, which is not an option in low voltage, single-supply applications. therefore, to achieve optimum circuit snr in single-supply applications, it is recommended that an operational amplifier with the lowest equivalent input noise voltage be chosen, along with source resistance levels that are consistent with maintaining low total circuit noise. comparator operation although op amps are quite different from comparators, occasionally an unused section of a dual or a quad op amp can be used as a comparator; however, this is not recommended for any rail-to-rail output op amps. for rail-to-rail output op amps, the output stage is generally a ratioed current mirror with bipolar or mosfet transistors. with the part operating open loop, the second stage increases the current drive to the ratioed mirror to close the loop. however, it cannot, which results in an increase in supply current. with the op amp configured as a comparator, the supply current can be significantly higher (see figure 84). an unused section should be configured as a voltage follower with the noninverting input connected to a voltage within the input voltage range. the ada4084-2 has unique second stage and output stage designs that greatly reduce the excess supply current when the op amp is operating open loop. 800 0 036 supply current (a) v sy (v) 08237-078 100 200 300 400 500 600 700 4 8 12 16 20 24 28 32 ada4084-2 t a = 25c r l = comparator output low comparator output high buffer figure 84. supply current vs. supply voltage
data sheet ada4084- 2 rev. c | page 25 of 28 outline dimensions c o m p l i a n t t o j e d e c s t a n d a r d s m o - 1 8 7 - a a 6 0 0 . 8 0 0 . 5 5 0 . 4 0 4 8 1 5 0 . 6 5 b s c 0 . 4 0 0 . 2 5 1 . 1 0 m a x 3 . 2 0 3 . 0 0 2 . 8 0 c o p l a n a r i t y 0 . 1 0 0 . 2 3 0 . 0 9 3 . 2 0 3 . 0 0 2 . 8 0 5 . 1 5 4 . 9 0 4 . 6 5 p i n 1 i d e n t i f i e r 1 5 m a x 0 . 9 5 0 . 8 5 0 . 7 5 0 . 1 5 0 . 0 5 1 0 - 0 7 - 2 0 0 9 - b figure 85 . 8 - lead mini small outline package [msop] (rm - 8) dimensions shown in millimeters c o n t r o l l i n g d i m e n s i o n s a r e i n m i l l i m e t e r s ; i n c h d i m e n s i o n s ( i n p a r e n t h e s e s ) a r e r o u n d e d - o f f m i l l i m e t e r e q u i v a l e n t s f o r r e f e r e n c e o n l y a n d a r e n o t a p p r o p r i a t e f o r u s e i n d e s i g n . c o m p l i a n t t o j e d e c s t a n d a r d s m s - 0 1 2 - a a 0 1 2 4 0 7 - a 0 . 2 5 ( 0 . 0 0 9 8 ) 0 . 1 7 ( 0 . 0 0 6 7 ) 1 . 2 7 ( 0 . 0 5 0 0 ) 0 . 4 0 ( 0 . 0 1 5 7 ) 0 . 5 0 ( 0 . 0 1 9 6 ) 0 . 2 5 ( 0 . 0 0 9 9 ) 4 5 8 0 1 . 7 5 ( 0 . 0 6 8 8 ) 1 . 3 5 ( 0 . 0 5 3 2 ) s e a t i n g p l a n e 0 . 2 5 ( 0 . 0 0 9 8 ) 0 . 1 0 ( 0 . 0 0 4 0 ) 4 1 8 5 5 . 0 0 ( 0 . 1 9 6 8 ) 4 . 8 0 ( 0 . 1 8 9 0 ) 4 . 0 0 ( 0 . 1 5 7 4 ) 3 . 8 0 ( 0 . 1 4 9 7 ) 1 . 2 7 ( 0 . 0 5 0 0 ) b s c 6 . 2 0 ( 0 . 2 4 4 1 ) 5 . 8 0 ( 0 . 2 2 8 4 ) 0 . 5 1 ( 0 . 0 2 0 1 ) 0 . 3 1 ( 0 . 0 1 2 2 ) c o p l a n a r i t y 0 . 1 0 figure 86 . 8 - lead standard small outline package [soic_n] narrow body (r - 8) dimensions shown in millimeters and (inches)
ada4084-2 data sheet rev. c | page 26 of 28 top view 8 1 5 4 0.30 0.25 0.20 bottom view pin 1 index area seating plane 0.80 0.75 0.70 1.70 1.60 sq 1.50 0.203 ref 0.05 max 0.02 nom 0.50 bsc exposed pad 3.10 3.00 sq 2.90 for proper connection of the exposed pad, refer to the pin configuration section of this data sheet. coplanarity 0.08 0.50 0.40 0.30 compliant to jedec standards mo-229-weed p i n 1 i n d i c a t o r ( r 0 . 1 5 ) 02-05-2013-b 0.20 min figure 87. 8-lead lead frame chip scale package [lfcsp_wd] 3 x 3 mm body, very very thin, dual lead (cp-8-12) dimensions shown in millimeters ordering guide model 1 temperature range package description package option branding ADA4084-2ARMZ ?40c to +125c 8-lead mini small outline package [msop] rm-8 a2q ADA4084-2ARMZ-r7 ?40c to +125c 8-lead mini small outline package [msop] rm-8 a2q ADA4084-2ARMZ-rl ?40c to +125c 8-lead mini small outline package [msop] rm-8 a2q ada4084-2arz ?40c to +125c 8-lead standard small outline package [soic_n] r-8 ada4084-2arz-r7 ?40c to +125c 8-lead standard small outline package [soic_n] r-8 ada4084-2arz-rl ?40c to +125c 8-lead standard small outline package [soic_n] r-8 ada4084-2acpz-r7 ?40c to +125c 8-lead lead frame chip scale package [lfcsp_wd] cp-8-12 a2q ada4084-2acpz-rl ?40c to +125c 8-lead lead frame chip scale package [lfcsp_wd] cp-8-12 a2q 1 z = rohs compliant part.
data sheet ada4084- 2 rev. c | page 27 of 28 notes
ada4084- 2 data sheet rev. c | page 28 of 28 notes ? 2011 C 2013 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d08237 - 0 - 4 /13(c)

▲Up To Search▲

Price & Availability of ADA4084-2ARMZ

	To Download ADA4084-2ARMZ Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .