cystech electronics corp. spec. no. : c566n3 issued date : 2012.04.12 revised date : 2014.01.14 page no. : 1/9 MTP2317N3 cystek product specification 20v p-channel enhancement mode mosfet MTP2317N3 bv dss -20v i d -5.8a r dson @v gs =-4.5v, i d =-4.5a 28m (typ.) r dson @v gs =-2.5v, i d =-2.5a 35m (typ.) 51m (typ.) r dson @v gs =-1.8v, i d =-2a features ? advanced trench process technology ? high density cell design for ultra low on resistance ? excellent thermal and electrical capabilities ? compact and low profile sot-23 package ? pb-free lead plating and halogen-free package equivalent circuit outline MTP2317N3 sot-23 d s g g gate s source d drain ordering information device package shipping MTP2317N3-0-t1-g sot-23 (pb-free lead plating an d halogen-free package) 3000 pcs / tape & reel environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t1 : 3000 pc s / tape & reel,7? reel product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c566n3 issued date : 2012.04.12 revised date : 2014.01.14 page no. : 2/9 MTP2317N3 cystek product specification absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage v ds -20 gate-source voltage v gs 12 v t a =25 c, v gs =-4.5v -5.8 continuous drain current (note) t a =70 c, v gs =-4.5v i d -4.6 pulsed drain current i dm -30 a ta=25 1.38 maximum power dissipation (note) ta=70 p d 0.88 w operating junction and storage temp erature range tj ; tstg -55~+150 c thermal performance parameter symbol limit unit thermal resistance, j unction-to-ambient(pcb mounted) rth,ja 90 (note) c/w lead temperature, for 5 second soldering(1/8? from case) t l 260 c note : surface mounted on 1 in 2 fr-4 board with 2 oz. copper, t Q 5sec; 270 c/w when mounted on minimum copper pad. electrical characteristics (ta=25 c) symbol min. typ. max. unit test conditions static bv dss -20 - - v v gs =0, i d =-250a v gs(th) -0.5 -0.7 -1.0 v v ds =v gs , i d =-250a i gss - - 100 na v gs =12v, v ds =0 i dss - - -1 a v ds =-20v, v gs =0 - 28 35 v gs =-4.5v, i d =-4.5a - 35 50 v gs =-2.5v, i d =-2.5a *r ds(on) - 51 75 m v gs =-1.8v, i d =-2a *g fs - 10.7 - s v ds =-5v, i d =-3a dynamic ciss - 1916 - coss - 159 - crss - 132 - pf v ds =-10v, v gs =0, f=1mhz t d(on) - 12 - t r - 18 - t d(off) - 54 - t f - 35 - ns v dd =-10v, i d =-1a, r l =10 , v gen =-4.5v, r g =6 qg - 15 - qgs - 3.2 - qgd - 3.9 - nc v ds =-10v, i d =-4.5a, v gs =-4.5v
cystech electronics corp. spec. no. : c566n3 issued date : 2012.04.12 revised date : 2014.01.14 page no. : 3/9 MTP2317N3 cystek product specification source-drain diode i s - - -2 i sm - - -8 a v sd - -0.72 -1.3 v v gs =0v, i s =-1a trr* - 21 - ns qrr* - 10 - nc i f =-4.5a, di f /dt=100a/ s *pulse test : pulse width 300s, duty cycle 2% recommended soldering footprint
cystech electronics corp. spec. no. : c566n3 issued date : 2012.04.12 revised date : 2014.01.14 page no. : 4/9 MTP2317N3 cystek product specification typical characteristics typical output characteristics 0 5 10 15 20 25 30 012345 -v ds , drain-source voltage(v) -i d , drain current (a) 5v, 4.5v, 4v, 3.5v, 3v - v gs = 1. 5v -v gs =2v -v gs =1v -v gs =2.5v brekdown voltage vs ambient temperature 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -bv dss , normalized drain-source breakdown voltage i d =-250 a, v gs =0v static drain-source on-state resistance vs drain current 10 100 1000 0.01 0.1 1 10 100 -i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) -v gs =1.5v -v gs =4.5v -v gs =2.5v -v gs =1.8v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 04812162 -i dr , reverse drain current (a) -v sd , source-drain voltage(v) 0 tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 40 80 120 160 200 240 280 320 360 400 012345 -v gs , gate-source voltage(v) r ds( on) , static drain-source on- state resistance(m) i d =-4.5a drain-source on-state resistance vs junction tempearture 0.6 0.8 1 1.2 1.4 1.6 -60 -20 20 60 100 140 180 tj, junction temperature(c) r ds( on) , normalized static drain- source on-state resistance v gs =-4.5v, i d =-4.5a r dson @tj=25c : 28m typ
cystech electronics corp. spec. no. : c566n3 issued date : 2012.04.12 revised date : 2014.01.14 page no. : 5/9 MTP2317N3 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 10000 0.1 1 10 100 -v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 1.6 -60 -40 -20 0 20 40 60 80 100 120 140 160 tj, junction temperature(c) -v gs( th) , normalized threshold voltage i d =-250 a i d =-1ma single pulse power rating, junction to ambient (note on page 2) 0 10 20 30 40 50 0.001 0.01 0.1 1 10 100 pulse width(s) power (w) t j( max) =150c t a =25c r ja =90c/w gate charge characteristics 0 1 2 3 4 5 04812162 qg, total gate charge(nc) -v gs , gate-source voltage(v) 0 v ds =-10v i d =-4.5a maximum safe operating area 0.01 0.1 1 10 100 0.01 0.1 1 10 100 -v ds , drain-source voltage(v) -i d , drain current (a) dc 10ms 100ms 1ms 100 s t a =25c, tj=150c, v gs =-4.5v, r ja =90c/w single pulse maximum drain current vs junctiontemperature 0 1 2 3 4 5 6 7 25 50 75 100 125 150 175 tj, junction temperature(c) -i d , maximum drain current(a) t a =25c, v gs =-4.5v
cystech electronics corp. spec. no. : c566n3 issued date : 2012.04.12 revised date : 2014.01.14 page no. : 6/9 MTP2317N3 cystek product specification typical characteristics(cont.) typical transfer characteristics 0 10 20 30 40 50 60 70 012345 -v gs , gate-source voltage(v) -i d , drain current (a) -v ds =5v power derating curve 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 0 20 40 60 80 100 120 140 160 t a , ambient temperature() p d , power dissipation(w) mounted on fr-4 board with 1 in 2 p ad area transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) normalized transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t c =p dm *z jc (t) 4.r ja =90 c/w
cystech electronics corp. spec. no. : c566n3 issued date : 2012.04.12 revised date : 2014.01.14 page no. : 7/9 MTP2317N3 cystek product specification reel dimension c arrier tape dimension
cystech electronics corp. spec. no. : c566n3 issued date : 2012.04.12 revised date : 2014.01.14 page no. : 8/9 MTP2317N3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak 10-30 seconds 20-40 seconds temperature(tp) ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c566n3 issued date : 2012.04.12 revised date : 2014.01.14 page no. : 9/9 MTP2317N3 cystek product specification sot-23 dimension *: typical inches millimeters inches millimeters style: pin 1.gate 2.source 3.drain 3-lead sot-23 plastic surface mounted package cystek package code: n3 h j k d a l g v c b 3 2 1 s marking: 2317 dim min. max. min. max. dim min. max. min. max. a 0.1102 0.1204 2.80 3.04 j 0.0032 0.0079 0.08 0.20 b 0.0472 0.0669 1.20 1.70 k 0. 0118 0.0266 0.30 0.67 c 0.0335 0.0512 0.89 1.30 l 0. 0335 0.0453 0.85 1.15 d 0.0118 0.0197 0.30 0.50 s 0. 0830 0.1161 2.10 2.95 g 0.0669 0.0910 1.70 2.30 v 0. 0098 0.0256 0.25 0.65 h 0.0000 0.0040 0.00 0.10 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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