mosa ms6332 16-bit stereo audio dac & headphone driver rev 3 1/9 www.mosanalog.com 16-bit stereo audio dac & headphone driver mute and power down function component less, low cost features ? operation range: 2.5v~6.5v ? excellent power supply rejection ratio(psrr) ? no pop-noise ? mute and power down function controlled by audio input pins (bck, ws) ? component less ? no zero crossing distortion ? fast setting time permits 2*, 4*, and 8* oversampling (serial input) or double speed operation at 4* oversampling ? compatible with most of the japanese input formats; time multiplexed, two's complement, ttl input level ? cost efficient ? housed in 8 pin sop package applications ? multimedia system, mp3, pda, portable digital audio. description the ms6332 is an integrated 16-bits voltage-output di gital-to-analog converter ( dac) and class ab stereo headphone driver. the ms6332 is with the excellent power s upply rejection ratio(psrr). it is fabricated in a cmos process and features extremely low power dissipation, smal l package size and easy appli cation. the accuracy of the matched coarse current sources, combined with the unique symmetrical decoding method, preclude zero-crossing distortion and ensures high quality audio reproduction. these unique features, combined with its exceptional performance, make the ms6332 ideally suited for use in digital audio equipment. block diagram + - + - v dd gnd cap bck ws data outr outl dac hp
mosa ms6332 16-bit stereo audio dac & headphone driver rev 3 2/9 www.mosanalog.com pin configuration symbol pin description v dd 1 positive supply voltage outl 2 left channel output outr 3 right channel output cap 4 capacitor bck 5 bit clock input ws 6 word select input data 7 data input gnd 8 ground 7 6 5 8 2 3 4 1 ms6332 gnd data ws bck v dd outl outr cap pin 4 : capacitor = 1uf~10uf (ripple rejection) ordering information package part number packag ing marking transport media 8-pin sop (lead free) ms6332gtr ms6332g 2.5k units tape and reel 8-pin sop (lead free) ms6332gu ms6332g 100 units tube absolute maximum ratings symbol parameter rating unit v dd positive supply voltage 6.5 v v esd electrostatic handling -3000 to 3000 v t stg storage temperature range -65 to 150 t a operating ambient temperature range -40 to 85 t j maximum junction temperature 150 t s soldering temperature, 10 seconds 260 r thja thermal resistance from junc tion to ambient in free air sop8 210 /w operating ratings symbol parameter min typ max unit v dd supply voltage 2.5 - 6.5 v
mosa ms6332 16-bit stereo audio dac & headphone driver rev 3 3/9 www.mosanalog.com 3.3v electrical characteristics (ta=25 , v dd =3.3v, v ss =0v, f=1khz, r l =32 ? ; unless otherwise specified) symbol parameter conditions min typ max unit dc characteristics v cap voltage at cap 1.60 1.65 1.70 v v dc output dc level 1.60 1.65 1.70 v v fs full scale output voltage v fs =0.023663* 24 *v dd - 1.87 - v i q quiescent current - 3.6 4 ma i pd power down current no digital input signal - 0.35 1 ua cap=2.2uf (100hz) 50 55 - db psrr power supply rejection ratio cap=10uf (100hz) 61 66 - db cs channel separation 70 75 - db att mute attenuation 62 67 - db ac characteristics res resolution - - 16 bits - -60 -56 db thd+n total harmonic distortion plus noise - 0.1 0.158 % s/n signal-to-noise ratio 86 92 - db po maximum output power (thd+n)/s < 0.1 ? 49 52 - mw vo maximum output voltage swing (thd+n)/s < 0.1 ? 2.5 2.6 - vpp
mosa ms6332 16-bit stereo audio dac & headphone driver rev 3 4/9 www.mosanalog.com typical performance characteristics (ta=25 , r l =32 ? , sampling rate=4fs; unless otherwise specified) power down current (ua) supply voltage (v) quiescent current (ma) supply voltage (v) thd+n (%) supply voltage (v) power down current vs. supply voltage quiescent current vs. supply voltage thd+n vs. supply voltage f=1khz psrr (db) frequency (hz) psrr (db) frequency (hz) psrr (db) frequency (hz) psrr vs. frequency psrr vs. frequency psrr vs. frequency cap=10uf cap=10uf cap=10uf cap=2.2uf cap=2.2uf cap=2.2uf v dd =5v v rr =-20dbv v dd =3.3v v rr =-20dbv v dd =2.7v v rr =-20dbv mute attenuation (db) supply voltage (v) channel separation (db) supply voltage (v) thd+n (%) frequency (hz) mute attenuation vs. supply voltage channel separation vs. supply voltage thd+n vs. frequency v dd =5v v dd =3.3v v dd =2.7v f=1khz
mosa ms6332 16-bit stereo audio dac & headphone driver rev 3 5/9 www.mosanalog.com timing and data format the ms6332 accepts input serial data formats of 16-bit word length. le ft and right data words are time multiplexed. the msb must always be first. the format of data input is shown in figs. 1 and 2. right ws bck data lsb msb t r t hb t f t cr t lb t hw t sw left t sd t hd fig.1 timing and input signals. 0 1 2 15 14 13 210 msb lsb 15 14 13 210 msb lsb right left ws bck data fig.2 format of input signals. data format (bck, ws, data) symbol parameter conditions min typ max unit v il input low level - - 0.8 v v ih input high level 2 - - v l i il l input leakage current low - - 10 ? a l i ih l input leakage current high - - 10 ? a f bck input clock frequency - - 18.4 mhz br bit rate data input - - 18.4 mbits/s f ws word select input - - 384 khz t r rise time - - 12 ns t f fall time - - 12 ns t c r bit clock cycle time 54 - - ns t hb bit clock high time 15 - - ns t lb bit clock low time 15 - - ns t sd data set-up time 12 - - ns t hd data hold time to bit clock 2 - - ns t hw word select hold time 2 - - ns t sw word select set-up time 12 - - ns
mosa ms6332 16-bit stereo audio dac & headphone driver rev 3 6/9 www.mosanalog.com power down and mute function power down and mute functions are controlled by the audio i nput pins (ws, bck). the initial status is in the mute on and the power down modes. the 20 clock counts is to switch the power down mode and the 18 clock counts is to switch the mute mode. in changing these modes, the clock bck should not exist in ws=1, and always exists in ws=0. power down timing th e initial status is in the power down mode. ws bck total 20 clocks power down mode power active mode mute timing th e initial status is in the mute on mode. bck ws total 18 clocks mute on mute off application information basic application example 10uf 47uf 47uf headphone (32 ) v dd phone jack bck ws data gnd cap outr outl v dd ms6332 5 6 7 81 2 3 4 digital audio input note : vo=1.87vpp at v dd =3.3v
mosa ms6332 16-bit stereo audio dac & headphone driver rev 3 7/9 www.mosanalog.com external dimensions h e d a a1 e b c l 14 5 8 dimension in mm dimension in inch symbol min max min max a 1.35 1.75 0.0532 0.0688 a1 0.10 0.25 0.0040 0.0098 b 0.33 0.51 0.013 0.020 c 0.19 0.25 0.0075 0.0098 d 4.80 5.00 0.1890 0.1968 h 5.80 6.20 0.2284 0.2440 e 3.80 4.00 0.1497 0.1574 e 1.27 bsc 0.050 bsc l 0.40 1.27 0.016 0.050 sop8 tape and reel (unit : mm) 3.0 3.6 12.0 6.9 8.0 5.5 1.75 5.4 2.0 4.0 1.5+0.1/-0.0 dia 0.5 radius typical 1.5 min 0.30 0.3r max 1.7 2.0 0.05 0.05 0.05 0.3 sop8
mosa ms6332 16-bit stereo audio dac & headphone driver rev 3 8/9 www.mosanalog.com demo board 1 3 4 2 function description lab el 1: supply input the avdd and dvdd should be the same supply voltage, the supply range is 2.7~6.5 vdc. label 2: headphone jack used 3.5mm diameter of headphone with 32ohm label 3: digital audio input connected to digital audio signals. label 4: control switch pd: power down mode as pressed the button once, the chip status will be switc hed to power down mode or active mode (disable power down mode). the default status is power down mode initially. mute : mute mode as pressed the button once, the chip status will be switche d to mute-on or mute-off. the default status is mute-on initially. rst : reset mcu controller the system will be loaded default value.
mosa ms6332 16-bit stereo audio dac & headphone driver rev 3 9/9 www.mosanalog.com circuit 100u c1 104 c6 phonejack j1 12m y1 1 2 avdd j5 100u c2 1k r1 1k r2 1k r3 rst 1 p3.0 2 p3.1 3 xtal2 4 xtal1 5 p3.2 6 p3.3 7 p3.4 8 p3.5 9 gnd 10 vcc 20 p1.7 19 p1.6 18 p1.5 17 p1.4 16 p1.3 15 p1.2 14 p1.1 13 p1.0 12 p3.7 11 at89c2051 u2 20 c7 20 c8 1 2 dvcc j8 10k r6 rst s1 pd s2 mute s3 pd d1 mute d2 bck ws data out_r 1 2 3 audio out j2 1 2 3 4 audio source j3 l1 1k r4 1k r5 100u c3 out_l vdd 1 o_l 2 o_r 3 cap 4 bck 5 ws 6 data 7 gnd 8 ms6332 u1 g g 10u c4 10u c5 1 2 3 74ac08pc u3a 1 2 3 74ac32pc u4a 4 5 6 74ac32pc u4b 4 5 6 74ac08pc u3b 8 10 9 74ac08pc u3c vcc
|
