pin a ssignment 1 ground 2 , 3 input line 4 vcc l i te-on sem i conductor L50ESDL12VH4-2 esd protect i on dev i ce ge n e ra l d es cr iptio n the L50ESDL12VH4-2 has been specifically designed t o protect sensitive components which are connected to data an d transmission lines from overvoltages caused by esd (electrostati c discharge), eft (electrical fast transients), and lightning. fe a t ur es protects two i/o lines max. peak pulse power : ppp = 500w at tp = 8/20 us. low capacitance : 8pf typical low clamping voltage iec 61000-4-2, level 4 ( esd ), > 15kv ( air ) ; > 8kv ( contact ). iec 61000-4-5 (lightning) 0.5kv, 12a (8/20s) a ppli ca tio n adsl industrial electronics rs-422 interfaces portable electronics microcontroller input protection wan/lan equipment m e chan i ca l da t a case material: "green" molding compound ul flammabi lity classification 94v-0 (no br.sb, cl) terminals: lead free plating (matte tin finish), so lderable per j-std-002 and jesd22-b/02. moisture sensitivity: leve 1 per j-std-020c component in accordance to rohs 2002/95/ec sot-143 max i mum rat i ngs (t j = 25 un l ess otherw i se not i ced) rat i ng symbo l va l ue un i t peak pulse power ( t p = 8 / 20us) p pk 500 (max) w peak pulse curren t ( t p = 8 / 20us) i pp 16 a opera t ing junc t ion tempera t ure range t j -55 t o + 125 s t orage tempera t ure range ts t g -55 t o + 150 soldering tempera t ure , t max = 10s t l 260 electr i cal character i st i cs (tj= 25 unless o therwise noticed) parameter symbo l cond i t i ons min typ max un i t reverse s t ando ff vol t age v rwm --- --- 12 v breakdown vol t age v br i r = 1 ma 13.3 --- --- v reverse leakage curren t i rm v drm =12v --- ---- 1 ua i pp = 5a, tp = 8/20s --- --- 24 clamping voltage v c i pp =16a, tp = 8/20s --- --- 31 v between i/o pins and ground v r = 0v, f = 1mhz --- 8 10 junc t ion capaci t ance c j between i/o pins v r = 0v, f = 1mhz --- 4 5 pf rev. 1 , oct-2010, ksir31 sot-143 dim. min. max. a 0.80 1.22 a1 0.013 0.15 a2 0.75 1.07 b 0.30 0.51 b1 0.76 0.94 d 2.80 3.04 e 2.10 2.64 e1 1.20 1.4 e 1.92 bsc e1 0.20 bsc l 0.40 0.60 all dimensions in millimeter stand-off voltage C 12.0 vol ts power dissipation C 500 watts marking & orientation 1 zhc ym
rating and characteristic curves L50ESDL12VH4-2 figure 1. 8/20 us pulse waveform according to iec 61000-4-5 figure 2. esd pulse waveform according to iec 61000-4-2 1 10 100 1000 10000 1 10 100 1000 pulse time (us) peak pulse power (w) figure 3. power dissipation versus pulse time 0 0.4 0.8 1.2 0 25 50 75 100 125 150 junction temperature ( ) ppp/ppp (25 ) figure 4. peak pulse power versus tj -16 -14 -12 -10 -8 -6 -4 -2 0 0 1 2 3 4 5 6 reverse voltage = vr (v) % change in capacitance figure 5. capactiance versus reverse voltage 0.1 1.0 10.0 100.0 1000.0 0 25 50 75 100 125 150 junction temperature ( ) ir / ir (25 ) figure 6. reverse leakage current versus tj tj =25 , f=1mhz, vosc=100mv tj =25 , tp (us) = 8/20 us exponentially decay waveform
rating and characteristic curves L50ESDL12VH4-2 +/-8kv esd contact discharge v (i/o) i/o1 figure 7. esd test configuration figure 8. clamped +8 kv esd voltage waveform figure 9. clamped -8 kv esd voltage waveform
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