View EMP8021-28VF05NRR_7768586.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

esmt/emp preliminary emp8021 elite semiconductor memory technology inc./elite micropower inc. publication date : apr. 2011 revision : 0.3 1/13 600ma cmos linear regulator general description the emp8021 low-dropout (ldo) cmos linear regulators feature low output voltage noise (63v), low quiescent current (50a), and fast transient response. it guarantees delivery of 600ma output current, and supports preset output voltages ranging from 0.8v to 4.75v with 0.05v increment. the emp8021 is ideal for battery-powered applications by virtue of its low quiescent current consumption and its 1na shutdown mode of logical operation. the regulator provides fast turn-on and start-up time by using dedicated circuitry to pre-charge an optional external bypass capacitor. this bypass capacitor is used to reduce the output voltage noise without adversely affecting the load transient response. the regulator is stable with small ceramic capacitive loads (2.2f typical). additional features include bandgap voltage reference, constant current limiting and thermal overload protection. the emp8021 is available in miniature 5-pin sot-23-5 package. applications g wireless handsets g pcmcia cards g dsp core power g hand-held instruments g battery-powered systems g portable information appliances features g miniature sot-23-5 packages g 600ma guaranteed output current g 63v rms output voltage noise (10hz to 100khz) (vout=3.3v, cbypass=10nf) g 580mv typical dropout at 600ma(vout=3.3v) g 270mv typical dropout at 300ma(vout=3.3v) g 50a typical quiescent current g 1na typical shutdown mode g fast line and load transient response g 140s typical fast turn-on time (vout=3.3v, cbypass=10nf) g 2.2v to 5.5v input range g stable with small ceramic output capacitors g over temperature and over current protection g 2% output voltage tolerance typical application
esmt/emp preliminary emp8021 elite semiconductor memory technology inc./elite micropower inc. publication date : apr. 2011 revision : 0.3 2/13 connection diagrams sc-70-5 vout 5 4 1 3 2 cc (nc) vin gnd en order information emp8021-xxvf05nrr xx output voltage vf05 sot-23-5 package nrr rohs & halogen free package rating: -40 to 85c package in tape & reel emp8021-xxvi05nrr xx output voltage vi05 sc-70-5 package nrr rohs & halogen free package rating: -40 to 85c package in tape & reel order, marking & packing information package vout product id. no. of pin en cc (nc) marking packing 2.8 EMP8021-28VF05NRR sot-23-5 3.3 emp8021-33vf05nrr 5 y y tape & reel 3kpcs sc-70-5 3.3 emp8021-33vi05nrr 5 y y tape & reel 3kpcs
esmt/emp preliminary emp8021 elite semiconductor memory technology inc./elite micropower inc. publication date : apr. 2011 revision : 0.3 3/13 pin functions name sot-23-5 function vin 1 supply voltage input require a minimum input capacitor of close to 1f to ensure stability and sufficient decoupling from the ground pin. gnd 2 ground pin cc (nc) 4 compensation capacitor connect an optimum 10nf noise bypass capacitor between the cc and the ground pins to reduce noise in vout. (note. it can be floated, but don?t connect the cc pin to any dc voltage.) en 3 shutdown input set the regulator into the disable mode by pulling the en pin low. to keep the regulator on during normal operation, connect the en pin to vin. the en pin must not exceed vin under all operating conditions. vout 5 output voltage feedback functional block diagram fig.1. functional block diagram of emp8021
esmt/emp preliminary emp8021 elite semiconductor memory technology inc./elite micropower inc. publication date : apr. 2011 revision : 0.3 4/13 absolute maximum ratings (notes 1, 2) vin, vout, ven -0.3v to 6.0v power dissipation (note 5) storage temperature range -65c to 150c junction temperature (t j ) 150c lead temperature (soldering, 10 sec.) 260c esd rating human body model (note 5) 2kv mm 200v operating ratings (note 1, 2) supply voltage 2.2v to 5.5v storage temperature range -40c to 85c thermal resistance ( ja )(note 3) 135c /w(sot-23-5) thermal resistance ( jc )(note 4) 81c /w(sot-23-5) electrical characteristics unless otherwise specified, all limits guaranteed for v in = v out +1v (note 8), ven = v in , c in = c out = 2.2f, c cc = 33nf, t a = 25c. boldface limits apply for the operating temperature extremes: -40c and 85c. symbol parameter conditions min typ (note 6) max units v in input voltage 2.2 5.5 v -2 +2 v otl output voltage tolerance 100a i out 600ma v out (nom) +1v vin 5.5v (note 8) -3 +3 % of v out (nom) i out maximum output current average dc current rating 600 ma i limit output current limit 620 700 ma i out = 0ma 50 supply current i out = 600ma 225 i q shutdown supply current v out = 0v, en = gnd 0.001 1 a v out = 2.8v 644 v do dropout voltage i out = 600ma v out = 3.3v 580 mv line regulation i out = 1ma, (v out + 1v) v in 5.5v (note 9) -0.1 0.02 0.1 %/v v out load regulation 100a i out 600ma 0.001 %/ma e n output voltage noise i out =10ma,10hz f 100khz v out = 3.3v,cbypass = 33nf 63 v rms
esmt/emp preliminary emp8021 elite semiconductor memory technology inc./elite micropower inc. publication date : apr. 2011 revision : 0.3 5/13 i out =10ma,10hz f 100khz v out = 3.3v,cbypass = float 205 v ih , (v out + 1v) v in 5.5v (note 8) 1.2 ven en input threshold v il , (v out + 1v) v in 5.5v (note 8) 0.4 v ien en input bias current en = gnd or vin 0.1 100 na thermal shutdown temperature 167 t sd thermal shutdown hysteresis 30 t on start-up time c out = 10f, v out at 90% of final value 140 s note 1: absolute maximum ratings indicate limits beyond which damage may occur. electrical specifications do not apply when operating the device outside of its rated operating conditions. note 2: all voltages are with respect to the potential at the ground pin. note 3: ja is measured in the natural convection at ta=25 on a high effective thermal conductivity test board (2 layers , 2s0p ) of jedec 51-7 thermal measurement standard. note 4: jc represents the resistance to the heat flows the chip to package top case. note 5: maximum power dissipation for the device is ca lculated using the following equations: ja a t - j(max) t d p = where tj(max) is the maximum junction temperature, ta is the ambient temperature, and ja is the junction-to-ambient thermal resistance. e.g. for the sot-23-5 package ja = 135c/w, t j (max) = 150c and using ta = 25c, the maximum power dissipation is found to be 925mw. the derating factor (-1/ ja ) = -7.4mw/c, thus below 25c the power dissipation fi gure can be increased by 7.4mw per degree, and similarity decreased by this factor for temperatures above 25c. note 6: typical values represent the most likely parametric norm. note 7: human body model: 1.5k in series with 100pf. note 8: condition does not apply to input voltages below 2.2v since this is the minimum input operating voltage. note 9: dropout voltage is measured by reducing v in until v out drops 100mv from its nominal value. dropout voltage does not apply to the regulator versions with v out less than 1.8v.
esmt/emp preliminary emp8021 elite semiconductor memory technology inc./elite micropower inc. publication date : apr. 2011 revision : 0.3 6/13 typical performance characteristics unless otherwise specified, vin = v out (nom) + 1v, c in = c out = 2.2f, c cc = 33nf, t a = 25c, ven = vin. dropout voltage vs. load current (vout=3.3v) quiescent current vs. vin (vout=3.3v) 0 100 200 300 400 500 600 700 800 0 100 200 300 400 500 600 load current (ma) dropout current (mv) 85'c 25'c -40'c ,qsxw9rowdjh9 4xlhvfhqw&xuuhqwx$
& line transient (vout=3.3v, iout=10ma) line transient (vout=3.3v, iout=600ma) load transient (vout=3.3v, iout=1 0ma to 300ma) load transient (v out=3.3v, iout=100ma to 600ma)
esmt/emp preliminary emp8021 elite semiconductor memory technology inc./elite micropower inc. publication date : apr. 2011 revision : 0.3 7/13 typical performance characteristics (cont.) unless otherwise specified, vin = v out (nom) + 1v, c in = c out = 2.2f, c cc = 33nf, t a = 25c, ven = vin. enable response (vout=3.3v, iout=0ma) enable response (vout=3.3v, iout=100ma) psrr vs. frequency (vin=5.0v, vout=3.3v) psrr vs. frequency (vin=4.3v, vout=3.3v) current limit (vout=3.3v) noise level (vout=3.3v, iout=10ma)
esmt/emp preliminary emp8021 elite semiconductor memory technology inc./elite micropower inc. publication date : apr. 2011 revision : 0.3 8/13 application information general description referring to fig.1as shown in the functional block diag ram section, the emp8021 adopts the classical regulator topology in which negative feedback control is used to perform the desired voltage regulating function. the negative feedback is formed by using feedback resistors (r1, r2) to sample the output voltage for the non-inverting input of the error amplifier, whose inverting input is set to the bandgap reference voltage. by virtue of its high open-loop gain, the error amplifier operates to ensure that the sampled output feedback voltage at its non-inverting input is virtually equal to the preset bandgap reference voltage. the error amplifier compares the voltage difference at its inputs and produces an appropriate driving voltage to the p-channel mos pass transistor to control the amount of current reaching the output. if there are changes in the output voltage due to load changes, the feedback resistors regist er such changes to the non-inverting input of the error amplifier. the error amplifier then adjusts its driving voltag e to maintain virtual short between its two input nodes under all loading conditions. in a nutshell, the regulation of the output voltage is achieved as a direct result of the error amplifier keeping its input voltages equal. this negative feedback control topology is further augmented by the shutdown, the fault detection, and the temperature and current protection circuitry. output capacitor the emp8021 is specially designed for use with ceramic output capacitors of as low as 2.2f to take advantage of the savings in cost and space as well as the superior filtering of high frequency noise. capacito rs of higher value or other types may be used, but it is important to make sure its equivalent series resistance (esr) be restricted to less than 0.5 . the use of larger capacitors with smaller esr values is desirable for applications involving large and fast input or output transients, as well as for situations where the application systems are not physically located immediately adjacent to the battery power source. typical ceramic capacitors suitable for use with the emp8021 are x5r and x7r. the x5r and the x7r capacitors are able to maintain their capacitance values to within 20% and 10%, respectively, as the temperature increases. no-load stability the emp8021 is capable of stable operation during no-load conditions, a mandatory feature for some applications such as cmos ram keep-alive operations. input capacitor a minimum input capacitance of 1f is required for emp8021. the capacitor value may be increased without limit. improper workbench set-ups may have adverse effects on the normal operation of the regulator. a case in point is the instability that may result from long supply lead induct ance coupling to the output through the gate capacitance of the pass transistor. this will establish a pseudo lcr networ k, and is likely to happen under high current conditions or near dropout. a 10f tantalum input capacitor will dampen the parasitic lcr action thanks to its high esr. however, cautions should be exercised to avoid regulator short-circ uit damage when tantalum capacitors are used, for they are prone to fail in short-ci rcuit operating conditions. compensation (noise bypass) capacitor substantial reduction in the output voltage noise of the emp8021 is accomplished through the connection of the noise bypass capacitor cc (10nf optimum) between pin 4 and the ground. because pin 4 connects directly to the high
esmt/emp preliminary emp8021 elite semiconductor memory technology inc./elite micropower inc. publication date : apr. 2011 revision : 0.3 9/13 impedance output of the bandgap reference circuit, the level of the dc leakage currents in the cc capacitors used will adversely reduce the regulator output voltage. this sets the dc leakage level as the key selection criterion of the cc capacitor types for use with the emp8021. npo and cog ceramic capacitors typically offer very low leakage. although the use of the cc capacitors does not affect the transient response, it does affect the turn-on time of the regulator. trade off exists between output noise level and turn-on time when selecting the cc capacitor value. power dissipation and thermal shutdown thermal overload results from excessive power dissipation that causes the ic junction temperature to increase beyond a safe operating level. the emp8021 relies on dedica ted thermal shutdown circuitry to limit its total power dissipation. an ic junction temperature tj exceeding 167c will trigger the thermal shutdown logic, turning off the p-channel mos pass transistor. the pass tr ansistor turns on again after the junction cools off by about 30c. when continuous thermal overload conditions persist, this thermal shutdown action then results in a pulsed waveform at the output of the regulator. the concept of thermal resistance ja (c/w) is often used to describe an ic junction?s relative readiness in allowing its thermal energy to dissipat e to its ambient air. an ic junction with a low thermal resistance is preferred because it is relatively effective in dissipating its thermal energy to its ambient, thus resulting in a relatively low and desirable junction temperature. the relationship between ja and tj is as follows: t j = ja (pd) + t a t a is the ambient temperature, and p d is the power generated by the ic and can be written as: p d = i out (v in - v out ) as the above equations show, it is desirable to work with ics whose ja values are small such that t j does not increase strongly with p d . to avoid thermally overloading the emp8021, refrain from exceeding the absolute maximum junction temperature rating of 150c under continuous operating co nditions. overstressing the regulator with high loading currents and elevated input-to-output differential voltages can increase the ic die temperature significantly. shutdown the emp8021 enters the sleep mode when the en pin is low. when this occurs, the pass transistor, the error amplifier, and the biasing circuits, including the bandgap reference, are turned off, thus reducing th e supply current to typically 1na. such a low supply current makes the emp8021 best suited for battery-powered applications. the maximum guaranteed voltage at the en pin for the sleep mode to take effect is 0.4v. a minimum guaranteed voltage of 1.2v at the en pin will activate the emp8021. direct connection of th e en pin to the vin to keep the regulator on is allowed for the emp8021. in this case, the en pin must not exceed the supply voltage vin. fast start-up fast start-up time is important for overall system efficiency improvement. the emp8021 assures fast start-up speed when using the optional noise bypass capacitor (cc). to shorten start-up time, the emp8021 internally supplies a current to charge up the capacitor until it reaches about 90% of its final value.
esmt/emp preliminary emp8021 elite semiconductor memory technology inc./elite micropower inc. publication date : apr. 2011 revision : 0.3 10/13 package outline drawing sot-23-5 o 2 symbpls min. nom. max. a 1.05 1.20 1.35 a1 0.05 0.10 0.15 a2 1.00 1.10 1.20 b 0.30 0.50 c 0.08 0.20 d 2.80 2.90 3.00 e 2.60 2.80 3.00 e1 1.50 1.60 1.70 e 0.95 bsc e1 1.90 bsc l 0.30 0.45 0.55 l1 0.60 ref 0 5 10 2 6 8 10 unit: mm
esmt/emp preliminary emp8021 elite semiconductor memory technology inc./elite micropower inc. publication date : apr. 2011 revision : 0.3 11/13 package outline drawing sc-70-5 o 2 symbpls min. nom. max. a 0.8 1.10 a1 0 0.10 a2 0.8 0.90 1.00 b 0.15 0.30 c 0.08 0.22 d 1.85 2.00 2.15 e 1.8 2.10 2.40 e1 1.10 1.25 1.40 e 0.65 bsc e1 1.30 bsc l 0.26 0.36 0.46 l1 0.42 ref 0 4 8 2 4 12 unit: mm
esmt/emp preliminary emp8021 elite semiconductor memory technology inc./elite micropower inc. publication date : apr. 2011 revision : 0.3 12/13 revision history revision date description 0.1 2010.1.13 original 0.2 2010.08.27 1) added 2.8v vout version. 2) added dropout voltage for vout=2.8v 3) node. 9 item revised. 4) modified i out = 1ma, (v out + 0.5v) v in 5.5v i out = 1ma, (v out + 1v) v in 5.5v for electrical characteristics. 0.3 2011.04.20 add 3.3v option for sc-70 package
esmt/emp preliminary emp8021 elite semiconductor memory technology inc./elite micropower inc. publication date : apr. 2011 revision : 0.3 13/13 important notice all rights reserved. no part of this document may be repr oduced or duplicated in any form or by any means without the prior permission of esmt. the contents contained in this docume nt are believed to be accurate at the time of publication. esmt assumes no responsibility for any error in this document, and reserves the right to change the products or specification in this document without notice. the information contained herein is pr esented only as a guide or examples for the application of our products. no responsibility is assumed by esmt for any infringement of patents, copyrights, or other intellectual property rights of third parties which may result from its use. no license, either express , implied or otherwise, is granted un der any patents, copyrights or other intellectual property righ ts of esmt or others. any semiconductor devices may have in herently a certain rate of failure. to minimize risks associated with cu stomer's application, adequate design and operating safeguards against inju ry, damage, or loss from such failure, should be provided by the customer when making application designs. esmt's products are not authorized for use in critical applications such as, but not limited to, life support devices or system, where failure or abnormal operation may directly affect human lives or cause physical injury or property damage. if products described here are to be used for such kinds of application, purchaser must do its own quality assurance testing appropriate to such applications.

▲Up To Search▲

Price & Availability of EMP8021-28VF05NRR

	To Download EMP8021-28VF05NRR Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .