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10-bit, 40 msps, 3 v, 74 mw a/d converter ad9203 rev. b in fo rmation furn ished by an alog d e v i c e s is believed to be accurate and reliable. how e ver, n o resp on sibili ty is assume d b y a n alog de vices fo r its use, nor for an y i n fri n geme nt s of p a t e nt s or ot h e r ri ght s o f th ird parties th at may result fro m its use . specifications subjec t to chan g e witho u t n o tice. no licen s e is g r an te d by implicati o n or ot herwi s e u n der a n y p a t e nt or p a t e nt ri ghts of analog de v i ces. trademarks an d registered tra d ema r ks are the prop erty o f their respective ow ners. one technolog y way, p.o . box 9106, norwood, ma 02062-9106, u.s.a. t e l: 781. 329. 4 700 www.analog.com fax: 781. 326. 87 03 ? 2004 analog de vices, i n c. al l r i ght s r e ser v ed . features cmos 10-bit, 4 0 msps sampli ng a/d converter power dissipati o n: 74 mw (3 v supply, 40 msp s ) 17 mw ( 3 v sup p ly, 5 msps) operation bet w een 2.7 v and 3.6 v supply differential nonlinearity: ?0.25 lsb power-down (standby) mode, 0.65 mw enob: 9.55 @ f in = 2 0 mh z ou t-of-range ind i cator adjustable on-chip voltage re ference if undersampling up to f in = 1 30 mhz input range: 1 v to 2 v p-p dif f erential or sin gle-ende d adjustable power consumption internal clamp circuit applic ati o ns ccd imaging video portable instrumentation if and baseban d communications cable modems medical ultras ound func tio n a l block di agram 00573-001 sha gain a/d d/a sha gain a/d d/a a/d correction logic ad9203 ou tp u t b u ffe r s 10 + ? 0.5v bandgap reference clk avdd drvdd stby 3 -st a t e otr d 9 (msb ) d 0 (lsb ) drvss dfs pwrcon avss clamp clampin ainp ainn reftf refbf vref refsense fi g u r e 1 . general description the ad9203 is a m o n o l i thic lo w p o w e r , sin g le s u p p l y , 10-b i t, 40 ms ps a n alog-t o-dig i t a l con v er t e r , wi t h an o n -c hi p v o l t a g e r e f e r e n c e . th e ad9203 us es a m u l t is t a g e dif f er en tial p i p e l i n e a r chi t e c t u r e and gua r an t e es n o mis s in g co des o v er t h e f u l l o p era t i n g t e m p era t ur e ra n g e . i t s in p u t ra n g e ma y b e ad j u s t e d betw een 1 v and 2 v p-p . the ad9203 has a n on bo a r d p r og ra mma b l e r e f e r e n c e . an ext e r n al r e fer e nce ca n als o b e ch os e n t o s u i t t h e dc acc u rac y a nd t e m p era t ure dr if t r e q u ir emen ts o f a n a p pli c a t ion. an ext e r n al r e sis t o r ca n be us e d t o r e d u ce p o wer co n s um p t io n when o p era t in g a t lo w e r sam p lin g ra t e s. t h is yie l d s p o wer s a v i n g s fo r us ers w h o do n o t r e q u ir e t h e maxim u m s a m p le ra t e . this f e a t ur e is es p e c i al l y us ef u l a t s a m p le ra t e s f a r be lo w 40 ms ps. e x ce l l en t p e r f o r ma n c e i s s t i l l achi e v e d a t r e d u ce d p o w e r . f o r exa m p l e , 9.7 en o b p e r f o r ma n c e ma y be realize d wi t h o n ly 17 mw o f p o w e r , usin g a 5 mhz clo c k. a sin g le c l o c k in p u t is us e d t o co n t r o l al l in ter n al co n v ersio n c y cles. th e dig i t a l o u t p u t da t a is p r es en t e d i n s t r a ig h t b i na r y o r tw os co m p le m e n t a r y o u t p u t fo r m a t b y usin g t h e d f s p i n. a n out - of - r ange s i g n a l ( o t r ) i n d i c a te s a n o v e r f l o w c o nd it i o n t h a t ca n b e us e d wi t h t h e m o st sig n i f ica n t b i t t o deter m i n e o v er - o r un der r a n g e . the ad9203 can o p era t e wi th a s u p p l y ra n g e f r o m 2.7 v t o 3.6 v , a n a t tra c ti v e o p ti o n f o r lo w p o w e r o p e r a t i o n i n hi gh- s p eed po r t a b l e a p p l ic a t i o n s . the ad9203 is s p ecif ie d o v er ind u s t r i al (?40c t o +85c) t e m p era t ur e ra n g es a n d is a v a i la b l e in a 28-le a d tsso p p a cka g e . product highlights l o w p o we r th e ad9203 co ns um es 74 mw on a 3 v su p p l y o p er a t i n g a t 40 ms ps. i n st andb y m o de, p o w e r is r e d u ce d to 0.65 mw . hi g h p e r f or m a n c e m a i n t ain s bet t er than 9.5 5 en o b a t 40 ms ps in p u t sig n al f r o m dc t o n y q u is t. ve r y s m a l l p a c k a g e the ad9203 is a v a i la b l e in a 28 -lead tsso p . pr o g r a m m a b l e p o w e r th e ad9203 p o w e r can b e f u r t h e r re d u c e d b y u s i n g an e x te r n a l re s i stor a t l o we r s a m p l e r a te s . bu i l t - in c l a m p f u n c t i on a l l o ws dc r e sto r a t i o n o f vi de o sig n als.
ad9203 rev. b | page 2 of 28 table of contents specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 5 thermal characteristics .............................................................. 5 esd caution .................................................................................. 5 pin configuration and function descriptions ............................. 6 ter mi nolo g y ...................................................................................... 7 typical performance characteristics ............................................. 8 operations ....................................................................................... 11 theory of operation .................................................................. 11 operational modes ..................................................................... 11 input and reference overview ................................................. 12 internal reference connection ................................................ 12 external reference operation .................................................. 13 clamp operation ........................................................................ 13 driving the analog input .......................................................... 13 op amp selection guide .......................................................... 14 differential mode of operation ............................................... 15 power control ............................................................................. 16 interfacing to 5 v systems ........................................................ 16 clock input and considerations .............................................. 16 digital inputs and outputs ....................................................... 16 applications ..................................................................................... 18 direct if down conversion ..................................................... 18 ultrasound applications ........................................................... 19 evaluation board ............................................................................ 20 outline dimensions ....................................................................... 25 ordering guide .......................................................................... 25 revision history 8/04data sheet changed from rev. a to rev. b changes to table 5.......................................................................... 16 4/01data sheet changed from rev. 0 to rev. a updated format..................................................................universal changes to tpc 2 ............................................................................. 8 added figures 41 to 46 .................................................................. 23 7/99revision 0: initial version
ad9203 rev. b | page 3 of 28 specifications avdd = 3 v, drvdd = 3 v, f s = 40 msps, input span from 0.5 v to 2.5 v, internal 1 v reference, pwrcon = avdd, 50% clock duty cycle, t min to t max unless otherwise noted. table 1. parameter symbol min typ max unit conditions resolution 10 bits max conversion rate f s 40 msps pipeline delay 5.5 clock cycles dc accuracy differential nonlinearity dnl 0.25 0.7 lsb integral nonlinearity inl 0.65 1.4 lsb offset error e zs 0.6 2.8 % fsr gain error e fs 0.7 4.0 % fsr analog input input voltage range ain 1 2 v p-p input capacitance c in 1.4 pf aperture delay t ap 2.0 ns aperture uncertainty (jitter) t aj 1.2 ps rms input bandwidth (C3 db) bw 390 mhz input referred noise 0.3 mv switched, single-ended internal reference output voltage (0.5 v mode) vref 0.5 v refsense = vref output voltage (1 v mode) vref 1 v refsense = gnd output voltage tolerance (1 v mode) 5 30 mv load regulation 0.65 1.2 mv 1.0 ma load power supply operating voltage avdd 2.7 3.0 3.6 v drvdd 2.7 3.0 3.6 v analog supply current iavdd 20.1 22.0 ma digital supply current idrvdd 4.4 6.0 ma f in = 4.8 mhz, output bus load = 10pf 9.5 14.0 ma f in = 20 mhz, output bus load = 20 pf power consumption 74 84.0 mw f in = 4.8 mhz, output bus load = 10pf 88.8 108.0 mw f in = 20 mhz, output bus load = 20 pf power-down p d 0.65 1.2 mw power supply rejection ratio psrr 0.04 0.25 % f s dynamic performance (ain = 0.5 dbfs) signal-to-noise and distortion 1 sinad f = 4.8 mhz 59.7 db f = 20 mhz 57.2 59.3 db effective bits enob f = 4.8 mhz 1 9.6 bits f = 20 mhz 9.2 9.55 bits signal-to-noise ratio snr f = 4.8 mhz 1 60.0 db f = 20 mhz 57.5 59.5 db total harmonic distortion thd f = 4.8mhz ?76.0 db f = 20 mhz ?74.0 ?65.0 db spurious-free dynamic range sfdr f = 4.8 mhz 1 80 db f = 20 mhz 67.8 78 db
ad9203 r e v. b | pa ge 4 o f 2 8 parameter symbol min typ max unit conditions two-tone intermodulation dist ortion imd 68 db f = 44.49 mhz a n d 45.52 mhz differential phase dp 0.2 degree ntsc 40 i r e ramp differential gain dg 0.3 % digital inpu ts high input volt age v ih 2 . 0 v low input voltage v il 0 . 4 v clock pulse wid t h high 11.25 ns clock pulse wid t h low 11.25 ns clock peri od 2 25 ns digital outpu t s high-z leakage i oz 5.0 a output = 0 to d rvdd data valid delay t od 5 ns c l = 20 pf data enable delay t den 6 ns c l = 20 pf data high-z delay t dhz 6 ns c l = 20 pf logic output (with drvdd = 3 v) high level output voltage (i oh = 50 a) v oh 2.95 v high level output voltage (i oh = 0.5 ma) v oh 2.80 v low level outp ut voltage (i ol = 1.6 ma) v ol 0.3 v low level outp ut voltage (i ol = 50 a) v ol 0.05 v 1 d i ffe ren t i a l in put ( 2 v p- p). 2 the ad9203 will c o nvert at cl ock rates as low as 20 khz. 00573-002 n n+1 n?1 n+2 n+3 n+4 n+5 n+6 a nalog input data out n?7 n ?6 n ? 5 n ? 4 t od = 3ns min 7ns max (c load = 20pf) n? 3 n ? 2 n? 1 n n+1 clock f i g u re 2. ti ming d i ag r a m
ad9203 r e v. b | pa ge 5 o f 2 8 absolute maximum ratings table 2. parameter with respect to min max unit avdd avss C0.3 +3.9 v drvdd drvss C0.3 +3.9 v avss drvss C0.3 +0.3 v avdd drvdd C3.9 +3.9 v refcom avss C0.3 +0.3 v clk avss C0.3 avdd + 0.3 v digital outputs drvss C0.3 drvdd + 0.3 v ainp ainn avss C0.3 avdd + 0.3 v vref avss C0.3 avdd + 0.3 v refsense avss C0.3 avdd + 0.3 v reftf, refbf avss C0.3 avdd + 0.3 v stby avss C0.3 avdd + 0.3 v clamp avss C0.3 avdd + 0.3 v clampin avss C0.3 avdd + 0.3 v pwrcon avss C0.3 avdd + 0.3 v dfs avss C0.3 avdd + 0.3 v 3-state avss C0.3 avdd + 0.3 v ju nct i on temperature 150 c storage temperature C65 +150 c lead temperature (10 s) 300 c s t r e s s es a b o v e t h os e list e d u nde r a b s o l u te m a xim u m r a t i n g s ma y ca us e p e r m a n e n t dama ge to t h e de vi ce. t h is is a st r e ss r a t i ng on ly ; f u n c t i on a l op e r at i o n of t h e d e v i c e a t t h e s e or an y o t h e r con d i t ions a b o v e t h o s e i ndic a te d i n t h e op er a t io na l s e c t io n s o f t h is sp e c if ic a t ion is n o t im pli e d . e x p o sur e t o a b s o l u te max i m u m ra t i n g s fo r ex tende d p e r i o d s ma y a f fe c t de vice rel i a b i l i t y . thermal c h aracteristics 28-l e ad tsso p j a = 97.9c/w j c = 14.0c/w esd caution esd (electrostatic discharge) sensitive device. ele c tros tatic charg e s as high as 4000 v readily accumulate on the human body and test eq uipment and can discharge wi thout detection. although this product features proprietary esd protection circu i try, permanent dama ge may occur on devices subjected to high energy electrostatic discharges. theref ore, prop er esd precautions a r e recommended to avoid perform a nce degradation or l o ss of functiona l ity.
ad9203 r e v. b | pa ge 6 o f 2 8 pin conf iguration and fu nction descriptions 00573-003 dfs otr (msb) d9 d8 d7 d6 d5 drvss drvdd (lsb) d0 d1 d4 d3 d2 clk 3-state stby refsense clamp clampin pwrcon ad9203 top view (not to scale) avdd avss ainn ainp reftf vref refbf 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 f i gure 3. pin config ur ation ta ble 3. pi n f u nct i on d e s c ri pt i o ns pin name description 1 drvss digital ground. 2 drvdd digital supply. 3 d0 bit 0, least significant bit. 4 d1 bit 1. 5 d2 bit 2. 6 d3 bit 3. 7 d4 bit 4. 8 d5 bit 5. 9 d6 bit 6. 10 d7 bit 7. 11 d8 bit 8. 12 d9 bit 9, most significant bit. 13 ot r out-of-range indicator. 14 dfs data format select hi: tw os complement; lo: straight binary. 15 clk clock in put. 16 3-state hi: high impedance state outpu t ; lo: active dig i tal output driv es. 17 stby hi: power-down mode; lo: nor m al oper a tion. 18 refsense reference select. 19 clamp hi: enable clamp; lo: open clamp. 20 clampin clamp signal input. 21 pwrcon power control input. 22 reftf top reference decoupling. 23 vref reference in/ou t . 24 refbf bottom reference decoupling. 25 ainp noninverting analog input. 26 ainn inverting analog input. 27 avss analog ground. 28 avdd analog supply.
ad9203 rev. b | page 7 of 28 terminology integral nonlinearity error (inl) linearity error refers to the deviation of each individual code from a line drawn from negative full scale through positive full scale. the point used as negative full scale occurs 1/2 lsb before the first code transition. positive full scale is defined as a level 1 1/2 lsb beyond the last co de transition. the deviation is measured from the middle of each particular code to the true straight line. differential nonlinearity error (dnl, no missing codes) an ideal adc exhibits code transitions that are exactly 1 lsb apart. dnl is the deviation from this ideal value. guaranteed no missing codes to 10-bit resolution indicates that all 1024 codes respectively, must be present over all operating ranges. signal-to-noise and distortion (s/n+d, sinad) ratio s/n+d is the ratio of the rms value of the measured input signal to the rms sum of all other spectral components below the nyquist frequency, including harmonics but excluding dc. the value for s/n+d is expressed in decibels. effective number of bits (enob) for a sine wave, sinad can be expressed in terms of the number of bits. using the following formula, n = ( sinad C 1.76)/6.02 it is possible to get a measure of performance expressed as n , the effective number of bits. thus, effective number of bits for a device for sine wave inputs at a given input frequency can be calculated directly from its measured sinad. total harmonic distortion (thd) thd is the ratio of the rms sum of the first six harmonic components to the rms value of the measured input signal and is expressed as a percentage or in decibels. signal-to-noise ratio (snr) snr is the ratio of the rms value of the measured input signal to the rms sum of all other spectral components below the nyquist frequency, excluding harmonics and dc. the value for snr is expressed in decibels. spurious-free dynamic range (sfdr) the difference in db between the rms amplitude of the input signal and the peak spurious signal. offset error first transition should occur for an analog value 1/2 lsb above negative full scale. offset error is defined as the deviation of the actual transition from that point. gain error the first code transition should occur at an analog value 1/2 lsb above negative full scale. the last transition should occur for an analog value 1 1/2 lsb below the positive full scale. gain error is the deviation of the actual difference between first and last code transitions and the ideal difference between first and last code transitions. power supply rejection the specification shows the maximum change in full scale from the value with the supply at the minimum limit to the value with the supply at its maximum limit. aperture jitter aperture jitter is the variation in aperture delay for successive samples and is manifested as noise on the input to the a/d. aperture delay aperture delay is a measure of the sample-and-hold amplifier (sha) performance and is measured from the rising edge of the clock input to when the input signal is held for conversion. pipeline delay (latency) the number of clock cycles between conversion initiation and the associated output data being made available. new output data is provided on every rising edge.
ad9203 r e v. b | pa ge 8 o f 2 8 typical perf orm ance cha r acte ristics a v d d = 3 v , dr vd d = 3 v , f s = 40 ms ps, 1 v i n t e r n al ref e r e n c e , p w rco n = a v d d , 50 % du ty c y c l e , u n les s o t h e r w is e n o t e d . 61 47 49 51 53 55 57 59 0 2 0 4 0 6 0 8 0 100 120 00573-004 input frequency (mhz) s nr (db) 2v differential input 1v differential input 1v single-ended input 2v single-ended input f i gure 4. snr vs. in put f r equ e nc y and c o nfigur ation 60 35 40 45 50 55 9.6 5.5 6.3 7.1 8.0 8.8 0 2 0 4 0 6 0 8 0 100 120 00573-005 input frequency (mhz) s i nad (db) en ob 2v differential input 1v differential input 1v single- ended input 2v single- ended input f i gure 5. sinad vs. input f r equenc y an d c o nfigu r at ion ?40 ?45 ?50 ?55 ?60 ?65 ?70 ?75 0 2 04 06 08 0 1 0 0 1 2 0 00573-006 input frequency (mhz) thd (db) ? 0.5db ?20db ? 6.0db f i gure 6. t h d vs . in put f r equ e nc y and a m plitud e ( d if f e r e nt ia l inp u t v r e f = 0. 5 v ) 35 85 80 75 70 65 60 55 50 45 40 0 2 04 06 08 0 1 0 0 1 2 0 00573-007 input frequency (mhz) s f dr (db) 2v differential input 1v differential input 1v single- ended input 2v single- ended input f i gure 7. sfdr vs. i n put f r equenc y an d c o nfigu r at ion ?30 ?35 ?40 ?45 ?50 ?55 ?60 ?65 ?70 ?75 ?80 0 2 04 06 08 0 1 0 0 1 2 0 00573-008 input frequency (mhz) thd (db) 1v differential input 1v single- ended input 2v single- ended input 2v differential input 1v differential input 1v single- ended input 2v single- ended input f i gure 8. t h d vs. in put f r equ e nc y and c o nfigur ation ?35 ?75 ?65 ?55 ?45 0 2 04 06 08 0 1 0 0 1 2 0 00573-009 input frequency (mhz) thd (db) ? 0.5db ? 20db ?6.0db f i gure 9. t h d vs . in put f r equ e nc y and a m plitud e ( d if f e r e nt ia l inp u t v r e f = 1 v )
ad9203 r e v. b | pa ge 9 o f 2 8 n? 1 n n+1 00573-010 code hits 1.2e+07 1.0e+07 8.0e+06 4.0e+06 6.0e+06 0.0e+00 2.0e+06 4560 10310 10000000 f i g u re 10. ground e d input h i s t og r a m 40 80 85 70 65 60 55 50 45 0 1 02 03 04 05 06 0 00573-011 sample rate (msps) + s nr/? t hd (db) ?thd snr f i g u re 11. snr and thd v s . s a mp le ra te (f in = 2 0 mh z) ? 1.0 ? 0.8 ? 0.6 ? 0.4 ? 0.2 0 0.2 0.4 0.6 0.8 1.0 0 100 200 300 400 500 600 700 800 900 1024 00573-012 lsb f i g u re 12. t y pic a l i n l p e r f or man c e ? 1.0 ? 0.8 ? 0.6 ? 0.4 ? 0.2 0 0.2 0.4 0.6 0.8 1.0 0 100 200 300 400 500 600 700 800 900 1024 00573-013 lsb f i g u re 13. t y pic a l d n l p e r f or man c e ? 120 ? 110 ? 100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 0e+0 2.5e+6 5.0e+6 7.5e+6 10.0e+6 12.5e+6 15.0e+6 17.5e+6 20.0e+6 00573-014 db snr = 59.9db thd = ? 75db sfdr = 82db f i gure 14. sing le t o ne f r equ e nc y d o main p e r f or manc e (i nput f r equenc y = 10 m h z, s a mp le ra te = 4 0 m s ps 2 v d i f f e r e nt i a l input , 81 92 p o int fft ) 50 75 70 65 60 55 80 2.5 3.0 3.5 4.0 00573-015 supply voltage (v) + s nr/? t hd (db) ?thd snr f i gure 15. snr and thd vs. p o w e r sup p ly (f in = 20 m h z, s a m p le rate = 4 0 ms ps )
ad9203 rev. b | page 10 of 28 ?9 0 ?1 ?2 ?3 ?4 ?5 ?6 ?7 ?8 10 100 1000 00573-016 input frequency (mhz) amp l i t ude (db) f i gure 16. f u ll p o wer b a ndw i dth 0 500 1000 1500 2000 2500 3000 3500 0 800 600 400 200 1000 00573-017 off-time (ms) w ake -up ti me ( s) 0.5v reference 1v reference f i gure 17. w a k e -u p t i me vs . o ff t i me ( v ref d e c o up ling = 10 f) ?0.4 0.2 0.1 0 ?0.1 ?0.2 ?0.3 ? 4 0 ? 20 0 2 0 4 0 6 0 8 0 100 00573-018 temperature ( c) v re f e rror (%) 1v 0.5v f i gure 18. r e ference v o ltage v s . t e mper atu r e
ad9203 rev. b | page 11 of 28 operations theory of operation the ad9203 implements a pipelined multistage architecture to achieve high sample rates while consuming low power. it distributes the conversion over several smaller a/d subblocks, refining the conversion with progressively higher accuracy as it passes the results from stage to stage. as a consequence of the distributed conversion, the ad9203 requires a small fraction of the 1023 comparators used in a traditional 10-bit flash-type a/d. a sample-and-hold function within each of the stages permits the first stage to operate on a new input sample while the remaining stages operate on preceding samples. each stage of the pipeline, excluding the last, consists of a low resolution flash a/d connected to a switched capacitor dac and interstage residue amplifier (mdac). the residue amplifier magnifies the difference between the reconstructed dac output and the flash input for the next stage in the pipeline. one bit of redundancy is used in each one of the stages to facilitate digital correction of flash errors. the last stage simply consists of a flash a/d. the input of the ad9203 incorporates a novel structure that merges the input sample-and-hold amplifier (sha) and the first pipeline residue amplifier into a single, compact switched capacitor circuit. this structure achieves considerable noise and power savings over a conventional implementation that uses separate amplifiers by eliminating one amplifier in the pipeline. by matching the sampling network of the input sha with the first stage flash a/d, the ad9203 can sample inputs well beyond the nyquist frequency with no degradation in performance. sampling occurs on the falling edge of the clock. operational modes the ad9203 may be connected in several input configurations, as shown in table 4. the ad9203 may be driven differentially from a source that keeps the signal peaks within the power supply rails. alternatively, the input may be driven into ainp or ainn from a single-ended source. the input span will be 2 ? the programmed reference voltage. one input will accept the signal, while the opposite input will be set to midscale by connecting it to the internal or an external reference. for example, a 2 v p-p signal may be applied to ainp while a 1 v reference is applied to ainn. the ad9203 will then accept a signal varying between 2 v and 0 v. see figure 19, figure 20, and figure 21 for more details. the single-ended (ac-coupled) input of the ad9203 may also be clamped to ground by the internal clamp switch. this is accomplished by connecting the clamp pin to ainn or ainp. digital output formats may be configured in binary and twos complement. this is determined by the potential on the dfs pin. if the pin is set to logic 0, the data will be in straight binary format. if the pin is asserted to logic 1, the data will be in twos complement format. power consumption may be reduced by placing a resistor between pwrcon and avss. this may be done to conserve power when not encoding high-speed analog input frequencies or sampling at the maximum conversion rate. see the power control section for more information. table 4. modes name figure number advantages 1 v differential figure 28 with vref connected to refsense differential modes yield the best dynamic performance 2 v differential figure 28 with refsense connected to agnd differential modes yield the best dynamic performance 1 v single-ended figure 20 video and applications requiring clamping require single-ended inputs 2 v single-ended figure 19 video and applications requiring clamping require single-ended inputs
ad9203 rev. b | page 12 of 28 input and reference overview l i k e t h e vol t a g e a p plie d to t h e to p o f t h e r e sistor ladder in a f l a s h a/ d co n v er t e r , th e val u e vr ef d e f i n e s t h e m a xi m u m in p u t v o l t a g e t o t h e a/d co r e . th e minim u m i n p u t v o l t a g e t o th e a / d co r e i s a u t o ma ti call y d e f i n e d t o b e ?vr e f . the addi t i o n o f a dif f er en t i al in p u t s t r u c t ur e g i v e s t h e us er a n a d di ti o n al lev e l o f f l e x i b ili t y th a t i s n o t pos s i b le w i th trad i t i o n a l f l as h con v er t e rs . the i n p u t s t a g e al lo ws t h e us e r t o e a si l y co nf igur e t h e in p u ts fo r ei t h er sin g le -e n d e d o p e r a t io n o r dif f er en t i al o p er a t io n. th e a / d s in p u t s t r u c t ure al lo ws t h e dc o f fs et o f t h e i n pu t sig n al t o b e v a r i e d i n dep e nden t l y o f t h e i n pu t sp a n o f t h e con v er t e r . s p e c if ica l ly , t h e in p u t t o t h e a/ d co r e is t h e dif f er en c e o f t h e v o l t a g es a pplie d a t t h e ai np a nd ai nn in p u t p i ns. th erefo r e , t h e e q ua t i o n , v co r e = ainp ? ainn (1) def i n e s t h e o u t p u t o f t h e dif f er en t i al i n p u t s t a g e a nd p r o v ides t h e in p u t t o t h e a/d co r e . the vol t ag e, v co r e , m u s t sa ti sf y th e co n d i t i o n , ? vref v co r e v r ef (2) w h er e vref i s th e v o l t a g e a t th e vref pi n . the ac t u a l s p a n (ainp ? ai nn) o f th e ad c is vref . w h i l e an i n f i ni te co m b in a t ion o f ainp and ai nn in pu ts exist th a t s a ti sf y eq ua ti o n 2, a n ad di ti o n al li mi t a ti o n i s p l a c e d o n t h e in p u ts b y the p o w e r s u p p l y v o l t a g es o f the ad9 203. the p o wer s u p p lies b o u n d t h e vali d o p er a t in g ra n g e fo r ainp an d ainn. the con d i t ion, av s s ? 0.3 v < ainp < av d d + 0.3 v av s s ? 0.3 v < ainn < av d d + 0.3 v (3) w h er e a v ss is n o m i na l l y 0 v and a v dd is n o mina l l y 3 v , def i n e s t h is r e quir em e n t. t h e r a n g e o f va li d i n p u ts fo r ainp a nd ai nn is an y co m b ina t io n t h a t s a t i sf ies b o t h e q u a t i o n s 2 a nd 3. internal reference connection a co m p a r a t o r wi thin t h e ad9 203 wil l det e c t t h e p o t e n t ial o f t h e vref p i n. i f refs ens e is g r o u n d e d , t h e refer e n c e a m plif ier sw i t ch wi l l co n n e c t t o t h e r e sist o r divi der (s e e f i gur e 19). tha t wil l mak e vref eq ual t o 1 v . i f r e sis t ors a r e p l aced betw een vref , refs ens e an d g r o u n d , t h e swi t c h will be co nn e c te d to t h e ref s ens e p o si t i o n and t h e refer e n c e a m pli t ud e w i l l dep e nd o n t h e e x ter n a l p r o g r a mming r e sisto r s (f igur e 21). i f refs ens e is tie d t o vref , t h e s w i t c h wil l als o co nn e c t t o ref s ens e an d t h e r e fer e n c e v o l t a g e wi l l b e 0.5 v (f igur e 20). reftf a nd refbf wi l l dr i v e t h e a d c co n v ersio n co r e a nd est a b l i s h i t s max i m u m a nd mi ni m u m sp a n . t h e r a n g e o f t h e a d c wi l l e q ual t w ic e t h e v o l t a g e a t t h e r e fer e n c e p i n fo r ei t h er a n in t e r n al o r ext e r n al r e fer e n c e . f i g u re 1 9 i l lu st r a te s t h e i n p u t c o n f i g u r e d w i t h a 1 v re f e re nc e. this wil l s e t t h e sin g le-ended in p u t o f the ad92 03 in t h e 2 v s p a n (2 vref ). this exa m ple s h o w s t h e ainn i n p u t is t i e d to th e 1 v vref . this wil l co nf ig ur e th e ad9203 t o accep t a 2 v in p u t cen t er ed ar o u n d 1 v . 00573-019 adc core + 10 p f 0.1 p f 0.1 p f 0.1 p f 0.1 p f 10 p f ainp ainn vref 0.5v reftf refbf refsense 2v 0v ad9203 2v 1v logic f i gure 19. inte rn al r e fer e n c e s e t fo r a 2 v sp an f i gur e 20 il l u s t ra t e s t h e in p u t c o nf igur ed wi t h a 0.5 v r e f e r e n c e . this wi l l s e t t h e sin g le-e nde d in p u t o f t h e ad c in a 1 v sp a n (2 vref). the ainn in p u t is tied t o t h e 0.5 vref . this wil l co nf igur e th e ad9203 t o accep t a 1 v in p u t cen t er ed a r o u n d 0.5 v . 00573- 020 adc core + logic ainp ainn vref 0.5v reftf refbf refsense 1v 0v 1.75v 1.25v ad9203 0.1 p f 0.1 p f 0.1 p f 0.1 p f 10 p f 10 p f f i gure 20. inte rn al r e fer e n c e s e t fo r a 1 v sp an f i g u re 2 1 s h o w s t h e re f e re n c e p r o g r a m m e d b y e x te r n a l re s i stor s f o r 0.75 v . this wil l s e t t h e ad c t o r e cei v e a 1. 5 v s p a n cen t er e d abo u t 0.75 v . th e r e f e r e n c e is p r og ra mm e d acco rding t o th e alg o ri thm : vref = 0.5 v [1 + ( ra / r b )]
ad9203 00573- 021 0.1 f 10 f rev. b | page 13 of 28 adc core + ? logic ainp ainn vref 0.5v reftf refbf refsense 1.5v 0v 1.875v 1.125v ad9203 0.1 f 0.1 f 0.1 f 10 f r b r a f i g u re 21. p r og r a m m ab le r e f e rence conf ig ur at i o n external r e ference operation f i g u re 2 2 i l lu st r a te s t h e u s e of a n e x te r n a l re f e re nc e. a n e x te r n a l re f e re n c e m a y b e ne c e s s ar y for s e ve r a l re a s ons . t i g h te r r e fer e n c e t o lera n c e wi l l e n han c e t h e acc u rac y o f t h e ad c and wi l l al lo w lo w e r t e m p era t ur e dr if t p e r f o r ma n c e . w h en s e v e ra l ad cs t r ack o n e a n o t h e r , a sin g l e r e fer e n c e (i n t e r na l o r ext e r n al) wil l be n e ces s a r y . the ad9203 wil l dr a w les s p o w e r w h en an ext e r n al r e fer e n c e is us e d . w h en t h e refs ens e p i n is tie d t o a v d d , t h e in t e r n al r e fer e n c e w i l l b e dis a b l e d , al lo wi n g t h e us e o f a n ext e r n al re f e re nc e. the ad9203 con t a i n s a n in t e r n al r e f e r e n c e b u f f er . i t wil l lo ad t h e ext e r n al r e fer e n c e w i t h an e q ui vale n t 10 k? lo ad . the in t e r n al b u f f er wil l g e n e ra t e p o si ti v e and n e ga t i v e f u l l -s cale re f e re nc e s f o r t h e a d c c o re. i n f i gur e 22, a n ext e r n al r e f e r e n c e is us e d t o s e t the mids cal e s e t p o in t fo r sin g le- e nde d us e. a t t h e s a me t i m e , i t s e ts t h e in p u t vol t a g e sp an t h ro ug h a r e sist o r divid e r . i f t h e a d c is b e in g dr i v en dif f er en t i al l y t h r o ug h a t r a n sfo r m e r , t h e ext e r n al r e fer e n c e can s e t t h e cen t er t a p (co m m o n- m o de v o l t a g e). 00573-022 10 f 0.1 f 0.1 f 0.1 f 1.0v 2.0v vref ad9203 5v 1.5k ? 3.0v refsense a3 avdd ainp ainn external ref (2v) 1v 1.5k ? f i g u re 22. e x ter n a l r e f e r e n c e conf ig u r at io n clamp operation the ad9203 con t a i n s a n in t e r n al c l am p . i t ma y be us e d w h en o p e r a t in g t h e in p u t in a sin g le - e n d e d m o d e . t h is c l a m p i s v e r y u s e f u l for cl am pi ng n t s c a n d p a l v i d e o s i g n a l s to g r ou nd. the clam p canno t b e us e d i n t h e dif f er en t i al in p u t m o de . 00573-023 1v p-p 0v dc refsense vref ainn c in clampin clamp ad9203 ainp sw1 50 ? typ adc core f i g u re 23. cl amp conf ig ur at i o n ( v r e f = 0.5 v ) fi g u r e 2 3 s h ow s t h e i n t e r n a l c l a m p c i r c u i t r y a n d t h e e x t e r n a l co n t r o l sig n als n e e d e d fo r c l a m p o p era t io n. t o ena b le t h e c l a m p , a p p l y a logi c h i gh 1 t o th e cla m p p i n . t h i s w i ll c l ose sw1, t h e in t e r n al swi t ch. sw1 is o p en ed b y as s e r t in g the cl amp p i n lo w 0. th e ca p a ci to r h o lds the v o l t a g e acr o s s c in co n s t a n t un t i l t h e n e xt in t e r v al . the cha r g e o n t h e ca p a c i t o r w i l l l e a k of f a s a f u n c t i on of i n put bi a s c u r r e n t ( s e e f i g u re 2 4 ) . ?50 250 200 150 100 50 0 0 0.5 1.0 1.5 2.0 2.5 3.0 00573-024 input voltage (v) i n p u t bi as ( a) f i gure 24. input b i a s current v s . input v o ltag e (f s = 40 msp s ) driving th e analog input f i gur e 25 il l u s t ra t e s t h e e q ui val e n t a n alog in p u t o f th e ad9203 , (a swi t ch e d ca p a ci t o r in p u t). b r in g i ng clk t o a log i c hig h , o p en s s3 and clo s es s1 a nd s2. the i n p u t s o ur c e co nne c t e d to ain and m u st cha r ge c a p a ci to r c h d u rin g th i s tim e . b r i n g i n g clk t o a log i c l o w o p ens s2, and t h en s1 op en s fol l o w e d b y closin g s3. this p u ts t h e in pu t i n t h e h o ld m o d e .
ad9203 rev. b | page 14 of 28 00573-025 s2 s3 s1 ad9203 c h c h c p c p f i gu r e 2 5 . i n pu t a r ch i t ectu r e the s t r u c t ur e o f t h e in p u t sh a places cer t a i n r e q u ir e m en ts o n t h e in p u t dr i v e s o ur ce . th e com b ina t io n o f t h e p i n ca p a c i t a n c e , c p , a nd t h e h o ld ca p a c i t a n c e, c h , is typ i cal l y les s tha n 5 pf . th e in p u t s o ur ce m u s t be ab le t o c h a r g e o r dis c ha rg e this ca p a ci t a n c e t o 1 0 -b i t acc u rac y i n o n e ha lf o f a clo c k c y cle. w h en t h e s h a go es in t o t r ack m o de , t h e in p u t s o ur ce m u s t charge or dis c harge c a p a c i tor c h f r o m t h e v o l t ag e alr e ad y s t o r e d on c h to t h e ne w vol t age. i n t h e worst c a s e , a f u l l - s c a l e vol t age s t ep o n t h e i n p u t s o ur ce m u st p r o v i d e t h e cha r g i n g c u r r en t th r o ugh t h e r on (100 ?) o f s w i t c h 1 a nd q u ickly (wi t hin 1 / 2 clk p e r i o d ) s e t t le . this s i t u a t ion co r r esp o n d s to dr i v in g a lo w in p u t i m p e dan c e. a d ding s e r i es r e sist a n ce b e twe e n t h e o u t p ut o f t h e sig n al s o ur ce a nd t h e ai n p i n r e d u ces t h e dr i v e r e q u ir emen ts p l ace d o n the sig n al s o ur ce . f i gur e 26 sh o w s t h is co nf igura t io n. the b a n d w i d t h o f t h e p a r t ic u l a r a p plic a t ion limi ts t h e si ze of t h is r e sist o r . t o ma in t a in t h e p e r f o r ma n c e o u tlin e d in t h e da ta sh ee t s p ecif i c a t i o n s , th e r e si s t o r s h o u ld b e l i mite d to 5 0 ? or l e ss . th e s e r i e s i n put re s i stor c a n b e u s e d to is ola t e t h e dr i v er f r o m th e ad9 203 s swi t ch e d c a p a ci t o r in p u t. th e e x te r n a l c a p a c i tor ma y b e s e l e c t e d to l i mit t h e b a ndw i d t h in t o t h e ad920 3. t w o in p u t rc n e tw o r ks sh ou ld be us e d t o b a lan c e dif f er en t i al in p u t dr i v e s c h e m e s (f igure 26). the in p u t s p a n o f th e ad9203 is a f u n c t i o n o f t h e r e f e r e n c e v o l t a g e . f o r m o r e info r m a t io n rega r d in g t h e i n p u t ra n g e , s e e t h e i n te r n a l r e fe re nc e c o n n e c t i on a n d e x te r n a l r e fe re nc e o p era t ion s e c t i o n s o f t h e da t a sh e e t . 00573-026 ain v s <50 ? ad9203 f i gur e 2 6 . sim p le a d 9 203 dri v e co nfigur a t io n i n man y ca s e s, p a r t ic u l a r ly in sin g le -su p ply o p era t io n, ac co u p lin g o f fers a co n v enie n t wa y o f b i asin g t h e a n a l og in p u t sig n al t o t h e p r o p er sig n al ra n g e . f i gur e 27 sh o w s a typ i cal co nf igura t io n fo r ac-co u plin g t h e a n a l og in pu t s i g n a l t o t h e ad9203. m a in t a inin g t h e sp ecif ica t io n s o u tlin e d in t h e da ta s h e e t r e q u ir es c a r e f u l s e le c t io n o f t h e com p on e n t va l u es. th e m o st im p o r t a n t is t h e f C3 db hig h -p ass co r n er f r e q uen c y . i t is a f u n c t i on o f r2 and t h e p a r a l l el c o m b in a t io n o f c1 a nd c2. 00573-027 ain r1 r2 v bias v in avdd/2 + ? c1 c2 ad9203 f i g u r e 2 7 . a c - c o u pl e d i n pu t the f C3 db p o in t c a n b e a p p r o x im a t e d b y t h e e q u a t i o n : f ?3db = 1/(2 [ r2 ] c eq ) w h er e c eq is t h e p a ra l l e l co m b in a t io n o f c1 and c2. n o te t h a t c 1 i s t y p i call y a la r g e e l ectr o l yti c o r ta n t al um ca pa ci t o r th a t be com e s ind u c t i v e a t hig h f r e q uen c ies. a d d a s m al l cera mic o r p o l y s t yr ene c a p a ci t o r (o n t h e or der o f 0.01 f) tha t is n e g l ig i b ly ind u c t iv e a t hig h er f r e q uen c ie s w h i l e main t a in i n g a lo w im p e dan c e o v er a w i de f r e q ue nc y r a n g e. ther e a r e addi t i o n al co n s idera t io n s w h en ch o o s i n g t h e r e sis t o r val u es fo r a n ac-co u ple d i n p u t. the ac-co u pl ing ca p a ci t o rs in teg r a t e t h e s w i t chin g t r a n sie n ts p r es en t a t t h e in p u t o f t h e ad9203 an d ca us e a n e t dc b i as c u r r en t, ib , t o f l o w in t o t h e in p u t. the ma g n i t ude o f t h e b i as c u r r en t in cr e a s e s as t h e sig n a l cha n ges a nd as t h e clo c k f r e q uen c y in cr e a s e s. t h is b i as c u r r en t wil l r e s u l t in an o f fs et er r o r o f (r1 + r2) ib . i f i t is n e ces s a r y t o co m p ens a te fo r t h is er r o r , co n s ider m o dif y in g vbi a s t o ac c o u n t for t h e re su l t an t of f s e t . i n s y ste m s t h a t m u st u s e dc co u p ling, us e an o p a m p to l e vel sh if t g r o u nd- r e fer e n c e d sig n a l s t o co m p l y wi th th e in p u t r e q u ir em en ts o f t h e ad9203. op am p selection guide o p a m p s e lec t io n f o r th e ad9 203 is hig h l y a p p l ica t ion dep e nden t . i n gen e ral , t h e p e r f o r ma n c e r e q u ir em e n ts o f an y g i ven a p plic a t ion can b e cha r ac ter i ze d b y ei t h e r t i me do ma i n or f r e q uen c y do ma in co nst r a i n t s. i n e i t h er cas e , on e sh o u ld ca r e f u l l y s e le c t a n o p a m p t h a t p r es er v e s t h e p e r f o r ma n c e o f t h e a/d . t h is t a sk b e com e s cha l le n g in g w h en on e co n s iders t h e ad9203 s hig h p e r f o r ma n c e c a p a b i li t i es co u p l e d wi t h o t h e r sys t em le ve l r e quir em e n ts s u c h as p o w e r co n s u m p t ion an d cost. the a b i l i t y t o s e le c t t h e o p t i mal o p a m p ma y b e f u r t h e r co m p lic a t e d b y ei t h er limi t e d p o w e r s u p p l y a v ailab i li ty an d/o r limi t e d accept ab le su p p lies fo r a desir e d o p am p . n e w e r , hi g h p e r f or m a nc e op am p s t y pi c a l l y h a ve i n put a n d output r a nge li m i ta ti o n s in a c co r d a n ce wi th t h e i r lo w e r s u p p ly v o l t a g e s . a s a r e s u l t , s o m e o p a m ps wi l l b e mo r e a p p r o p r i a t e in sys t e m s w h ere a c c o upl i ng i s a l l o we d. whe n d c c o upl i ng i s re qu i r e d , t h e he a d ro om c o ns t r ai n t s of op a m p s ( s u c h a s r a i l - t o - r a i l op am p s ) o r o n es w h er e l a rg er s u p p lies c a n b e us e d , sh ou ld b e co n s ider ed . t h e f o ll o w i n g s e cti o n d e sc ri be s so m e o p a m p s cu rr e n tl y a v ai l a bl e f r om a n a l o g d e v i c e s . pl e a s e c o n t a c t t h e f a c t or y or lo cal s a les o f f i ce f o r u p da t e s on analog d e vices la t e s t am p l if ier pro d u c t of f e r i ng s .
ad9203 rev. b | page 15 of 28 ad8051: f C3 db = 110 mh z. l o w cos t . b e s t us e d f o r dr i v in g sin g le-e nde d ac -co u ple d co nf ig ur a t io n. o p er a t es o n a 3 v p o w e r ra il . ad8052: d u a l v e rs i o n of ab o v e am p . ad8138 is a hig h er p e r f o r ma nce v e rsio n o f ad8131. i t s ga in is p r o g ra mma b l e a nd p r o v ides 14 -b i t p e r f o r ma n c e. differential mode of operation since n o t a l l a pplica t ion s ha ve a sig n a l p r e c ondi t i on e d fo r dif f er en t i a l o p er a t io n, t h er e is o f ten a ne e d to p e r f o r m a sin g le- ende d-t o -dif fer e n t ial con v ersion. i n sys t em s tha t do n o t n e e d a dc in p u t, an rf tra n sf o r m e r wi t h a cen t er t a p is o n e m e tho d t o g e n e ra t e dif f er en t i al in p u ts b e yo n d 20 m h z f o r th e ad9203. this p r o v ides al l t h e b e n e f i ts o f o p era t i n g t h e a / d i n t h e d i f f er en tial m o d e w i t h o u t co n t ri b u t i n g ad di ti o n al n o ise o r d i stor t i on . a n r f t r ans f or me r a l s o h a s t h e b e n e f i t of pro v i d i n g ele c t r ica l is ola t i o n b e twe e n t h e sig n a l s o ur ce and t h e a / d . an i m p r o v e m e n t i n t h d and s f dr p e r f o r ma n c e ca n b e r e ali z e d b y o p er a t in g t h e a d 92 03 in dif f er en t i a l m o de . the p e r f o r ma n c e en ha n c e m en t b e t w e e n t h e dif f er en t i al and sin g le - ende d m o de is g r e a test as t h e i n p u t f r e q ue n c y a p p r o a ch es and g o es be yon d t h e n y q u is t f r e q ue n c y (i .e ., f in > f s /2). the ad8138 p r o v ides a con v enien t met h o d o f co n v er tin g a sin g le-e nde d sig n al t o a dif f er en t i al sig n a l . this is a n ide a l m e tho d f o r g e nera tin g a dir e c t co u p led sig n al to th e ad9203. the ad8138 wi l l accep t a sig n a l a nd s h if t i t t o an ext e r n al l y p r o v ided co mmo n -m o d e leve l . the ad8138 conf igura t io n is sh ow n i n fi g u re 2 8 . 00573- 028 49.9 ? 10k ? 523 ? 499 ? 10k ? 20pf 49.9 ? 20pf 499 ? 499 ? ainp 3v drvdd avdd avss drvss ainn digital outputs 3v 5 6 2 28 25 26 27 1 8 2 1 3 4 ad9203 49.9 ? ad8138 10 f 0.1 f 0.1 f 0.1 f 10 f 0.1 f f i gur e 2 8 . ad81 38 dr i v i n g a n ad92 03, a 10- bit , 40 m s p s a / d co nve r te r f i gur e 29 sh o w s th e sch e m a ti c o f a s u gg e s t e d tra n sf o r m e r cir c ui t. th e cir c ui t us es a minic i r c ui ts rf tra n sfo r m e r , m o de l n u m b er t4C1 t , w h ich has a n i m p e dan c e ra t i o o f fo ur (t ur n s ra tio o f 2). 00573-029 ainp ainn vref refsense 2 v 1v ad9203 0.1 f 10 f f i gure 29. t r ans f o r me r co upled input the ce n t er t a p o f t h e t r a n sfo r m e r p r o v ides a co n v enien t m e an s o f le v e l - s hif t in g t h e in p u t sig n a l t o a desir e d comm on- m o d e v o l t a g e . f i gur e 30 il l u s t ra t e s t h e p e r f o r ma n c e o f th e ad9203 o v er a w i de rang e o f co mm on- m o d e le ve ls. t r ans f or me r s w i t h ot h e r tu r n s r a t i o s m a y a l s o b e s e l e c t e d to opt i m i z e t h e p e r f or m a nc e of a g i ve n appl i c a t i o n . f o r e x am pl e, s e le c t in g a t r an sfo r m e r wi t h a h i g h er im p e dan c e ra t i o , such as minic i r c ui ts t1 6C6t wi th an im p e dan c e ra tio o f 16, ef f e c t i v e l y s t e p s u p th e s i gn a l a m p l i t ud e , th u s fu rt h e r r e d u c i n g th e d r i v i n g r e q u ir emen t s o f t h e s i g n al s o urce . the ad9203 can b e easil y co nf igur ed f o r ei th er a 1 v p-p o r 2 v p-p in p u t s p an b y s e t t in g t h e in t e r n al r e f e r e n c e . oth e r in p u t s p a n s can b e r e alize d wi th tw o ext e r n al ga in s e t t in g r e sis t o r s as s h o w n in f i gur e 21 o f this da ta sh eet. f i gur e 34 a nd f i gur e 35 de m o n s t r a t e t h e s n r and s f dr p e r f o r ma n c e o v er a w i de rang e o f a m pli t udes r e q u ir e d b y m o st co mm un ic a t io n a p plic a t io n s . ?30 ?40 ?50 ?60 ?70 ?80 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 00573-030 common-mode voltage (v) thd (db) 1.0v ref 0.5v ref f i gur e 3 0 . thd vs . c o mmo n-mo d e v o l t a g e vs . th d (a in = 2 v d i f f e r e nt ia l) ( f in = 5 m h z, f s = 4 0 ms ps)
ad9203 rev. b | page 16 of 28 ?40 ?50 ?60 ?70 ?80 ?90 40.0 42.5 45.0 47.5 50.0 52.5 55.0 57.5 60.0 00573-031 duty cycle (%) thd (db) thd snr f i gur e 3 1 . thd and snr vs . cl oc k dut y c y c l e (f in = 5 m h z d i f f e r e nt ia l , cl ock = 40 m s ps) table 5. power programming resistance clock msps resistor v a lue (k) 1 5 0 5 to 10 100 15 to 20 200 > 2 0 5 0 0 power control p o w e r co n s u m e d b y t h e ad920 3 ma y b e r e d u c e d b y p l acing a r e sisto r b e t w e e n t h e p w rc on p i n an d g r o u nd . this f u n c t i on wil l be val u a b le t o us ers wh o do n o t n e e d t h e ad9203 s hig h co n v ersio n r a t e , b u t do n e e d e v en lo w e r p o w e r co n s um p t io n. the ext e r n al r e s i s t o r s e ts t h e p r og ra mmin g o f t h e a n alog c u r r en t mir r o r s. t a b l e 5 i l l u s t ra tes t h e re l a t i o n shi p b e tw e e n p r ogra mm ed p o w e r a n d p e r f o r ma n c e . a t lo w e r clo c k r a t e s, less p o w e r is r e q u ir e d wi t h in t h e ana l og s e c t io n s o f t h e ad9203. placing a n ext e r n al r e sis t o r o n the pwr c on p i n wil l sh u n t co n t r o l c u r r en t a w a y f r o m s o m e o f t h e cu rr e n t m i rr o r s . t h i s e n a b l e s th e a d c t o c o n v er t l o w d a ta ra t e s wi t h ext r e m e l y lo w p o wer co n s um p t ion. interfacing to 5 v s y stems the ad9203 can b e in t e g r a t e d in t o 5 v sys t ems. this is acco m p lish e d b y der i vi n g a 3 v p o w e r su p p ly f r o m t h e exist i n g 5 v a n alog p o wer line thr o ug h a n ad3307 -3 lin e a r r e gu l a t o r . c a r e m u st b e ma in tain ed s o tha t log i c in p u ts do n o t excee d t h e maxim u m ra t e d va l u es list e d o n t h e sp e c if ic a t ion s p a ge . clock i n pu t an d co ns iderati o ns the ad9203 in t e r n al timin g us es th e tw o e d g e s o f th e c l o c k in p u t t o ge n e ra te a va r i e t y o f in ter n a l t i min g sig n a l s. sa m p li n g o c c u rs o n t h e f a l l in g edge . th e c l o c k in p u t t o th e ad9203 o p era t in g a t 40 ms ps ma y ha v e a d u ty c y c l e betw een 45 % t o 55% t o m e et t h i s t i mi n g r e q u ir e m e n t si n c e t h e mini m u m sp e c if ie d t ch and t cl is 11.25 n s . f o r c l o c k ra t e s b e lo w 40 ms ps, t h e d u ty c y cle ma y de v i a t e f r o m t h is ra n g e t o t h e ext e n t t h a t bo t h t ch and t cl a r e s a t i sf ie d . s e e f i gur e 31 fo r d y na mic s vs. du t y c y c l e . h i g h - s p e e d , hi g h -r es ol u t ion a/ d s a r e s e n s i t i v e t o t h e q u ali t y o f t h e clo c k i n p u t. the d e g r ad a t ion i n s n r a t a g i ven f u l l -s c a le in p u t f r e q uen c y (f in ) d u e o n l y to a p er t u r e ji t t e r (t a ) ca n be c a l c ul a t ed w i th t h e f o l l o w i n g eq u a t i o n : snr deg r ada t i o n = 20 log 10 [1/2 f in t a ] i n t h e e q u a t i on, t h e r m s a p er t u r e ji t t er , t a , r e p r es en ts t h e r o o t s u m s q ua r e o f al l t h e ji t t er s o ur ces, w h ich i n cl ude t h e clo c k in p u t, a n a l og i n p u t sig n a l , and a/d a p er t u r e ji t t e r sp e c if ic a t ion . u n ders am pli n g a p plic a t io n s a r e p a r t ic u l a r ly s e nsi t i v e t o ji t t er . cloc k in p u t sh o u ld be tr e a t e d as a n a n alog si gnal i n ca ses w h er e a p er t u r e ji t t er ma y a f f e c t th e dyna mic ra n g e o f th e ad9203. p o w e r s u p p lies fo r clo c k dr i v ers s h o u l d b e s e p a r a t e d f r o m t h e a/d o u t p ut dr iver su p p lies to a v o i d m o d u la t i ng t h e clo c k sig n a l w i th d i g i tal n o i s e . lo w ji t t e r cr y s tal co n t r o lled oscilla t o r s m a k e th e bes t c l o c k s o ur ces. i f the c l o c k is g e n e ra t e d f r o m a n o t h e r t y p e of s o u r c e ( b y g a t i ng , d i v i d i ng or anot he r me t h o d ) , it shou l d b e re t i me d b y t h e or ig in a l cl o c k a t t h e l a st ste p . the clo c k in pu t is r e fer r e d t o t h e a n a l og su p p ly . i t s log i c th r e s h o l d i s a v d d / 2 . digi tal in p u ts an d o u tputs e a c h o f the ad9203 dig i tal co n t r o l in p u ts, 3 - s t a t e, d f s, a nd st b y are re f e re nc e d to an a l o g g r ou nd. c l k i s a l s o re f e re nc e d to a n a l o g g r o u nd . a lo w p o w e r m o de fe a t ur e is p r o v id e d such tha t f o r s t b y = hi gh an d the s t a t ic p o w e r o f t h e ad9203 dr o p s t o 0.65 mw . a s s e r t in g t h e dfs p i n hi g h wi l l in v e r t t h e m s b p i n, chan g i n g th e da t a t o a twos co m p lem e n t f o r m a t . the ad9203 has a n otr (o u t of ra n g e) f u n c tion. i f t h e in p u t v o l t a g e is ab o v e o r b e lo w f u l l s c ale b y 1 lsb , t h e o t r f l a g wil l g o h i gh . s e e f i gu r e 3 2 .
ad9203 rev. b | page 17 of 28 00573-032 +fs ?fs otr data outputs 1 1 1 1 1 1 11111 0 1 1 1 1 1 11111 0 1 1 1 1 1 11110 0 0 0 0 0 0 00001 0 0 0 0 0 0 00000 1 0 0 000 00 000 otr +fs ? 1 lsb ?fs + 1 lsb fi g u r e 3 2 . o u t p u t d a t a fo r m a t 00573-033 ad9203 ainp ainn 200 ? avdd/2 93.1 ? 50 ? bandpass filter mini circuits t4-6t 1:4 g2 = 20db 22.1 ? 50 ? g1 = 20db 50 ? 200 ? saw filte r output f i g u re 33. si mpl i f i e d if s a mp ling ci r c u i t
ad9203 rev. b | page 18 of 28 0 appli c ations direct if down conversion sa m p lin g if sig n als a b o v e a n a d c s bas e band r e g i o n (i .e . , dc to fs/ 2 ) i s beco min g in cr ea si n g l y po p u la r in co mm un ica t i o n a p p l ic a t io n s . this p r o c es s is o f t e n r e f e r r ed t o as dir e c t if do wn co n v ersio n o r u n ders a m pli n g. ther e a r e s e veral p o t e n t ial b e n e f i ts in using t h e ad c t o a l ias (o r mix) do w n a na r r o w b a n d o r wi d e b a nd if sig n a l . f i rst and fo r e m o st is t h e eli m in a t ion of a co m p let e mixer s t a g e w i t h i t s ass o ci a t e d am plif i e rs a nd f i l t ers, r e d u cin g co st and p o w e r dissi p a t io n. s e con d is t h e a b i l i t y to a p ply v a r i ou s d s p te ch n i qu e s t o p e r f or m su ch f u nc t i on s a s f i l t er in g, ch a n nel s e le c t ion, q u a d r a t u r e de m o d u la t i on, da t a r e d u c t io n, dete c t io n, etc. a d e t a i l e d di s c ussio n o n usin g t h is te chni q u e i n d i g i t a l r e cei v ers c a n b e fo und i n ana l o g d e vices a p p l ica t io n n o tes an-301 and an-302. i n dir e c t if do wn co n v ersio n a p p l ica t ion s , on e exp l o i ts the in h e r e n t s a m p l i n g p r o c es s o f a n ad c in w h ic h a n if sig n al ly in g o u tsi d e t h e b a s e b a nd r e g i o n can b e a l ias e d b a ck in to t h e base ba n d r e g i o n in a m a nn e r sim i la r t o a m i xe r do wn c o n v e r ti n g an i f s i g n a l . si m i l a r to t h e m i x e r top o l o g y , an i m age re j e c t i o n f i l t er is r e q u ir e d t o limi t o t h e r p o t e n t ia l in t e r f er in g sig n a l s f r o m also ali a sin g ba ck i n t o t h e ad c s ba se ba n d r e g i o n . a t r ade-o f f exists b e twe e n t h e c o m p lexi ty o f t h i s ima g e r e j e c t io n f i l t er and t h e ad c s s a m p le r a te a nd dy na mic r a n g e. the ad9203 is w e l l s u i t e d f o r va r i o u s if s a m p lin g a p p l ica t io n s . i t s lo w dist o r tio n in p u t s h a has a f u l l -p o w er b a nd wid t h ext e ndin g t o 13 0 mh z, t h us enco m p as sin g man y p o p u la r if f r e q u e nc ie s . o n ly t h e 2 v sp an shou l d b e u s e d for un ders a m p l in g beyon d 20 m h z. a d n l o f 0.2 5 ls b co m b in e d wi t h lo w t h er mal in p u t r e f e r r e d n o is e al lo ws t h e ad9203 in t h e 2 v s p a n t o p r o v ide >59 db o f s n r f o r a ba se ba n d i n p u t si n e wa v e . a l so , i t s lo w a p e r t u r e j i t t e r o f 1.2 ps r m s en sur e s mi nim u m snr de g r ada t io n a t h i g h er if f r e q uen c ies. i n f a c t , t h e ad920 3 is ca p a b l e o f st i l l ma in t a in in g 58 db o f s n r a t a n if o f 70 mh z wi t h a 2 v in p u t s p a n . t o maximize i t s dis t o r tio n p e r f o r ma n c e , the ad9203 sh o u ld b e co nf igur e d in t h e dif f er en t i al m o de wi t h a 2 v s p a n usin g a tra n sf o r m e r . t h e ce n t e r - t a p o f th e tra n sf o r m e r is b i a s e d t o t h e r e f e r e n c e o u t p u t o f th e ad9203 . p r ecedin g t h e ad9203 an d t r a n sfo r m e r is a n o p t i o n a l b a n d p ass f i l t er as w e l l as a ga in st a g e. a l o w q pa s s i v e ba n d pa s s f i l t e r c a n be i n se r t ed t o r e d u c e o u t o f ba nd dis t o r tio n a nd n o is e tha t lies wi thin t h e ad9203 s 390 mh z b a ndwi d t h . a l a rge ga in st a g e(s) is o f t e n re q u ir e d t o co m p ens a te fo r t h e hig h ins e r t i o n los s es o f a s a w f i l t er us e d fo r cha nnel s e le c t ion an d ima g e r e j e c t io n. the ga i n st a g e wi l l a l s o p r o v id e ade q u a te is ola t io n fo r t h e sa w f i l t er f r o m t h e cha r ge kic k back c u r r en ts ass o c i a t ed wi th t h e ad9203 s swi t ch ed ca p a ci t o r in p u t s t a g e. t h e d i stor t i on a n d noi s e p e r f or m a nc e of an a d c a t t h e g i ve n if f r eq ue n c y i s o f pa r t i c ul a r co n c e r n w h en eval u a t i n g a n a d c fo r a na r r o w b a nd if s a m p li n g a p plica t io n. b o t h sin g le ton e and d u al t o n e s f d r vs. a m pli t ude ar e v e r y us ef u l in as s e s s ing a n ad c s d y na mic a nd st a t ic n o n l i n e a r i t i es. snr v s . a m pli t ud e p e r f o r ma n c e a t t h e g i v e n if is u s ef u l in ass e s s i n g t h e ad c s n o is e p e r f o r ma n c e and n o is e c o n t r i b u t i on d u e t o a p er t u r e ji t t e r . i n an y a p p l ica t io n, o n e is advis e d t o t e st s e vera l uni t s o f t h e s a m e de vi ce u nder t h e s a m e condi t i on s to e v a l ua te t h e g i ve n a p plic a t io n s s e nsi t ivi t y t o t h a t p a r t ic u l a r de vice. f i gur e 34 a nd f i gur e 35 com b ine t h e d u al t o ne s f d r as w e l l as sin g le t o n e s f d r a nd s n r p e r f o r ma n c es a t if f r eq uen c ies o f 70 mh z, and 130 mh z. n o te , th e s f d r vs. am p l i t ude da t a is r e f e r e n c ed t o db fs w h ile t h e sin g le t o n e s n r da ta is r e f e r e n c ed t o db c. th e p e r f o r ma n c e cha r ac t e r i s t ics i n t h es e f i gur e s a r e r e p r es en t a t i v e o f th e ad9203 wi t h o u t an y p r ecedin g ga in s t a g e . th e ad9203 was o p era t e d in t h e dif f er en t i al m o de (v i a t r a n s f o r m e r) wi t h a 2 v sp an and a s a m p l e r a te of 4 0 m s p s . t h e an a l o g su p p ly (a vd d) a nd t h e dig i tal s u p p l y (d r v d d ) w e r e set t o 3.0 v . 0 10 20 30 40 50 60 70 80 90 03 25 20 15 10 5 00573-034 input power level (db full scale) s nr/ s f dr (db) sfdr 2 tone sfdr 1 tone snr f i gure 34. snr/sf d r for if @ 7 0 m h z (clo ck = 40 msp s ) 0 10 20 30 40 50 60 70 80 03 30 25 20 15 10 5 00573-035 input power level (db full scale) s nr/ s f dr (db) 5 sfdr 2 tone sfdr 1 tone snr f i g u re 35. snr / sf d r f o r if @ 1 3 0 m h z (clock = 40 m s ps)
ad9203 rev. b | page 19 of 28 ad9203 is p o wer e d f r o m a 3 v s u p p l y ra il whil e the hig h p e r f o r ma n c e ad604 is p o w e r e d f r o m 5 v s u p p l y ra ils. an ad8138 is us ed t o dr i v e t h e ad9203. this is im p l em en t e d d u e t o t h e a b il i t y o f dif f er en t i al dr i v e t e chni q u es t o ca nce l comm o n - m o de n o is e and in p u t an o m a l ie s. ultrasou nd a pplic a t io ns the ad9203 p r o v ides exce l l en t p e r f o r ma n c e in 10-b i t u l t r as o u nd a p plica t io n s . t h is is de m o n s t r a t e d b y i t s hig h snr wi t h a n a l og in pu t f r e q uen c ies up t o a nd i n cl u d i n g n y q u ist. t h e p r es en c e o f s p u r s n e a r t h e bas e o f a f u ndam e n t al f r eq uen c y b i n i s d e monst r a t e d b y f i g u re 3 7 . n o te t h a t t h e s p u r s ne ar t h e noi s e f l o o r are more t h an 8 0 d b b e l o w f in . this is e s p e ci a l ly va l u a b l e in d o p p ler u l t r as o u nd a p plic a t io n s w h er e lo w f r e q uen c y shif ts f r om t h e f u n d a me n t a l are i m p o r t an t . the 74 mw p o w e r co n s um p t ion g i v e s t h e 40 ms ps ad9203 a n o r d e r o f ma gn i t ud e im p r o v em en t o v er o l d e r g e n e ra t i o n co m p on en ts. ? 110 ? 100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 4.5e+6 4.7e+6 4.9e+6 5.1e+6 5.3e+6 5.5e+6 00573-037 f in db fund snr = 59.9db thd = ? 75db sfdr = 82db 00573-036 ad8138 3v ainp ainn ad9203 1.5v 3v analog input ad604 tgc amplifier single- ended analog gain control conditioned transducer signal f i g u re 36. u l t r as ou nd con n ec t i on f o r t h e a d 9 2 03 f i gur e 36 il l u s t ra t e s t h e ad604 va r i ab le ga in am p l if ier co nf igur ed f o r time ga in co m p en s a tion (t gc). the lo w p o w e r f i g u re 37. sfdr p e r f orm a nce n e a r t h e f u ndam enta l si gna l ( 8 192 p o i n t ff t , f in = 5 mh z , f s = 40 ms p s )
ad9203 rev. b | page 20 of 28 evaluation board the ad9203 eval u a t io n bo a r d is s h i p p e d wir e d f o r 2 v dif f er en t i a l o p er a t io n. t h e b o a r d sh o u ld b e con n e c te d to p o w e r a nd test e q ui pm en t as sho w n in f i gur e 38. i t is e a si ly co nf igur e d fo r sin g le-ende d an d dif f er en t i a l o p er a t ion as w e l l as 1 v and 2 v s p a n s. ref e r t o f i gur e 39. 00573-038 dsp equipment anti- aliasing filter drvdd gnd +3-5d avdd gnd avee j1 analog input j5 external clock ad9203 evaluation board output word +? 3v ?+ 3v 3v +? 3v +? synthesizer 1mhz 1.9v p-p hp8644 synthesizer 40mhz 1v p-p hp8644 f i g u re 38. ev aluat i on b o a r d conn ec t i on
ad9203 rev. b | page 21 of 28 r3 5 4.99 ? r3 4 2k ? r3 6 4.99k ? av dd c3 0 0.1 f r4 49.9 ? tp2 3 b 1 a 2 3 4 1 2 j5 sw 7 u6 74lvx14 74lvx14 1 2 u6 1 2 j4 r5 3 49.9 ? c3 0.1 f 74lvx14 56 u6 1 as w 6 2 3 b tp1 r5 2 49.9 ? c1 0 0.1 f clk 74lvx14 98 u6 74lvx14 11 10 u6 74lvx14 13 12 u6 av dd c 102 0.1 f u 6 b ypa ss jp50 jp51 av dd drv dd c1 9 0.1 f c1 6 0.1 f c1 7 10 f 10v 12 12 1 2 1 2 2 28 15 16 17 3 4 5 6 7 8 9 10 11 12 19 21 22 23 24 25 26 20 av dd drv dd otr d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 clk 3- sta t e stb y p w rcon clamp reftf vr ef u1 re fbf ainp clamp in ainn dfs d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 ad9203 r e fsen se d r vss a vss 27 1 18 14 1 1 2 2 jp61 jp60 av dd r5 6 r5 5 tbd by us e r 2 2 1 1 jp58 jp59 c5 10 f 10v c6 0.1 f c4 0.1 f 1 1 2 2 jp64 jp65 av dd r5 4 200k ? 10v c9 1 f c1 1 0.1 f c1 2 0.1 f 4 3 2 1 6 s p tpb t1 sw 8 b 3 1 2 2 1 a j1 r1 49.9 ? jp8 c1 0.1 f c2 4.7 f 10v jp26 jp52 r2 100 ? jp3 1 2 1 2 jp53 1 2 jp54 a b c3 4 0.1 f c3 3 10 f 10v r 104 10 ? r 103 10 ? r 101 tbd by us e r jp2 1 2 1 2 jp1 c 100 20pf c 101 20pf tp3 jp63 1 2 13 1 2 1 2 1 2 tp12 r5 1 49.9 ? av dd 1 2 c1 8 10 f 10v otr + + tbd by us e r + r 102 tbd by us e r 00573-039 f i g u re 39. ev aluat i on b o a r d (r ev . c )
ad9203 rev. b | page 22 of 28 00573-040 d9 d8 d7 d6 d5 d4 d3 14 15 16 17 18 19 20 21 24 23 22 13 10 9 8 7 6 5 4 3 1 2 11 12 c4 0 0.1 f drv d d p1 2 p1 4 p1 6 p1 8 p1 1 0 p1 1 2 p1 1 4 p1 1 p1 3 p1 5 p1 7 p1 9 p1 11 p1 13 nc1 a1 a2 a3 a4 a5 a6 a7 a8 v cca t/r gd2 gd3 u4 74l v x c 4245w m p1 1 6 p1 1 8 p1 2 0 p1 2 2 p1 2 4 p1 2 6 p1 2 8 p1 15 p1 17 p1 19 p1 21 p1 23 p1 25 p1 27 p1 3 0 p1 3 2 p1 3 4 p1 4 0 p1 29 p1 31 p1 33 p1 39 d2 d1 d0 lsb11 lsb12 otr clk 14 15 16 17 18 19 20 21 24 23 22 13 c4 1 0.1 f drv dd b1 b2 b3 b4 b5 b6 b7 b8 v ccb nc1 oe gd1 a1 a2 a3 a4 a5 a6 a7 a8 v cca t/r gd2 gd3 u5 74l v x c 4245w m 10 9 8 7 6 5 4 3 1 2 11 12 p1 3 8 p1 37 p1 35 p1 3 6 rn1 22 ? rn1 22 ? rn1 22 ? rn1 22 ? rn1 22 ? rn1 22 ? rn2 22 ? rn2 22 ? rn2 22 ? rn2 22 ? rn2 22 ? rn2 22 ? rn2 22 ? 1 2 3 4 5 6 7 1 2 3 4 5 6 7 14 13 12 11 10 9 8 14 13 12 11 10 9 8 rn1 22 ? c2 0 0.1 f c2 1 0.1 f +3 -5 d tp28 tp27 tp26 tp25 tp24 tp23 1 1 b6 b5 r 107 1k ? b a v+ v? out 8 1 5 6 2 3 4 u3 a d 8131 c1 4 0.1 f r 108 1k ? + c1 5 10 f 10v c1 3 0.1 f b a + c4 4 10 f 10v c4 5 0.1 f + c2 6 10 f 10v r 105 tbd r 106 tbd av dd r 111 1 ? r 112 25 ? r 113 50 ? 2 1 j12 agnd3 ,4 ,5 + c7 33 f 16v c8 0.1 f fbead 2 1 l4 tp4 1 b4 a vee c2 3 10 f 10v c2 2 0.1 f fbead 2 1 l1 tp20 1 b2 drv dd c2 5 33 f 16v c2 4 0.1 f fbead 2 1 l2 tp21 1 b3 av dd + c3 1 10 f 10v c3 2 0.1 f fbead 2 1 l3 tp29 1 b1 + + a vss +3 -5 d +3 -5 d b1 b2 b3 b4 b5 b6 b7 b8 v ccb oe gd1 f i g u re 40. ev aluat i on b o a r d (r ev . c )
ad9203 rev. b | page 23 of 28 00573-041 f i g u re 41. ev aluat i on b o a r d co mpo n ent sid e a s s e mbly ( n ot t o s c a l e) 00573-042 f i g u re 42. ev aluat i on b o a r d co mpo n ent sid e (n ot to s c al e) 00573-043 f i g u re 43. ev aluat i on b o a r d s o lde r s i de a s s e mbly (n ot t o s c a l e)
ad9203 rev. b | page 24 of 28 00573-044 f i g u re 44. ev aluat i on b o a r d s o lde r s i de (not to s c al e) 00573-045 f i g u re 45. ev aluat i on b o a r d g r ound plan e (n ot to s c a l e) 00573-046 f i g u re 46. ev aluat i on b o a r d p o wer pl ane ( n ot t o s c al e)
ad9203 rev. b | page 25 of 28 outline dimensions 28 15 14 1 8 0 compliant to jedec standards mo-153ae seating plane coplanarity 0.10 1.20 max 6.40 bsc 0.65 bsc pin 1 0.30 0.19 0.20 0.09 4.50 4.40 4.30 0.75 0.60 0.45 9.80 9.70 9.60 0.15 0.05 f i gure 47. 2 8 -l ead thin shr i nk s m a l l o u tline p a ckage (ru - 28) di me nsio ns sho w n i n i n che s a n d ( m il lim e t e r s) ordering guide model temperature r a nge package descri ption package option ad9203aru ?40c to +85c 28-lead thin shrink small outli n e ru-28 ad9203arurl7 ?40c to +85c 28-lead th in shrink small outli n e ru-28 AD9203ARUZ 1 ?40c to +85c 28-lead thin sh rink small outli n e ru-28 AD9203ARUZrl 7 1 ?40c to +85c 28-lead thin sh rink small outli n e ru-28 ad9203-eb evaluation boar d 1 z = pb-free part.
ad9203 rev. b | page 26 of 28 notes
ad9203 rev. b | page 27 of 28 notes
ad9203 rev. b | page 28 of 28 notes ? 2004 a n alo g de vices, inc. all rig h ts reserv ed. tra d em arks an d registered tra d emar ks are the prop erty of their respective owners . c00573C0 C 8/04(b)

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