mlx90255 linear optical array mlx90255 linear optical array page 1 of 5 rev 1.0 31-may-01 application note: mlx90255 demo board the demo board described in this document facilitates the evaluation of the mlx90255xx linear optical arrays. the board provides the necessary timing and clock signals to support both the on-board imaging device or an externally connected sensor. the designer is then free to investigate the properties and performance of the device without having to design and construct an external support circuitry. a regulated dc power supply between 6 and 10v is the only input signal. an oscilloscope is required for observation and analysis of the output signals. features and benefits 128 x 1 sensor-element organization (1 not connected, 1 dummy, 128 real, 1 dummy, 1 dark pixel) 385 dpi sensor pitch high linearity and uniformity for 256 gray-scale high sensitivity: 1.7v @ 10w/cm 2 @ 0.7ms integration time special gain compensation for use with single led light source output referenced to ground single 5v supply operation to 1mhz applications position sensing electrical power assist steering (epas) spectrometer applications functional diagram general description the mlx90255xx linear sensor array consists of a 128 x 1 array of photodiodes , associated charge amplifier circuitry and a pixel data-hold function that provides simultaneous integration start and stop times for all pixels. the pixels measure 200m (h) by 66 m (w) and there is 8 m spacing between pixels. operation is simplified by internal control logic that requires only a serial input (si) pulse and a clock signal. the sensor consists of 128 photodiodes arranged in a linear array. light energy falling on a photodiode generates photocurrent, which is integrated by the active integration circuitry associated with that pixel. during the integration period, a sampling capacitor connects to the output of the integrator through an analog switch. the amount of charge accumulated at each pixel is directly proportional to the light intensity and the integration time. the output and reset of the integrators is controlled by a 132-bit shift register and reset logic. an output cycle is initiated by clocking in a logic 1 on si. this causes all 132 sampling capacitors to be disconnected from their respective integrators and starts an integrator-reset period.
mlx90255 linear optical array mlx90255 linear optical array page 2 of 5 rev 1.0 31-may-01 mlx90255 pin description pin number symbol description smd8 glp5 1 1 si serial input. si defines the end of the integration time and the start of the data out sequence 2 2 clk clock. the clock controls the charge transfer, pixel output and reset (together with si) 3 3 a0 analog output 4 4 vdd supply voltage, for both analog and digital circuits 5, 6, 7, 8 5 gnd ground. all gnd pins are referenced to the substrate. schematics functional description the demo board mainly consists of the following blocks: 5v regulator with a power-on indication led general purpose microcontroller with reset circuitry and crystal oscillator 2 rotary dil switches for changing settings a led which lights up if the chosen settings are out of the device specification 1 on-board mlx90255 sensor (b) and a 5- pins connector for an external device (a) test terminals for all important signals the different blocks can easily be found in the schematic diagram. the main purpose of the demonstration board is to provide a specified clock frequency and an 5v 5v 5v 5v 5v 5v xtal1 int2 resetb int4 xtal2 int3 int1 freq1 freq2 freq3 freq4 clk si led clk si voutb power led si clk voutb clk vouta si vouta u1 at90s2313 1 3 4 5 2 6 7 8 9 10 20 19 18 17 15 14 13 12 11 16 reset pd1(txd) xtal2 xtal1 pd0(rxd) pd2(int0) pd3(int1) pd4(t0) pd5(t1) gnd vcc pb7[sck) pb6[miso) pb5(mosi) pb3(oc1) pb2 pb1[ain1) pb0[ain0) pd6(icp) pb4 c1 100n r1 10k y1 10mhz c3 22p c2 22p sw2 sw int 2 5 1 6 3 4 sw1 sw freq 2 5 1 6 3 4 r5 330 d2 led r3 330 jp2 conn pwr 2-h 1 2 jp1 90255 external 1 2 3 4 5 d4 1n4001 1 2 c4 220n tp4 test point 1 tp3 test point 1 tp2 test point 1 r2 680 u3 90255 smd 1 2 3 4 5 si clk vout vdd vss d3 led r4 1k tp1 5v supply 1 tp6 test point 1 tp5 gnd 1 c5 100n u2 c78l05/to92 2 3 1 gnd in out c8 100n + c7 10uf/16v + c6 22uf/16v
mlx90255 linear optical array mlx90255 linear optical array page 3 of 5 rev 1.0 31-may-01 appropriate si pulse to the optical array. the required pull-down resistors are also foreseen on the board. all important signals (si, clk, vout, 5v and gnd) are connected to test terminals, which makes it easy to visualize them on an oscilloscope. one sensor in a smd package is soldered on the pcb (called b) while an external sensor can be connected to the 5- pins connector row (upper right corner) (called a). both output signals are connected to test terminals, called respectively voutb and vouta. an external regulated dc power supply, with an output voltage between 6 and 10v, needs to be connected to the screw connector in the upper left corner of the pcb. a regular 9v battery is also possible. (mind the sign!) as soon as the power supply is switched on, a led lights up and the micro controller starts generating the clk and si signals with the selected frequency and integration time. the frequency of the signal clk can be chosen with the rotary dil switch on the right. the frequencies corresponding to the 16 positions of this switch are shown in the following table. position clk frequency 0 36khz 1 64khz 2 77khz 3 93khz 4 112khz 5 141khz 6 170khz 7 214khz 8 284khz 9 345khz a 435khz b 588khz c 909khz d 1.0mhz e 1.25mhz f 1.67mhz positions 0, e and f correspond to frequencies that are outside the device specification. lighting up a second led indicates selecting one of them. for each si pulse, 133 clk pulses are generated with the selected frequency, and after them the clk line is pulled low until the next si pulse. see further in this document for the correct timings. the light integration time can be selected with the other rotary dil switch. again 16 positions are possible, however now there is no one-to- one relation with the corresponding integration times. actually the switch specifies a time which starts only after the 133 rd clk pulse. as the integration time already starts after the 18 th pulse (see device specification), the total integration time also depends on the selected frequency. the following table shows for each position (of the ?integration time switch?) the minimal and the maximal integration time, corresponding to respectively the maximal and the minimal clk frequency. total integration time position minimal maximal 0 79us 3.17ms 1 230us 3.33ms 2 380us 3.48ms 3 682us 3.77ms 4 985us 4.09ms 5 1.30ms 4.40ms 6 2.50ms 5.60ms 7 3.10ms 6.20ms 8 3.85ms 6.95ms 9 4.60ms 7.70ms a 6.10ms 9.15ms b 7.7ms 10.7s c 9.15ms 12.5ms d 10.5ms 10.5ms e 15ms 15ms f 20ms 20ms the analog output voltage is directly proportional to the light intensity and the integration time up to the devices saturation level (3v typical). the response of a pixel can be described with the following formula: vout = pr*p light + offset + pr error *p light + dc where dc means the dark current. the proportionality constant pr is the responsivity of the device given in (v*cm2/w*sec). responsivity is wavelength
mlx90255 linear optical array mlx90255 linear optical array page 4 of 5 rev 1.0 31-may-01 dependent. for the mlx90255 the responsivity will peak at about 770nm. bill of materials for the demo an mlx90255 demo board with on-board sensor device optionally an external device connected to the 5 pins header a regulated power supply (6?10vdc) an oscilloscope operation to operate the demo board the following steps are necessary: apply 6?10vdc to the board connect an oscilloscope probe to the vouta or voutb pin (depending on the actual device of interest) and the scope ground to the gnd terminal connect a second oscilloscope probe to the si terminal, and use this channel as a triggering input select the appropriate integration time and clk frequency. if the amount of impinging energy is relatively large, a short integration time is necessary to prevent complete saturation of the output. timing diagram the first scan after power up is incorrect: the chip needs 1 si pulse and 133 clk pulses to initialize the complete device. the second si pulse is valid and starts the integration time after 18 clock pulses (see device specification). a next si pulse ends the integration time, and the pixel values are scanned out to the output pin at the rate of clk. note that it is perfectly possible to stop the clk pulses after the 133 rd . after each si pulse, 133 clk pulses are necessary however. when an si pulse is given the chip always does 2 things: it clocks out the former data of the pixels to the out pin, at the rate of the clk signal. the device is in a reset state until the falling edge of the 18 th clk pulse. at that moment the integration time starts. some oscilloscope screenshots to make it even more clear. integration time 1 st si pulse 2 nd si pulse
mlx90255 linear optical array mlx90255 linear optical array page 5 of 5 rev 1.0 31-may-01 in the first figure, one can see clearly a first si pulse, followed by 133 clk pulses. after the selected integration time, a next si pulse is generated, again accompanied with 133 clk pulses. note that the clk pulses have stopped. during the clk pulses, the pixel values of the former integration time are clocked out. this screenshot repeats itself continously for every new scan. note that this figure does not show the initialisation scan (very first scan), as this is only necessary after power up. these pictures were taken during continuous operation. the second screenshot shows a zoom of the first one. here the si pulse together with the first clk pulses is clearly visible. the first pixel has a low value, as this is an unconnected pixel. (the last one is connected, but covered with metal.) note in a real-life application two different timing solutions are possible, depending on the overall system specification and performance. 1. continuous read-out. si pulses are generated in a regular and controlled time frame. for each si pulse, the integration time is controlled and the data at the output of the sensor is valid. this requires a high- speed microcontroller, as it has to handle this high throughput of data. continuous read-out can also be used if the algorithm requires only a very limited amount of calculation. 2. ?burst-like? read-out. if the application needs a long time for data manipulation, the system cannot control the integration time for each si pulse. si pulses aren?t generated in a regular time frame corresponding to the necessary integration time. the first si pulse after a longer calculation intensive part, results in useless data as the integration time was not precisely timed, so the sensor will be completely saturated. after the desired integration time, a second si pulse is generated, and the valid data is clocked out.
|
