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atmel-8852a-seeprom-at30tse002a-datasheet_072013 features ? integrated temperature sensor (ts) + 2kb serial eeprom ? standard voltage operation ? optimized for voltage range: 2.7v to 3.6v ? 100khz and 400khz compatibility ? 2-wire serial interface: i 2 c/smbus? compatible ? smbus timeout supported ? schmitt trigger, filtered inputs for noise suppression ? industry standard green (pb/halide-free/rohs compliant) package options ? 8-lead very very thin dfn (2 x 3 x 0.8mm) serial eeprom features ? permanent and reversible software write protection for the first-half of the array ? software procedure to verify write protect status ? internally organized as one block of 256-bytes (256 x 8) ? supports byte and page write operation ? write 1, 2, 3, and up to 16 bytes at a time ? self-timed write cycle (5ms max) ? high-reliability ? endurance: 1 million write cycles ? data retention: 100 years ? low operating current ? eeprom write ~1.5ma (typical) ? eeprom read ~ 0.2ma (typical) temperature sensor features ? 11-bit adc temp-to-digital converter with 0.125c resolution ? programmable hysteresis threshold: off, 0c, 1.5c, 3c, and 6 c ? accuracy ? 0.5c (typ.) for +75c to +95c ? 1.0c (typ.) for +20c to +110c ? 2.0c (typ.) for -20c to +125c ? low operating current ? temperature sensor active ~ 0.2ma (typical) at30tse002a integrated temperature sensor with seeprom datasheet
at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 2 figure 1. pin configuration 1. description atmel ? at30tse002a is a combination serial eeprom and temperature sensor device containing 2048-bits of serially electrically erasable and programmable read-only memory (eeprom) organized as 256-bytes of eight bits each and could be used to store memory module and vendor information. the eeprom operation is tailored specifically for dram memory modules serial presence detect (spd). the first 128-bytes of the memory incorporate a permanent and a reversible software write protection (wp) feature. once the permanent software wp is enabled, by sending a special command, it cannot be reversed; however, once the reversible software wp is enabled, it can be reversed by sending a special command. the integrated temperature sensor converts temperatures from -20c to +125c to a digital word and provides an accuracy of 1.0c (max.) for the temperature range +75c to +95c. the temperature sensor continuously monitors temperature and updates data in the temperature register at least eight times per second. temperature data is latched internally by the device and may be read by software via a microcontroller at anytime. the at30tse002a has flexible user programmable internal registers to configure the temperature sensor performance and response to over temperature conditions. the device contains programmable high, low, and critical temperature limits. the device event pin is configured as active low and can be configured to operate as an interrupt or as a comparator output. manufacturer and device id registers provide the ability to confirm the identity of the device. the at30tse002a supports the industry standard 2-wire i 2 c/ smbus serial interface to include time out feature to help prevent system lock-ups. pin function a 0 , a 1 , a 2 address inputs sda serial data scl serial clock input temperature alert event gnd ground v cc power supply v cc event scl sda a 0 a 1 a 2 gnd 4 3 2 1 5 6 7 8 8-wdfn bottom view
3 at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 2. absolute maximum ratings* temperature under bias . . . . . . . -40c to +125c storage temperature . . . . . . . . . -65c to +150c supply voltage with respect to ground . . . . . . . . . . . -0.5v to +4.3v a 0 pin . . . . . . . . . . . . . . . . . . . . . . -0.5v to +12.0v all other input voltages with respect to ground . . . . . . . -0.5v to v cc + 0.5v event pin . . . . . . . . . . . . . . . -0.5v to v cc + 0.3v all other output voltages with respect to ground . . . . . . . -0.5v to v cc + 0.5v *notice: stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. functional operation of the device at these ratings or any other conditions beyond those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. voltage extremes referenced in the ?absolute maximum ratings? are intended to accommodate short duration undershoot/overshoot conditions and does not imply or guarantee functional device operation at these levels for any extended period of time. pull-up voltages applied to the event pin that exceed the ?absolute maximum ratings? may forward bias the esd protection circuitry. doing so may result in improper device function and may corrupt temperature measurements.
at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 4 3. block diagram r o s n e s e r u t a r e p m e t m o r p e e l a i r e s h.v pump/timing eeprom write protected section (00h-7fh) eeprom second half (80h-ffh) y address decoder write protect circutry x address decoder memory control logic serial control logic i 2 c / smbus interface 2 a 1 a 0 a a d s k l c s d n g v cc event capability configuration critical alarm trip device id manufacturer id temperature upper alarm trip lower alarm trip smbus timeout pointer register selected resolution temp. range accuracy event shutdown smbus output feature a/d converter band gap temperature sensor
5 at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 4. pin description at30tse002a requires no external components for operation except for pull-up resistors on scl, sda, and event pins. in order to provide effective noise protection and filtering, it is recommended that a decoupling capacitor of 0.1 ? f be used and is located as close as possible to the device between v cc and ground pins. serial clock (scl): the scl input is used to positive edge clock data into each eeprom device and negative edge clock data out of each device. serial data (sda): the sda pin is bidirectional for serial data transfer. this pin is open drain driven and may be wire-ored with any number of other open-drain or open collector devices. device addresses (a 2 , a 1 , a 0 ): the a 2 , a 1 , and a 0 pins are device address inputs that are hardwired (directly to gnd or to v cc ) for compatibility with 2-wire devices. when the pins are hardwired, as many as eight devices may be addressed on a single bus system. a device is selected when a corresponding hardware and software match is true. if these pins are left floating, the a 2 , a 1 , and a 0 pins will be internally pulled to gnd; however, atmel recommends always connecting the address pins to a known state by direct connection to ground or v cc , but if using a pull-up resistor, atmel recommends using 10k ? or less. the a 0 pin is also overvoltage tolerant, allowing up to 10v for software write protection functionality. (see section 6. through section 9. ) temperature alert output ( event): the event pin outputs a signal when the temperature goes beyond the user-programmed temperature limits and be configured in one of three modes; either interrupt, comparator, or critical alarm modes. the event pin is an open-drain output and requires a pull-up resistor for proper operation (see section 10. ). 4.1 pin capacitance (1) note: 1. this parameter is ensured by characterization only. applicable over recommended operating range from t a = 25c, f = 100 khz, v cc = +3.0v. symbol test condition max units conditions c i/o input/output capacitance (sda), event 8 pf v i/o = 0v c in input capacitance (a 0 , a 1 , a 2 , and scl) 6 pf v in = 0v
at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 6 4.2 dc characteristics notes: 1. v il min and v ih max are reference only and are not tested. 2. sensor in shutdown mode. 3. eeprom inactive; sensor in shutdown mode. applicable over recommended operating range: t a = -20c to +125c, v cc = +2.7v to +3.6v (unless otherwise noted). symbol parameter test condition min typ max units v cc1 supply voltage 2.7 3.6 v supply current i cc eeprom read v cc = 3.6v (2) 100khz 0.4 1.0 ma eeprom write v cc = 3.6v (2) 100khz 1.5 3.0 temp. sensor v cc = 3.6v eeprom inactive 0.2 0.5 timeout active v cc = 3.6v eeprom inactive, temp. sensor shutdown 0.2 0.5 i sb standby current v cc = 3.6v (3) v in = v hv = or v ss 1.6 4.0 a i li input leakage current v in = v hv = or v ss 0.1 2.0 a i lo output leakage current v in = v hv = or v ss 0.1 2.0 a v il input low level (1) -0.6 v hv x 0.3 v v ih input high level (1) v hv x0.7 v hv + 0.5 v v ol output low level v cc = 3.0v i ol = 2.1ma 0.4 v v hv high voltage input a0 pin = a 0 ; v hv - v cc ? 4.8v 7.0 10.0 v v hyst input hysteresis (sda, scl) 0.05 x v cc v
7 at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 4.3 ac characteristics notes: 1. this parameter is ensured by characterization only. 2. the minimum frequency is specified at 10khz to avoid activating the timeout feature. 4.4 temperature sensor characteristics applicable over recommended operating range: t a = ?20c to +125c, v cc = +2.7v to +3.6v, cl = 1 ttl gate and 100 f (unless otherwise noted). symbol parameter min max min max units f scl clock frequency, scl 10 (2) 100 10 (2) 400 khz t low clock pulse width low 4.7 1.2 us t high clock pulse width high 4.0 0.6 us t r inputs rise time (1) 1.0 0.3 us t f inputs fall time (1) 300 300 ns t su.dat data in set-up time 200 100 ns t hd.di data in hold time 0.0 0.0 us t hd.dat data out hold time 200 3450 200 900 ns t buf time the bus must be free before a new transmission can start (1) 4.7 1.2 us t su.sta start set-up time 4.7 0.6 us t hd.sta start hold time 4.0 0.6 us t su.sto stop set-up time 4.7 0.6 us t i noise suppression time (1) 100 50 ns t out smbus timeout time 25 35 25 35 ms t wr write cycle time 5.0 5.0 ms eeprom endurance (1) 25c, page mode 1,000,000 write cycles applicable over recommended operating range: t a = -20c to +125c, v cc = 2.7v to 3.6v (unless otherwise noted). symbol parameter test condition min typ max units t acc ts accuracy +75c < ta < +95c 0.500 +1.000 c +20c < ta < +110c 1.000 +2.000 -20c < ta < +125c 2.000 +3.000 t conv ts conversion time 75.000 125.000 ms t res ts resolution 0.125 c
at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 8 5. memory organization at30tse002a, 2k serial eeprom: the 2k memory is internally organized with 16 pages of 16-bytes each. random word addressing requires an 8-bit data word address. 6. device operation clock and data transitions: the sda pin is normally pulled high with an external device. data on the sda pin may change only during scl low time periods. (see figure 6-4 ) data changes during scl high periods will indicate a start or stop condition as defined below. start condition: a high-to-low transition of sda with scl high is a start condition which must precede any other command (see figure 6-5 ). stop condition: a low-to-high transition of sda with scl high is a stop condition. after a read sequence, the stop command will place the device in a standby power mode (see figure 6-5 ). acknowledge: all addresses and data words are serially transmitted to and from the eeprom in 8-bit words. the device sends a zero to acknowledge that it has received each word. this happens during the ninth clock cycle. standby mode: the at30tse002a features a low-power standby mode which is enabled: a. upon power-up. b. after the receipt of the stop bit and the completion of any internal operations. the temperature sensor must be disabled by the user for low-power standby mode. 2-wire software reset: after an interruption in protocol, power loss or system reset, any 2-wire part can be reset by following these steps: 1. create a start bit condition. 2. clock nine cycles. 3. create another start bit followed by stop bit condition as shown below. the device is ready for next communication after the above steps have been completed. figure 6-1. 2-wire software reset scl sda 123 89 start bit start bit dummy clock cycles stop bit
9 at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 figure 6-2. bus timing scl ? serial clock sda: serial data i/o figure 6-3. write cycle timing scl ? serial clock sda: serial data i/o scl sda in scl sda out t low t high t su:sto t su:dat t hd:di t hd:sta t su:sta sda input sda change stop condition start condition t buf data valid t hd:dat scl sda out t su:sta t su:sto stop condition write cycle start condition t w
at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 10 figure 6-4. data validity figure 6-5. start and stop condition figure 6-6. output acknowledge sda scl data change data stable data stable sda scl start stop scl data in data out 9 8 1 start acknowledge
11 at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 7. device addressing at30tse002a device requires an 8-bit device address word following a start condition to enable the chip to access either the temperature sensor or eeprom functions (see table 7-1 ). table 7-1. control/device address word note: 1. x = user selectable the eeprom device address word consists of a mandatory one-zero sequence for the first four most significant bits (?1010?) for normal read and write operations, a ?0110? for writing to the eeprom write protect register, and ?0011? for temperature sensor operations. the next three bits are the a2, a1, and a0 device address bits for the at30tse002a device. these three bits must match their corresponding hard-wired input pins. the eighth bit of the device address is the read/write operation select bit. a read operation is initiated if this bit is high and an eeprom write operation is selected if this bit is low. upon a compare of the device address, the device will output a zero, called an acknowledge (ack). if a compare is not made, the chip will not ack and will return to a standby state. the eeprom will not ack if the write protect register has been programmed and the control code is ?0110?. 8. eeprom write operations byte write : a write operation requires an 8-bit data word address following the device address word and ack. upon receipt of this address, the eeprom will again respond with an ack and then clock in the first 8-bit data word. following receipt of the 8-bit data word, the eeprom will output an ack and the addressing device, such as a microcontroller, must terminate the write sequence with a stop condition. at this time the eeprom enters an internally timed write cycle, t wr , to the nonvolatile memory. all inputs are disabled during this write cycle and the eeprom will not respond until the write is complete (see figure 13-2 and figure 13-3 ). the device will acknowledge a write command, but not write the data, if the software write protection has been enabled. the write cycle time must be observed even when the write protection is enabled. page write: the 2k eeprom device is capable of 16-byte page write. a page write is initiated the same as a byte write, but the microcontroller does not send a stop condition after the first data word is clocked in. instead, after the eeprom acknowledges receipt of the first data word, the microcontroller can transmit up to fifteen more data words. the eeprom will respond with a zero after each data word received. the microcontroller must terminate the page write sequence with a stop condition (see figure 13-3 ). the data word address lower four bits are internally incremented following the receipt of each data word. the higher data word address bits are not incremented, retaining the memory page row location. when the word address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the same page. if more than sixteen data words are transmitted to the eeprom, the data word address will roll-over and previous data will be overwritten. the address roll-over during write is from the last byte of the current page to the first byte of the same page. the device will acknowledge a write command, but not write the data, if the software write protection has been enabled. the write cycle time must be observed even when the write protection is enabled. acknowledge (ack) polling: once the internally-timed write cycle has started and the eeprom inputs are disabled, ack polling can be initiated. this involves sending a start condition followed by the device address word. the read/write bit is representative of the operation desired. only if the internal write cycle has completed will the eeprom respond with a zero allowing the read or write sequence to continue. device control / device address word device id device address bits r/w b7 b6 b5 b4 a2 a1 a0 b0 eeprom 1 0 1 0 x x x x temperature sensor 0 0 1 1 eeprom write protection 0 1 1 0
at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 12 9. eeprom write protection the device supports permanent and reversible software write protection and once enabled, write protects the first-half of the array (00h ? 7fh). permanent software write protection: the software write protection is enabled by sending a command similar to a normal write command; to the device which programs the permanent write protect register. the write protect register is programmed by sending a write command with the device address of ?0110? with the address and data bit being don?t cares (see figure 12-5 and table 12-1 ). once the software write protection has been enabled, the device will no longer acknowledge the ?0110? control byte. the software write protection cannot be reversed even if the device is powered down. the write cycle time must be observed. reversible software write protection: the reversible software write protection is enabled by sending a command, similar to a normal write command; to the device which programs the reversible write protect register. the write protect register is programmed by sending a write command ?01100010? with pins a 2 and a 1 tied to ground or no connect and pin a 0 connected to v hv (see figure 12-6 and table 12-1 ). the reversible write protection can be reversed by sending a command ?01100110? with pin a 2 tied to ground or no connect, pin a 1 tied to v cc , and pin a 0 tied to v hv (see figure 12-6 and table 12-1 ). 10. temperature sensor functional description at30tse002a consists of a delta-sigma analog to digital converter (adc) with a band gap type temperature sensor that monitors and updates its own temperature reading at least eight times per second converting the readings into digital data bits and latching them into a temperature register that can be read via 2-wire i 2 c/smbus serial interface. the device communicates over a 2-wire i 2 c/smbus interface with the bus master or controller consisting of a serial clock (scl) and serial bidirectional data bus (sda) with clock frequencies up to 400khz. the bus master or controller generates the scl signal and is used by the at30tse002a to receive and send serial data on the sda line with the most significant bit transferred first. a pull-up resistor is required on the sda pin since it has an open drain configuration. 10.1 event output the event pin has three operating modes depending on configuration settings. they are: ? interrupt mode ? comparator mode ? critical alarm (crit_alarm) mode in the interrupt mode, once a temperature reaches a boundary limit, the at30tse002a asserts the event pin. the event pin will remain asserted until software clears the interrupt by writing a logic 1 to the evtclr bit five in the configuration register. when the temperature drops below specified limits, the device returns back to either interrupt or comparator mode as programmed in the configuration register?s evtmod bit zero. in the comparator mode, the event pin remains asserted until the error condition that caused the pin to be asserted no longer exists and the event pin will clear itself. in the crit_alarm mode, when the measured temperature exceeds crit_alarm trip limit, the event pin will remain asserted until the temperature drops below crit_alarm limit minus hysteresis (see figure 11-1 ). all event thresholds use hysteresis as programmed in the configuration register. 10.2 alarm window the alarm window consists of the upper alarm trip register and lower alarm trip register. the upper alarm trip register holds the upper temperature trip point and the lower alarm trip register holds the lower temperature trip point. after the event pin control is enabled, the event output will be triggered upon entering and exiting from this window.
13 at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 10.3 temperature sensor power-on default the at30tse002a has an internal power-on reset (por) circuit. when the supply voltage drops below the por threshold, the device will reset to the following power-on default conditions: ? sensor starts monitoring temperature continuously. ? address pointer register = 00h. ? upper/lower alarm trip registers and crit_alarm registers are set to 0c. ? event register cleared and pulled high by external pull up resistor. ? operational mode is comparator. ? event hysteresis is 0c. ? smbus register =00h. 10.4 device initialization the at30tse002a temperature sensor has programmable registers that, upon device power-on, are initialized to zero. table 11-1 shows the power-on register default values. the event output is defaulted to deasserted state and comparator mode. 10.5 smbus timeout the at30tse002a supports the smbus timeout feature for temperature sensor operations if enabled via setting the smbus register (see section 11.10 ). this feature helps prevent potential system bus hang-ups by resetting the serial interface if scl stays low for a time specified by the t out parameter. this requires a minimum scl clock speed of 10khz as specified in the smbus specification to avoid any timeout issues. the upper alarm trip, lower alarm trip, critical alarm trip, and configuration registers need to be programmed to desired values before temperature sensor can properly function.
at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 14 11. register descriptions this section describes all the temperature sensor registers that are used in at30tse002a. the at30tse002a has several registers that are user accessible and or programmable and used for latching temperature readings, storing high and low temperature limits, configuring the hysteresis threshold, and reporting status. these registers include the capability register, upper alarm trip register, lower alarm trip register, critical alarm trip register, temperature register, manufacturer identification register, device identification register, and smbus register. the at30tse002a uses an 8-bit pointer register to access these registers and all other registers contain 16-bits. table 11-1 indicates the write/read access capability of each register. reading from a write-only register will result in reading zero data and writing to read-only register will have no impact even though the write sequence was acknowledged by the device. table 11-1. register summary note: 1. write operations to reserve registers should be avoided as it may cause undesirable results. register power-up default register data (hex) address (hex) read/write register name section n/a w address pointer 11.1 00h 00h r capability 11.2 00f7h 01h r/w configuration 11.3 0000h 02h r/w upper alarm trip 11.4 0000h 03h r/w lower alarm trip 11.5 0000h 04h r/w critical alarm trip 11.6 0000h 05h r temperature data 11.7 n/a 06h r manufacturer i.d. 11.8 001fh 07h r device i.d./device revision 11.9 8201h 08h to 21h r/w reserved (1) n/a 0000h 22h r/w smbus timeout 11.10 0000h 23h to ffh r/w reserved (1) n/a 0000h
15 at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 11.1 address pointer register the at30tse002a uses a pointer register to select and access the 16-bit data registers shown in table 11-1 . the pointer register is an 8-bit write-only register (see table 11-2 ). the power-on default value is 00h which is the address location for the capability register. table 11-2. address pointer register 11.2 capability register (16-bit read only, address = 00h) at30tse002a is capable of measuring temperature with 1c over the active range and 2c over the monitor range. this register is a 16-bit read-only register used to specify the capabilities of the temperature sensor. the capability register functions are described in table 11-3 and table 11-4 . table 11-3. capability register bit distribution bit 7 6 5 4 3 2 1 0 symbol pointer bits r/w w w w w w w w w default value 0 0 0 0 0 0 0 0 bit 15 14 13 12 11 10 9 8 symbol rfu default value 0 0 0 0 0 0 0 0 r/w access r r r r r r r r bit 7 6 5 4 3 2 1 0 symbol evsd tmout v hv tpres range sacc icap default value 1 1 1 1 0 1 1 1 r/w access r r r r r r r r
at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 16 table 11-4. capability register bit description 11.3 configuration register (16-bit read/write, address = 01h) the at30tse002a contains a 16-bit configuration register allowing the user to set key operational features of the temperature sensor. the configuration register functions are described in table 11-5 , table 11-6 , and figure 11-1 . table 11-5. configuration register bit distribution bit symbol description 15:8 rfu reserved for future use. must be zero. 7 evsd event output status during shutdown mode: 1 = the event pin output is deasserted (not driven) when entering shutdown mode and will resume status update immediately upon exiting shutdown. in addition, the evtsts bit in the configuration register will be cleared when entering shutdown mode and will resume status update immediately upon exiting shutdown. 6 tmout bus timeout: 1 = supported within the smbus compatible range 25 to 35ms (power-up default). 5 v hv high voltage support for a 0 pin: 1 = a 0 pin supports a voltage up to 10v (power-up default). 4:3 tpres temperature resolution: 10 = supports 0.125c 2 range 1 = can read temperatures below 0c and sets appropriate sign bit. 1 sacc supported accuracy: 1 = supports accuracy of 1c (max.) over the range (75c to 95c) and 3c (max.) over the range (-20c to 125c). 0 icap interrupt capability: 1 = has alarm and critical trip interrupt capability. bit 15 14 13 12 11 10 9 8 symbol rfu hystenb shtdwn default value 0 0 0 0 0 0 0 0 r/w access r r r r r r/w r/w r/w bit 7 6 5 4 3 2 1 0 symbol crtalml winlock evtclr evtsts evtout critevt evtpol evtmod default value 0 0 0 0 0 0 0 0 r/w access r/w r/w w r r/w r/w r/w r/w
17 at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 table 11-6. configuration register bit description bit symbol description 15:11 rfu reserved for future use and must be zero. 10:9 hystenb hysteresis enable : 00 = 0c disable hysteresis (default power-on condition) 01 = 1.5c enable hysteresis 10 = 3.0c enable hysteresis 11 = 6.0c enable hysteresis the purpose of these bits is to control the hysteresis applied to the alarm trip point boundaries. the above hysteresis applies to all limits when temperature drops below the user specified alarm trip points. note: hysteresis applies to decreasing temperature only. once ambient temperature is above a given threshold, it must drop below the boundary limit minus hysteresis in order for a comparator event to be cleared. example: if these bits are set to ?01? for 1.5c and the upper alarm trip limit is set to 85c, as temperature rises above 85c, bit 14 of temperature register will be set to a logic 1. bit 14 will remain set until the ambient temperature drops below the threshold (85c) minus the hysteresis value or 83.5c. note: hysteresis is also applied to the event pin functionality. when either of the crit_alarm trip or alarm window lock bits is set, this bit cannot be altered until unlocked. 8 shtdwn shutdown mode: 0 = temperature sensor enabled for continuous conversion (power-on default). 1 = temperature sensor disabled. in shutdown mode, the temperature sensor is not active and will not generate interrupts or update temperature data. the event pin is deasserted (not driven). when either of the crit_alarm trip or alarm window lock bits is set, this bit cannot be altered until unlocked. 7 crtalml crit_alarm trip lock bit: locks the critical alarm trip register from being updated. 0 = crit_alarm trip register can be updated (power-on default). 1 = crit_alarm trip register is locked and cannot be updated. once set, it can be only be cleared to zero by internal por which occurs when the device is powered off and then powered on. 6 winlock alarm window lock bit: 0 = upper and lower alarm trip registers can be updated (power-on default). 1 = upper and lower alarm trip registers are locked and cannot be updated. once set, it can be only be cleared to zero by internal por when device is powered off then powered on. 5 evtclr event clear: this bit is a write only bit and will read zero. this bit can clear the event pin after it has been enabled and is self clearing. 0 = has no effect (power-on default). 1 = clears (releases) the active event pin in interrupt mode. this bit is ignored when in comparator mode.
at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 18 note: any jedec tse2002av compliant temperature sensor can be configured to report an over temperature limit condition to the host system via its event pin. these temperature sensors have the default value for all temperature alarm thresholds set at 0 ? c. often, if a system designer determines to utilize only the critical alarm temperature threshold to trigger an event, it is likely he/she would only setup the critical alarm temperature threshold to a proper value while leaving the upper alarm temperature threshold unchanged at the default (0 ? c). due to some ambiguity in the tse2002av specification, it is possible a temperature sensor can process bit 3 (event ou tput control) of the configuration register first while others process bit 2 (critical temperature only) first from the configuration register. if both bits are set to logic 1 state concurrently and bit 3 is processed first, the event output would be enabled before learning the upper alarm temperature threshold should be ignored. since the upper alarm temperature threshold is often left unchanged at 0 ? c (if it is not used), and if the temperature sensor operates in a greater than 0 ? c environment, it naturally outputs an event condition. sometime later, after bit 2 is also processed, the temperature sensor would ignore the upper alarm temperature threshold and deassert the event output if the ambient temperature has not exceeded the critical alarm temperature threshold; however, for a system that triggers action off this event output, this correction has arrived too late. to remedy this ambiguity in the tse2002av specification, one must avoid setting both bit 2 and bit 3 of the configuration register to a logic 1 concurrently. instead, atmel recommends using a two step programming process to set bit 2 first followed by bit 3 in separate commands if the system is designed to only trigger off the critical alarm temperature threshold. 4 evtsts event pin output status: 0 = the event output is not asserted by the device (power-on default). 1 = the event output is asserted due to an alarm trip condition. note: this bit will be cleared when entering shutdown mode and will resume status update immediately upon exiting shutdown. 3 evtout event output control: this bit, when set, prevents the event pin from generating an interrupt. 0 = the event output is disabled and will not generate interrupts (power-on default). 1 = the event output is enabled. when either of the crit_alarm trip or alarm window lock bits is set, this bit cannot be altered until unlocked. note: please see note below for the recommended sequence for setting this bit. 2 critevt critical temperature only: 0 = the event output is asserted for the upper, lower, and critical alarms (power-on default). 1 = the event output is asserted for only critical alarm when ambient temperature > crit_alarm trip boundary. when the alarm window lock bit is set, this bit cannot be altered until unlocked. note: please see note below for the recommended sequence for setting this bit. 1 evtpol event polarity: 0 = active low (power-on default). a pull-up resistor is required on this pin to set inactive state. 1 = active high. when either of the crit_alarm trip or alarm window lock bits is set, this bit cannot be altered until unlocked 0 evtmod event mode: 0 = the event pin will operate in comparator mode (power-on default). 1 = the event pin will operate in interrupt mode. when either of the crit_alarm trip or alarm window lock bits is set, this bit cannot be altered until unlocked. table 11-6. configuration register bit description (continued) bit symbol description
19 at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 figure 11-1. event pin mode functionality crit_alarm upper alarm measured temperature lower alarm event pin in ?interrupt mode? (active low) event pin in ?comparator? (active low) software resets interrupt switches to comparator mode
at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 20 11.4 upper alarm trip register (16-bit read/write, address = 02h) the upper alarm trip register holds the user programmed upper temperature boundary trip point in 11-bit twos complement format (0.25c resolution) that can be used to monitor ambient temperature in an operating window (see table 11-7 and table 11-8 ). when the temperature increases above this trip point, or drops below, or is equal to the trip point (minus any hysteresis set), then the event pin is asserted (if enabled). this register becomes read-only if the alarm window lock bit (winlock) bit six in the configuration register is set to a logic 1. table 11-7. upper alarm trip register bit distribution table 11-8. upper alarm trip register bit description bit 15 14 13 12 11 10 9 8 symbol rfu sign almwinh default value 0 0 0 0 0 0 0 0 r/w access r r r r/w r/w r/w r/w r/w bit 7 6 5 4 3 2 1 0 symbol almwinh rfu default value 0 0 0 0 0 0 0 0 r/w access r/w r/w r/w r/w r/w r/w r r bit symbol description 15:13 rfu reserved for future use . read as zero. 12 sign sign bit: 0 = ambient temperature is greater than or equal to 0c. 1= ambient temperature is less than 0c. 11:2 almwinh upper alarm trip temperature bits: represented in two?s complement format. 0:1 rfu reserved for future use . read as zero.
21 at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 11.5 lower alarm trip register (16-bit read/write, address = 03h) the lower alarm trip register holds the user programmed lower temperature boundary trip point in 11-bit twos complement format (0.25c resolution) that can be used to monitor ambient temperature in an operating window (see table 11-9 and table 11-10 ). when temperature decreases below this trip point minus any hysteresis set or increases to meet or exceed this trip point, then the event pin is asserted (if enabled). this register becomes read-only if the alarm window lock bit (winlock) bit six in the configuration register is set to a logic 1. table 11-9. lower alarm trip register bit distribution table 11-10. lower alarm trip register bit description bit 15 14 13 12 11 10 9 8 symbol rfu sign almwinl default value 0 0 0 0 0 0 0 0 r/w access r r r r/w r/w r/w r/w r/w bit 7 6 5 4 3 2 1 0 symbol almwinl rfu default value 0 0 0 0 0 0 0 0 r/w access r/w r/w r/w r/w r/w r/w r r bit symbol description 15:13 rfu reserved for future use . read as zero. 12 sign sign bit: 0 = ambient temperature is greater than or equal to 0c. 1 = ambient temperature is less than 0c. 11:2 almwinl lower alarm trip temperature bits: represented in twos complement format. 0:1 rfu reserved for future use . read as zero.
at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 22 11.6 critical alarm trip register (16-bit read/write, address = 04h) the critical alarm trip register holds the user programmed critical alarm temperature boundary trip point in 11-bit twos complement format (0.25c resolution) that can be used to monitor ambient temperature (see table 11-11 and table 11-12 ). when the temperature increases above this trip point, the event pin will be asserted (if enabled). it will remain asserted until temperature decreases below or equal to the trip point minus any hysteresis set. this register becomes read-only if the critical alarm trip lock bit (crtalml) bit 7 in the configuration register is set to a logic 1. table 11-11. critical alarm trip register bit distribution table 11-12. critical alarm trip register bit description bit 15 14 13 12 11 10 9 8 symbol rfu sign critevt default value 0 0 0 0 0 0 0 0 r/w access r r r r/w r/w r/w r/w r/w bit 7 6 5 4 3 2 1 0 symbol critevt rfu default value 0 0 0 0 0 0 0 0 r/w access r/w r/w r/w r/w r/w r/w r r bit symbol description 15:13 rfu reserved for future use . read as zero. 12 sign sign bit: 0 = ambient temperature is greater than or equal to 0c. 1 = ambient temperature is less than 0c. 11:2 critevt critical alarm trip temperature bits: represented in two?s complement format. 0:1 rfu reserved for future use . read as zero.
23 at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 11.7 temperature register (16-bit read-only, address = 05h) the temperature register holds the internal temperature measurement data represented in 11-bit twos complement word format allowing for resolution equal to 0.125c (least significant bit). the upper three bits (15, 14, and 13) of the temperature register indicates the trip status of the current temperature and most important, are not affected by the status of the output of the event pin (see table 11-13 and table 11-14 ). table 11-13. temperature register bit distribution table 11-14. temperature register bit description bit 15 14 13 12 11 10 9 8 symbol crithigh almhigh almlow sign 128c 64c 32c 16c default value 0 0 0 0 0 0 0 0 r/w access r r r r r r r r bit 7 6 5 4 3 2 1 0 symbol 8c 4c 2c 1c 0.5c 0.25c 0.125c rfu default value 0 0 0 0 0 0 0 0 r/w access r r r r r r r r bit symbol description 15 crithigh 0 = ambient temperature is less than the critical alarm trip register setting. 1 = ambient temperature is greater than or equal to critical alarm trip register setting. when this bit is set a logic 1, it will automatically clear once the measured temperature decreases below or is equal to the trip point minus any hysteresis set. 14 almhigh 0 = ambient temperature is below the upper alarm trip register setting. 1 = ambient temperature is above the upper alarm trip register setting. when the bit is set to a logic 1, it will automatically clear once the measured temperature decreases below or is equal to the trip point minus any hysteresis set. 13 almlow 0 = ambient temperature is above the lower alarm trip register setting. 1 = ambient temperature is below the lower alarm trip register setting. when the bit is set to a logic 1, it will automatically clear once the measured temperature increases above or is to equal to the trip point. 12 sign sign bit: 0 = ambient temperature is greater than or equal to 0c. 1 = ambient temperature is less than 0c. 11:1 temp ambient temperature bits: represented in twos complement format. the encoding of bits b11 through b2 is the same as in the alarm trip registers. 0 rfu reserved for future use . read as zero.
at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 24 11.7.1 temperature register format this section will clarify the temperature register format and temperature bit value assignments used for temperature for the following registers: upper alarm trip, lower alarm trip, critical alarm trip, and temperature data registers. the temperatures expressed in the upper alarm trip, lower alarm trip, critical alarm trip, and temperature data registers are indicated in twos complement format. in each of the trip registers, bits 12 through bit 2 are used for temperature settings, or in the case of the temperature register, holds the internal temperature measurement with bits 12 through bit one allowing 0.125oc resolution. table 11-15 indicates the temperature register?s assigned bit values used for temperature. table 11-15 below shows examples for temperature register bit values for various temperature readings. table 11-15. temperature register format table 11-16. temperature register examples bit position 12 11 10 9 8 7 6 5 4 3 2 1 0 bit value sign 128c 64c 32c 16c 8c 4c 2c 1c 0.5c 0.25c 0.125c x temperature register value examples temperature binary (bit 15 ? bit 0) +125c xxx0 0111 1101 00xx +99.75c xxx0 0110 0011 11xx +85c xxx0 0101 0101 00xx +39c xxx0 0010 0111 00xx +15.75c xxx0 0000 1111 11xx +0.25c xxx0 0000 0000 01xx 0c xxx0 0000 0000 00xx
25 at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 11.8 manufacturer id register (16-bit read-only, address = 06h) this register is used to identity the manufacturer of the product. the manufacturer id for the at30tse002a is 001fh (see table 11-17 ). table 11-17. manufacturer id register bit distribution 11.9 device id register (16-bit read-only, address = 07h) the upper or high order byte is used to specify the device identification and the other byte is used to specify device revision. the device id for the at30tse002a is 8201h (see table 11-18 ). table 11-18. device id register bit distribution bit 15 14 13 12 11 10 9 8 symbol manufacturer id default value 0 0 0 0 0 0 0 0 r/w access r r r r r r r r bit 7 6 5 4 3 2 1 0 symbol manufacturer id default value 0 0 0 1 1 1 1 1 r/w access r r r r r r r r bit 15 14 13 12 11 10 9 8 symbol device id default value 1 0 0 0 0 0 1 0 r/w access r r r r r r r r bit 7 6 5 4 3 2 1 0 symbol device revision default value 0 0 0 0 0 0 0 1 r/w access r r r r r r r r
at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 26 11.10 smbus register (16-bit write/read only, address = 22h) the smbus register allows the user to enable or disable the smbus time out feature (see table 11-19 and table 11-20 ). table 11-19. smbus register bit distribution table 11-20. smbus register bit distribution bit 15 14 13 12 11 10 9 8 symbol rfu default value 0 0 0 0 0 0 0 0 r/w access r r r r r r r r bit 7 6 5 4 3 2 1 0 symbol smbout rfu default value 0 0 0 0 0 0 0 0 r/w access r/w r r r r r r r bit symbol description 15:8 rfu reserved for future use . read as zero. 7 smbout smbus timeout: 0 = smbus timeout is enabled. 1 = smbus timeout is disabled. when enabled, timeout is active for temperature sensor operations. when either of the crit_alarm trip or alarm window lock bits is set, this bit cannot be altered until unlocked. 6:0 rfu reserved for future use . read as zero.
27 at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 12. ts write operations writing to the at30tse002a temperature register set is accomplished through a modified write operation for two data bytes. to maintain 2-wire compatibility, the 16-bit register is accessed through a pointer register, requiring the write sequence to include an address pointer in addition to the device address. this indicates the storage location for the next two bytes received. table 12-1 shows an entire write transaction on the bus. figure 12-1. ts register write operation 12.1 ts read operations reading data from the ts may be accomplished in one of two ways: ? if the location latched in the pointer register is correct (for normal operation it is expected the same address will be read repeatedly for temperature), the read sequence may consist of a device address from the bus master followed by two bytes of data from the device; or ? the pointer register is loaded with the correct register address, and the data is read. the sequence to preset the pointer register is shown in figure 12-4 , and the preset pointer read is shown in figure 12-3 . if it is desired to read random address each cycle, the complete pointer write, word read sequence is shown in figure 12-4 . the data byte has the most significant bit first. at the end of a read, this device can accept either acknowledge (ack) or no acknowledge (no ack) from the master (no acknowledge is typically used as a signal for the slave that the master has read its last byte). figure 12-2. write to pointer register figure 12-3. preset pointer register word read 0011a2a1a0 s t a r t device address r / w a c k a c k a c k a c k register pointer s t o p w r i t e data msb data lsb 0011a2a1a0 s t a r t r / w a c k a c k w s t o p r i t e device address register pointer 0011a2a1a0 s t a r t r / w a c k a c k n o a c k data msb data lsb s t o p r e a d device address
at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 28 figure 12-4. 2-wire pointer write register word read figure 12-5. setting permanent write protect register (pswp) figure 12-6. setting reversible write protect register (rswp) figure 12-7. clearing reversible write protect register (rswp) 0011a2a1a0 0011a2a1a0 s t a r t r / w r / w a c k a c k a c k a c k n o a c k register pointer device address data lsb data msb w r i t e s t a r t r e a d s t o p device address 0 1 1 0 a2 a1 a0 0 = dummy bit word address data control byte s t a r t s t o p a c k a c k a c k sda line 01100 0 10 = dummy bit word address data control byte s t a r t s t o p a c k a c k a c k sda line 01100 1 10 = dummy bit word address data control byte s t a r t s t o p a c k a c k a c k sda line
29 at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 table 12-1. eeprom write protection table 12-2. v hv table 12-3. eeprom software write protection command pin preamble r/w a2 a1 a0 b7 b6 b5 b4 b3 b2 b1 b0 set pswp a2 a1 a0 0 1 1 0 a2 a1 a0 0 set rswp 0 0 vhv 0 1 1 0 0 0 1 0 clear rswp 0 1 vhv 0 1 1 0 0 1 1 0 min max units v hv 7 10 v command r/w bit permanent write protect register pswp reversible write protect register rswp acknowledgement from device action from device 1010 r x x ack 1010 w programmed x ack can write to second half (80h ? ffh) only. 1010 w x programmed ack can write to second half (80h ? ffh) only. 1010 w not programmed not programmed ack can write to full array. read pswp r programmed x no ack stop ? indicates permanent write protect register is programmed. read pswp r not programmed x ack read out data don't care. indicates pswp register is not programmed. set pswp w programmed x no ack stop ? indicates permanent write protect register is programmed. set pswp w not programmed x ack program permanent write protect register (irreversible). read rswp r x programmed no ack stop ? indicates reversible write protect register is programmed. read rswp r x not programmed ack read out data don't care. indicates rswp register is not programmed. set rswp w x programmed no ack stop ? indicates reversible write protect register is programmed. set rswp w x not programmed ack program reversible write protect register (reversible). clear rswp w programmed x no ack stop ? indicates permanent write protect register is programmed. clear rswp w not programmed x ack clear (unprogram) reversible write protect register (reversible).
at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 30 13. eeprom read operations read operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to a logic 1. there are three read operations: current address read, random address read, and sequential read. current address read: the internal data word address counter maintains the last address accessed during the last read or write operation, incremented by one. this address stays valid between operations as long as the chip power is maintained. the address roll-over during read is from the last byte of the last memory page to the first byte of the first page. once the device address with the read/write select bit set to a logic 1 is clocked in and acknowledged by the eeprom, the current address data word is serially clocked out. to end the command, the microcontroller does not respond with an input zero but does generate a following stop condition (see figure 13-4 ). random read: a random read requires a dummy byte write sequence to load in the data word address. once the device address word and data word address are clocked in and acknowledged by the eeprom, the microcontroller must generate another start condition. the microcontroller now initiates a current address read by sending a device address with the read/write select bit high. the eeprom acknowledges the device address and serially clocks out the data word. to end the command, the microcontroller does not respond with a zero but does generate a following stop condition (see figure 13-5 ). sequential read: sequential reads are initiated by either a current address read or a random address read. after the microcontroller receives a data word, it responds with an ack. as long as the eeprom receives an ack, it will continue to increment the data word address and serially clock out sequential data words. when the memory address limit is reached, the data word address will roll-over and the sequential read will continue. the sequential read operation is terminated when the microcontroller does not respond with a zero but does generate a following stop condition (see figure 13-6 ). permanent write protect register (pswp) status: to find out if the register has been programmed, the same procedure is used as to program the register except that the r/w bit is set to a logic 1. if the device sends an acknowledge, then the permanent write protect register has not been programmed; otherwise, it has been programmed and the device is permanently write protected at the first half of the array. table 13-1. pswp status reversible write protect register (rswp) status: to find out if the register has been programmed, the same procedure is used as to program the register except that the r/w bit is set to a logic 1. if the device sends an acknowledge, then the reversible write protect register has not been programmed; otherwise, it has been programmed and the device is write protected (reversible) at the first half of the array. figure 13-1. eeprom device address command pin preamble r/w a2 a1 a0 b7 b6 b5 b4 b3 b2 b1 b0 read pswp a2 a1 a0 0 1 1 0 a2 a1 a0 1 msb lsb 1 0 1 0 a2 a1 a0 r/w
31 at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 figure 13-2. eeprom byte write figure 13-3. eeprom page write figure 13-4. eeprom current address read word address data device address s t a r t w r i t e s t o p a c k a c k r / w m s b m s b a c k sda line word address (n) data (n) device address s t a r t w r i t e s t o p a c k a c k a c k a c k l s b r / w m s b a c k sda line data (n + 1) data (n + x) data device address s t a r t r e a d s t o p a c k l s b r / w m s b n o a c k sda line
at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 32 figure 13-5. eeprom random read figure 13-6. eeprom sequential read word address (n) data (n) device address device address s t a r t s t a r t r e a d w r i t e s t o p a c k n o a c k a c k l s b l s b l s b r / w m s b m s b m s b a c k sda line dummy write data (n) data (n + x) device address r e a d s t o p a c k a c k n o a c k a c k r / w a c k sda line data (n + 1) data (n + 2)
33 at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 14. part marking 14.1 wdfn marking drawing no. rev. title catalog number truncation at30tse002a truncation code: t2a 8-lead wdfn t2a h2@ yxx 2.0 x 3.0 mm body note 2: package drawings are not to scale note 1: designates pin 1 30tse002asm a 1/16/13 30tse002asm, at30tse002a package marking information date codes voltages y = year m = month ww = work week of assembly 2: 2.7v min 2: 2012 6: 2016 a: january 02: week 2 3: 2013 7: 2017 b: february 04: week 4 4: 2014 8: 2018 ... ... 5: 2015 9: 2019 l: december 52: week 52 country of assembly lot number grade/lead finish material @ = country of assembly aaa...a = atmel wafer lot number h: industrial/nipdau trace code atmel truncation xx = trace code (atmel lot numbers correspond to code) at: atmel example: aa, ab.... yz, zz atm: atmel atml: atmel at30tse002a: package marking information package mark contact: dl-cso-assy_eng@atmel.com
at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 34 15. ordering information 15.1 ordering code detail 15.2 green package options (pb/halide-free/rohs compliant) note: 1. t = tape and reel ? wdfn = 5k per reel at30tse002a-mah-t atmel designator product family device density device revision shipping carrier option device grade package option 2 = 2-kilobit e = eeprom b = bulk (tubes) t = tape and reel h = green, nipdau lead finish temperature range (-20c to +125c) ma = 8-lead, 2.0 x 3.0 x 0.8mm (wdfn) sensor type memory type ordering code package lead finish operating voltage max. freq. (khz) operational range at30tse002a-mah-t (1) 8m2 nipdau 2.7v to 3.6v 400 -20c to 125c package type 8m2 8-lead, 2 x 3 x 0.8mm, thermally enhanced plastic very very thin dual flat no lead (wdfn)
35 at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 16. package drawings 16.1 8m2 ? 8-lead wdfn title drawing no. gpc rev. 8m2 ydl a 8m2, 8-lead 2.0x3.0 mm body, 0.50 mm pitch, wdfn, very very thin, dual no lead package (sawn) 6/12/09 notes: 1. this drawing is for general information only. refer to jedec drawing mo-229, wced-3, for proper dimensions, tolerances, datums, etc. 2. dimension b applies to metallized terminal and is measured between 0.15 mm and 0.30 mm from the terminal tip. if the terminal has the optional radius on the other end of the terminal, the dimension should not be measured in that radius area. 3. soldering the large thermal pad is optional, but not recommended. no electrical connection is accomplish ed to the device through this pad, so if soldered it should be tied to ground common dimensions (unit of measure = mm) symbol min nom max note d 2.00 bsc e 3.00 bsc d2 1.35 1.40 1.45 e2 1.25 1.30 1.35 a 0.70 0.75 0.80 a1 0.0 0.02 0.05 a3 0.20 ref l 0.35 0.40 0.45 e 0.50 bsc b 0.18 0.25 0.30 2 b (8x) ( 8 x ) pin 1 id p i n 1 i d pin 1 p i n 1 index i n d e x area a r e a a1 a 1 a3 a 3 d e a l (8x) l ( 8 x ) e (6x) e ( 6 x ) 1.50 ref. 1 . 5 0 r e f . d2 d 2 e2 e 2 package drawing contact: packagedrawings@atmel.com
at30tse002a [datasheet] atmel-8852a-seeprom-at30tse002a-datasheet_072013 36 17. revision history functionotes doc. rev. date comments 8852a 07/2013 initial document release.
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