MP38870 3a, 14v, 600khz step-down converter with synchronizable gate driver MP38870 rev. 1.1 www.monolithicpower.com 1 10/22/2009 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2009 mps. all rights reserved. the future of analog ic technology description the MP38870 is a monolithic step-down switch mode converter with a built in internal high-side power mosfet. it achieves 3a continuous output current over a wide input supply range with excellent load and line regulation. current mode operation provides fast transient response and reliable over current protection. fault condition protection includes cycle-by-cycle current limiting and thermal shutdown. the MP38870 requires a minimum number of readily available standard external components and is available in a space saving 3mm x 4mm 14-pin qfn package. features ? wide 4.5v to 14v operating input range ? 3a continuous output current ? 80m ? internal power mosfet switch ? power good indicator ? synchronous gate driver delivers up to 95% efficiency ? fixed 600khz frequency ? external synchronous option: 250khz- 1.5mhz ? cycle-by-cycle over current protection ? thermal shutdown ? output adjustable from 0.8v ? stable with low esr output ceramic capacitors ? available in a 3mm x 4mm 14-pin qfn package applications ? point of load regulator in distributed power system ? digital set top boxes ? personal video recorders ? broadband communications ? flat panel television and monitors ?mps? and ?the future of analog ic technology? are registered trademarks of monolithic power systems, inc. typical application sw bg fb bst 8, 9, 10 13 1 14 11 gnd in vcc en/sync v out 3.3v @ 3a v in pg 4, 5, 6 12 3 2 off on efficiency (%) 70 65 60 75 80 85 90 95 100 output current (a) efficiency vs. output current 012 34 v out =3.3v v in =5v v in =12v
MP38870 ? 3a, 14v, 600khz step-down with synchronous gate driver MP38870 rev. 1.1 www.monolithicpower.com 2 10/22/2009 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2009 mps. all rights reserved. package reference top view fb pg en/sync in in in n/c 1 2 3 4 5 6 7 gnd bg vcc bst sw sw sw 14 13 12 11 10 9 8 exposed pad on backside connect to grond part number* package temperature MP38870dl 3x4 qfn14 ?40 c to +85 c * for tape & reel, add suffix ?z (eg. MP38870dl?z) for rohs compliant packaging, add suffix ?lf (eg. MP38870dl?lf?z) absolute maxi mum ratings (1) supply voltage v in ....................................... 16v v sw ....................... ?0.3v (-5v for < 10ns) to 17v v bs ....................................................... v sw + 6v all other pins................................. ?0.3v to +6v junction temperature...............................150 c lead temperature ....................................260 c storage temperature ..............?65 c to +150 c recommended operating conditions (2) supply voltage v in ........................... 4.5v to 14v output voltage v out .................... 0.8v to v in -3v operating temperature .............?40 c to +85 c thermal resistance (3) ja jc 3x4 qfn14 ............................. 48 ...... 11... c/w notes: 1) exceeding these ratings may damage the device. 2) the device is not guaranteed to function outside of its operating conditions. 3) measured on approximately 1? square of 1 oz copper. electrical characteristics v in = 12v, t a = +25 c, unless otherwise noted. parameters symbol condition min typ max units feedback voltage v fb 4.5v v in 14v 0.788 0.808 0.828 v feedback current i fb v fb = 0.8v 10 na switch on resistance (4) r ds(on) 80 m ? switch leakage v en = 0v, v sw = 0v 0 10 a current limit (4) 4 a oscillator frequency f sw v fb = 0.6v 400 600 800 khz fold-back frequency v fb = 0v 60 150 240 khz maximum duty cycle v fb = 0.6v 85 90 % minimum on time (4) t on 100 ns under voltage lockout threshold rising 3.9 4.1 4.3 v under voltage lockout threshold hysteresis 880 mv en input low voltage 0.4 v en input high voltage 1.2 v v en = 2v 2 en input current v en = 0v 0 a synchronous frequency range (low) f sync_l 250 300 khz synchronous frequency range (high) f sync_h 1.5 mhz supply current (shutdown) v en = 0v 0 10 a supply current (quiescent) v en = 2v, v fb = 1v 0.9 1.1 ma thermal shutdown 150 c bg driver bias supply voltage v cc 4.5 5 v gate driver sink impedance (4) r sink 1 2 ? gate driver source impedance (4) r source 4 5.5 ? gate drive current sense trip threshold 20 mv
MP38870 ? 3a, 14v, 600khz step-down with synchronous gate driver MP38870 rev. 1.1 www.monolithicpower.com 3 10/22/2009 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2009 mps. all rights reserved. electrical characteristics (continued) v in = 12v, t a = +25 c, unless otherwise noted. parameters symbol condition min typ max units power good threshold 0.69 0.74 0.79 v power good threshold hysteresis 40 mv pg pin level v pg pg sink 4ma 0.4 v note: 4) guaranteed by design. pin functions pin # name description 1 fb feedback. an external resistor divider from the output to gnd, tapped to the fb pin sets the output voltage. to prevent current limit r un away during a short circuit fault condition the frequency foldback comparator lowers the oscillator frequency when the fb voltage is below 250mv. 2 pg power good indicator. the output of this pin is low if the output voltage is 10% less than the nominal voltage, otherwise it is an open drain. 3 en/sync on/off control and external frequency synchronization input. 4, 5, 6 in supply voltage. the MP38870 operates from a +4.5v to +14v unregulated input. c1 is needed to prevent large voltage spikes from appearing at the input. 7 n/c no connect. 8, 9, 10 sw switch output. 11 bst bootstrap. this capacitor is needed to dr ive the power switch?s gate above the supply voltage. it is connected between sw and bst pi ns to form a floating supply across the power switch driver. 12 vcc bg driver bias supply. decouple with a 1f ceramic capacitor. 13 bg gate driver output. connect this pin to the synchronous mosfet gate. 14 gnd ground. this pin is the voltage reference for the regulated output voltage. for this reason care must be taken in its layout. this node should be placed outside of the m2 to c1 ground path to prevent switching current spikes from inducing voltage noise into the part.
MP38870 ? 3a, 14v, 600khz step-down with synchronous gate driver MP38870 rev. 1.1 www.monolithicpower.com 4 10/22/2009 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2009 mps. all rights reserved. typical performanc e characteristics v in = 12v, v out = 3.3v, and t a = +28 c, unless otherwise noted.
MP38870 ? 3a, 14v, 600khz step-down with synchronous gate driver MP38870 rev. 1.1 www.monolithicpower.com 5 10/22/2009 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2009 mps. all rights reserved. typical performanc e characteristics (continued) v in = 12v, v out = 3.3v, and t a = +28 c, unless otherwise noted. load transient response input ripple voltage i out =3a output ripple voltage i out =3a enable startup no load enable startup full load power up no load power up full load v out 2v/div v in 5v/div v out 2v/div v in 50mv/div v sw 10v/div v sw 5v/div i inductor 2a/div v sw 10v/div v sw 10v/div v out 50mv/div v out 20mv/div i inductor 2a/div i inductor 2a/div i inductor 2a/div v out 2v/div v en 5v/div v sw 20v/div i inductor 5a/div v out 2v/div v en 5v/div v sw 20v/div v sw 10v/div i inductor 5a/div v in 10v/div v out 2v/div v sw 5v/div i inductor 2a/div 400ns/div 2ms/div 4ms/div 4ms/div 2ms/div latch off with output short circuit
MP38870 ? 3a, 14v, 600khz step-down with synchronous gate driver MP38870 rev. 1.1 www.monolithicpower.com 6 10/22/2009 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2009 mps. all rights reserved. operation in en/sync fb sw vcc bg gnd pg bst regulator oscillator 600khz driver current sense amplifier x40 error amplifier current limit comparator pwm comparator driver d regulator reference -- + -- + -- + s r r q q -- + c1 50pf c1 1pf power good v bg v cc v cc v bg figure 1?functional block diagram the MP38870 is a fixed frequency, synchronous, step-down switching regulator with an integrated high-side power mosfet and a gate driver for a low-side external mosfet. it achieves 3a continuous output current over a wide input supply range with excellent load and line regulation. it provides a single highly efficient solution with current mode control for fast loop response and easy compensation. the MP38870 operates in a fixed frequency, peak current control mode to regulate the output voltage. a pwm cycle is initiated by the internal clock. the integrated high-side power mosfet is turned on and remains on until its current reaches the value set by the comp voltage. when the power switch is off, it remains off until the next clock cycle starts. if, in 90% of one pwm period, the current in the power mosfet does not reach the comp set current value, the power mosfet will be forced to turn off. error amplifier the error amplifier compares the fb pin voltage with the internal 0.8v reference (ref) and outputs a current proportional to the difference between the two. this output current is then used to charge or discharge the internal compensation network to form the comp voltage, which is used to control the power mosfet current. the optimized internal compensation network minimizes the external component counts and simplifies the control loop design. internal regulator most of the internal circuitries are powered from the 5v internal regulator. this regulator takes the vin input and operates in the full vin range. when vin is greater than 5.0v, the output of the regulator is in full regulation. when vin is lower than 5.0v, the output decreases. since this internal regulator provides the bias current for the bottom gate driver that requires significant amount of current depending upon the external mosfet selection, a 1uf ceramic capacitor for decoupling purpose is required.
MP38870 ? 3a, 14v, 600khz step-down with synchronous gate driver MP38870 rev. 1.1 www.monolithicpower.com 7 10/22/2009 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2009 mps. all rights reserved. enable/synch control the MP38870 has a dedicated enable/synch control pin (en/sync). by pulling it high or low, the ic can be enabled and disabled by en. tie en to vin for automatic start up. to disable the part, en must be pulled low for at least 5s. the MP38870 can be synchronized to an external clock range from 250khz up to 1.5mhz through the en/sync pin. the internal clock rising edge is synchronized to the external clock rising edge. under-voltage lockout (uvlo) under-voltage lockout (uvlo) is implemented to protect the chip from operating at insufficient supply voltage. the MP38870 uvlo comparator monitors the output voltage of the internal regulator, vcc. the uvlo rising threshold is about 4.1v while its falling threshold is a consistent 3.2v. internal soft-start the soft-start is implemented to prevent the converter output voltage from overshooting during startup. when the chip starts, the internal circuitry generates a soft-start voltage (ss) ramping up from 0v to 1.2v. when it is lower than the internal reference (ref), ss overrides ref so the error amplifier uses ss as the reference. when ss is higher than ref, ref regains control. over-current-protection (ocp) the MP38870 has cycle-by-cycle over current limit when the inductor current peak value exceeds the set current limit threshold. meanwhile, output voltage starts to drop until fb is below the under-voltage (uv) threshold, typically 30% below the reference. once a output uv is triggered, the MP38870 enters latch off mode. mode is especially useful to ensure system safety under fault condition. the MP38870 exits the latch off mode once the en or input power is re-cycled. thermal shutdown thermal shutdown is implemented to prevent the chip from operating at exceedingly high temperatures. when the silicon die temperature is higher than 150 c, it shuts down the whole chip. when the temperature is lower than its lower threshold, typically 140 c, the chip is enabled again. floating driver and bootstrap charging the floating power mosfet driver is powered by an external bootstrap capacitor. this floating driver has its own uvlo protection. this uvlo?s rising threshold is 2.2v with a hysteresis of 150mv. the bootstrap capacitor voltage is regulated internally by v in through d1, m3, c4, l1 and c2 (figure 2). if (v in -v sw ) is more than 5v, u2 will regulate m3 to maintain a 5v bst voltage across c4. -- + -- + v in 5v u2 d1 m3 bst sw c4 c2 l1 v out figure 2 ? internal bootstrap charging circuit startup and shutdown if both vin and en are higher than their appropriate thresholds, the chip starts. the reference block starts first, generating stable reference voltage and currents, and then the internal regulator is enabled. the regulator provides stable supply for the remaining circuitries. three events can shut down the chip: en low, vin low and thermal shutdown. in the shutdown procedure, the signaling path is first blocked to avoid any fault triggering. the comp voltage and the internal supply rail are then pulled down. the floating driver is not subject to this shutdown command.
MP38870 ? 3a, 14v, 600khz step-down with synchronous gate driver MP38870 rev. 1.1 www.monolithicpower.com 8 10/22/2009 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2009 mps. all rights reserved. application information setting the output voltage the external resistor divider is used to set the output voltage (see the schematic on front page). the feedback resistor r1 also sets the feedback loop bandwidth with the internal compensation capacitor (see figure 1). choose r1 to be around 40.2k ? for optimal transient response. r2 is then given by: 1 v 8 . 0 v 1 r 2 r out ? = table 1?resistor selection for common output voltages v out (v) r1 (k ? ) r2 (k ? ) 1.8 40.2 (1%) 32.4 (1%) 2.5 40.2 (1%) 19.1 (1%) 3.3 40.2 (1%) 13 (1%) 5 40.2 (1%) 7.68 (1%) selecting the inductor a 1h to 10h inductor with a dc current rating of at least 25% percent higher than the maximum load current is recommended for most applications. for highest efficiency, the inductor dc resistance should be less than 15m ? . for most designs, the inductance value can be derived from the following equation. osc l in out in out f i v ) v v ( v l ? = where i l is the inductor ripple current. choose inductor current to be approximately 30% if the maximum load current, 3a. the maximum inductor peak current is: 2 i i i l load ) max ( l + = under light load conditions below 100ma, larger inductance is recommended for improved efficiency. synchronous mosfet the external synchronous mosfet is used to supply current to the inductor when the internal high-side switch is off. it reduces the power loss significantly when compared to a schottky rectifier. table 2 lists example synchronous mosfets and manufacturers. table 2?synchronous mosfet selection guide part no. manufacture si7112 vishay si7114 vishay am4874 analog power selecting the input capacitor the input current to the step-down converter is discontinuous, therefore a capacitor is required to supply the ac current to the step-down converter while maintaining the dc input voltage. use low esr capacitors for the best performance. ceramic capacitors with x5r or x7r dielectrics are highly recommended because of their low esr and small temperature coefficients. for most applications, a 10f capacitor is sufficient. since the input capacitor (c1) absorbs the input switching current it requires an adequate ripple current rating. the rms current in the input capacitor can be estimated by: ? ? ? ? ? ? ? ? ? = in out in out load 1 c v v 1 v v i i the worse case condition occurs at v in = 2v out , where: 2 i i load 1 c = for simplification, choose the input capacitor whose rms current rating greater than half of the maximum load current.
MP38870 ? 3a, 14v, 600khz step-down with synchronous gate driver MP38870 rev. 1.1 www.monolithicpower.com 9 10/22/2009 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2009 mps. all rights reserved. the input capacitor can be electrolytic, tantalum or ceramic. when using electrolytic or tantalum capacitors, a small, high quality ceramic capacitor, i.e. 0.1 f, should be placed as close to the ic as possible. when using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at input. the input voltage ripple caused by capacitance can be estimated by: ? ? ? ? ? ? ? ? ? = in out in out s load in v v 1 v v 1 c f i v selecting the output capacitor the output capacitor (c2) is required to maintain the dc output voltage. ceramic, tantalum, or low esr electrolytic capacitors are recommended. low esr capacitors are preferred to keep the output voltage ripple low. the output voltage ripple can be estimated by: ? ? ? ? ? ? ? ? + ? ? ? ? ? ? ? ? ? = 2 c f 8 1 r v v 1 l f v v s esr in out s out out where l is the inductor value and r esr is the equivalent series resistance (esr) value of the output capacitor. in the case of ceramic capacitors, the impedance at the switching frequency is dominated by the capacitance. the output voltage ripple is mainly caused by the capacitance. for simplification, the output voltage ripple can be estimated by: ? ? ? ? ? ? ? ? ? = in out 2 s out out v v 1 2 c l f 8 v v in the case of tantalum or electrolytic capacitors, the esr dominates the impedance at the switching frequency. for simplification, the output ripple can be approximated to: esr in out s out out r v v 1 l f v v ? ? ? ? ? ? ? ? ? = the characteristics of the output capacitor also affect the stability of the regulation system. the MP38870 can be optimized for a wide range of capacitance and esr values. pc board layout the high current paths (gnd, in and sw) should be placed very to the device with short, direct and wide traces. the input capacitor needs to be as close as possible to the in and gnd pins. the external feedback resistors should be placed next to the fb pin. keep the switching node sw short and away from the feedback network. external bootstrap diode an external bootstrap diode may enhance the efficiency of the regulator, the applicable conditions of external bst diode are: z v out =5v or 3.3v; and z duty cycle is high: d= in out v v >65% in these cases, an external bst diode is recommended from the output of the voltage regulator to bst pin, as shown in fig.3 MP38870 sw bst c l bst c 5v or 3.3v out external bst diode in4148 figure 3?add optional external bootstrap diode to enhance efficiency the recommended external bst diode is in4148, and the bst cap is 0.1~1f.
MP38870 ? 3a, 14v, 600khz step-down with synchronous gate driver notice: the information in this document is subject to change wi thout notice. users should warra nt and guarantee that third party intellectual property rights are not infringed upon w hen integrating mps products into any application. mps will not assume any legal responsibility for any said applications. MP38870 rev. 1.1 www.monolithicpower.com 10 10/22/2009 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2009 mps. all rights reserved. package information 3mm x 4mm qfn14 side view top view 1 14 8 7 bottom view 2.90 3.10 1.60 1.80 3.90 4.10 3.20 3.40 0.50 bsc 0.18 0.30 0.80 1.00 0.00 0.05 0.20 ref pin 1 id marking 1.70 0.50 0.25 recommended land pattern 2.90 note: 1) all dimensions are in millimeters. 2) exposed paddle size do es not include mold flash. 3) lead coplanarity sha ll be 0.10 millimeter max. 4) jedec reference is mo-229, variation vged-3. 5) drawing is not to scale. pin 1 id see detail a 3.30 0.70 pin 1 id option b r0.20 typ. pin 1 id option a 0.30x45 o typ. detail a 0.30 0.50 pin 1 id index area
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