Part Number Hot Search : 
NJM2286D A118006 FU9024 DFLZ30 MA08611 LS424 2N264 G13JPF
Product Description
Full Text Search
 

To Download FDPC8014S Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  april 2014 FDPC8014S powertrench ? power clip ?2013 fairchild semiconductor corporation 1 www.fairchildsemi.com FDPC8014S rev.c7 pin1 top bottom power clip 5x6 pin1 gr gr v+ lsg sw sw sw v+ hsg sw lsg sw sw sw v+ v+ hsg pad9 gnd(lss) pad10 v+(hsd) FDPC8014S powertrench ? power clip 25v asymmetric dual n-channel mosfet features q1: n-channel ? max r ds(on) = 3.8 m at v gs = 10 v, i d = 20 a ? max r ds(on) = 4.7 m at v gs = 4.5 v, i d = 18 a q2: n-channel ? max r ds(on) = 1.2 m at v gs = 10 v, i d = 41 a ? max r ds(on) = 1.4 m at v gs = 4.5 v, i d = 37 a ? low inductance packaging shortens rise/fall times, resulting in lower switching losses ? mosfet integration enables optimum layout for lower circuit inductance and reduced switch node ringing ? rohs compliant general description this device includes two specialized n-channel mosfets in a dual package. the switch node has been internally connected to enable easy placement and rout ing of synchronous buck converters. the control mo sfet (q1) and synchronous syncfet tm (q2) have been designed to provide optimal power efficiency. applications ? computing ? communications ? general purpose point of load mosfet maximum ratings t a = 25 c unless otherwise noted thermal characteristics symbol parameter q1 q2 units v ds drain to source voltage 25 note5 25 v v gs gate to source voltage 12 12 v i d drain current -continuous t c = 25 c 60 110 a -continuous t a = 25 c 20 note1a 41 note1b -pulsed t a = 25 c (note 4) 75 160 e as single pulse avalanche energy (note 3) 73 253 mj p d power dissipation for single operation t c = 25 c 21 42 w power dissipation for single operation t a = 25 c 2.1 note1a 2.3 note1b t j , t stg operating and storage junction temperature range -55 to +150 c r jc thermal resistance, junction to case 6.0 3.0 c/w r ja thermal resistance, junction to ambient 60 note1a 55 note1b r ja thermal resistance, junction to ambient 130 note1c 120 note1d pin name description pin name description pin name description 1 h s g h i g h s i d e g a t e 3 , 4 , 1 0 v + ( h s d ) h i g h s i d e d r a i n 8 l s g l o w s i d e g a t e 2 gr gate return 5,6,7 sw switching node, low side drain 9 gnd(lss) low side source
FDPC8014S powertrench ? power clip ?2013 fairchild semiconductor corporation 2 www.fairchildsemi.com FDPC8014S rev.c7 package marking and ordering information electrical characteristics t j = 25 c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics device marking device package reel size tape width quantity 05od/16od FDPC8014S power clip 56 13 ? 12 mm 3000 units symbol parameter test conditions type min typ max units bv dss drain to source breakdown voltage i d = 250 a, v gs = 0 v i d = 1 ma, v gs = 0 v q1 q2 25 25 v bv dss t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 c i d = 10 ma, referenced to 25 c q1 q2 24 24 mv/c i dss zero gate voltage drain current v ds = 20 v, v gs = 0 v v ds = 20 v, v gs = 0 v q1 q2 1 500 a a i gss gate to source leakage current, forward v gs = 12 v/-8 v, v ds = 0 v v gs = 12 v/-8 v, v ds = 0 v q1 q2 100 100 na na v gs(th) gate to source threshold voltage v gs = v ds , i d = 250 a v gs = v ds , i d = 1 ma q1 q2 0.8 1.1 1.3 1.4 2.5 2.5 v v gs(th) t j gate to source threshold voltage temperature coefficient i d = 250 a, referenced to 25 c i d = 10 ma, referenced to 25 c q1 q2 -4 -3 mv/c r ds(on) drain to source on resistance v gs = 10v, i d = 20 a v gs = 4.5 v, i d = 18 a v gs = 10 v, i d = 20 a,t j =125 c q1 2.8 3.4 3.9 3.8 4.7 5.3 m v gs = 10v, i d = 41 a v gs = 4.5 v, i d = 37 a v gs = 10 v, i d = 41 a ,t j =125 c q2 0.9 1.0 1.1 1.2 1.4 1.5 g fs forward transconductance v ds = 5 v, i d = 20 a v ds = 5 v, i d = 41 a q1 q2 182 315 s c iss input capacitance q1: v ds = 13 v, v gs = 0 v, f = 1 mhz q2: v ds = 13 v, v gs = 0 v, f = 1 mhz q1 q2 1695 6580 2375 9870 pf c oss output capacitance q1 q2 495 1720 710 2580 pf c rss reverse transfer capacitance q1 q2 54 204 100 370 pf r g gate resistance q1 q2 0.1 0.1 0.4 0.4 1.2 1.2 t d(on) turn-on delay time q1: v dd = 13 v, i d = 20 a, r gen = 6 q2: v dd = 13 v, i d = 41 a, r gen = 6 q1 q2 8 16 16 28 ns t r rise time q1 q2 2 6 10 11 ns t d(off) turn-off delay time q1 q2 24 47 38 75 ns t f fall time q1 q2 2 4 10 10 ns q g total gate charge v gs = 0 v to 10 v q1 v dd = 13 v, i d = 20 a q2 v dd = 13 v, i d = 41 a q1 q2 25 93 35 130 nc q g total gate charge v gs = 0 v to 4.5 v q1 q2 11 43 16 60 nc q gs gate to source gate charge q1 q2 3.4 13 nc q gd gate to drain ?miller? charge q1 q2 2.2 8.5 nc
FDPC8014S powertrench ? power clip ?2013 fairchild semiconductor corporation 3 www.fairchildsemi.com FDPC8014S rev.c7 electrical characteristics t j = 25 c unless otherwise noted drain-source diod e characteristics symbol parameter test conditions type min typ max units v sd source to drain diode forward voltage v gs = 0 v, i s = 20 a (note 2) v gs = 0 v, i s = 41 a (note 2) q1 q2 0.8 0.8 1.2 1.2 v i s diode continuous forward current t c = 25 c q1 q2 60 110 a i s,pulse diode pulse current q1 q2 75 160 a t rr reverse recovery time q1 i f = 20 a, di/dt = 100 a/ s q2 i f = 41 a, di/dt = 300 a/ s q1 q2 25 36 40 58 ns q rr reverse recovery charge q1 q2 10 47 20 75 nc notes: 1.r ja is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of fr-4 material. r jc is guaranteed by design while r ca is determined by the user's board design. 2 pulse test: pulse width < 300 s, duty cycle < 2.0%. 3. q1 :e as of 73 mj is based on starting t j = 25 o c; n-ch: l = 3 mh, i as = 7 a, v dd = 30 v, v gs = 10 v. 100% test at l= 0.1 mh, i as = 24 a. q2: e as of 253 mj is based on starting t j = 25 o c; n-ch: l = 3 mh, i as = 13 a, v dd = 25 v, v gs = 10 v. 100% test at l= 0.1 mh, i as = 43 a. 4. pulsed id limited by junction temperature,td<=10 us. please refer to soa curve for more details. 5. the continuous v ds rating is 25 v; however, a pulse of 30 v peak voltage for no longer than 100 ns duration at 600 khz frequency can be applied. a. 60 c/w when mounted on a 1 in 2 pad of 2 oz copper c. 130 c/w when mounted on a minimum pad of 2 oz copper b. 55 c/w when mounted on a 1 in 2 pad of 2 oz copper d. 120 c/w when mounted on a minimum pad of 2 oz copper g df ds sf ss g df ds sf ss g df ds sf ss g df ds sf ss
FDPC8014S powertrench ? power clip ?2013 fairchild semiconductor corporation  4  www.fairchildsemi.com FDPC8014S rev.c7 typical characteristics (q1 n-channel) t j = 25c unless otherwise noted figure 1. 0.00.20.40.60.81.0 0 15 30 45 60 75 v gs = 3.5 v v gs = 3 v pulse duration = 80 p s duty cycle = 0.5% max v gs = 2.5 v v gs = 10 v i d , drain current (a) v ds , drain to source voltage (v) v gs = 4.5 v on region characteristics figure 2. 0 1530456075 0 1 2 3 4 5 v gs = 3 v pulse duration = 80 p s duty cycle = 0.5% max normalized drain to source on-resistance i d , drain current (a) v gs = 3.5 v v gs = 4.5 v v gs = 2.5 v v gs = 10 v n o r m a l i z e d o n - r e s i s t a n c e vs. drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 i d = 20 a v gs = 10 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs. junction temperature figure 4. 12345678910 0 3 6 9 12 t j = 125 o c i d = 20 a t j = 25 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m : ) pulse duration = 80 p s duty cycle = 0.5% max o n - r e s i s t a n c e v s . g a t e t o source voltage figure 5. transfer characteristics 1.0 1.5 2.0 2.5 3.0 0 15 30 45 60 75 t j = 150 o c v ds = 5 v pulse duration = 80 p s duty cycle = 0.5% max t j = -55 o c t j = 25 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0.0 0.2 0.4 0.6 0.8 1.0 0.001 0.01 0.1 1 10 100 t j = -55 o c t j = 25 o c t j = 150 o c v gs = 0 v i s , reverse drain current (a) v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs. source current
FDPC8014S powertrench ? power clip ?2013 fairchild semiconductor corporation  5  www.fairchildsemi.com FDPC8014S rev.c7 figure 7. 0 6 12 18 24 30 0 2 4 6 8 10 i d = 20 a v dd = 15 v v dd = 10 v v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 13 v gate charge characteristics figure 8. 0.1 1 10 25 10 100 1000 10000 f = 1 mhz v gs = 0 v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss c a p a c i t a n c e v s . d r a i n to source voltage figure 9. 0.001 0.01 0.1 1 10 100 1 10 30 t j = 100 o c t j = 25 o c t j = 125 o c t av , time in avalanche (ms) i as , avalanche current (a) u n c l a m p e d i n d u c t i v e switching capability figure 10. 25 50 75 100 125 150 0 10 20 30 40 50 60 70 v gs = 4.5 v r t jc = 6.0 o c/w v gs = 10 v i d , drain current (a) t c , case temperature ( o c ) maximum continuous drain current vs. case temperature f i g u r e 1 1 . f o r w a r d b i a s s a f e op erating area 0.1 1 10 80 0.1 1 10 100 500 curve bent to measured data 10 p s 10 ms dc 100 p s 1 ms i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r t jc = 6.0 o c/w t c = 25 o c f i g u r e 1 2 . s i n g l e p u l s e m a x i m u m power dissipation 10 -5 10 -4 10 -3 10 -2 10 -1 1 10 100 1000 5000 p (pk) , peak transient power (w) single pulse r t jc = 6.0 o c/w t c = 25 o c t, pulse width (sec) typical characteristics (q1 n-channel) t j = 25c unless otherwise noted
FDPC8014S powertrench ? power clip ?2013 fairchild semiconductor corporation  6  www.fairchildsemi.com FDPC8014S rev.c7 figure 13. junction-to-case transient thermal response curve 10 -5 10 -4 10 -3 10 -2 10 -1 1 0.005 0.01 0.1 1 2 single pulse duty cycle-descending order r(t), normalized effective transient thermal resistance t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 p dm t 1 t 2 notes: duty factor: d = t 1 / t 2 t j - t c = p dm x z t jc (t) z t jc (t) = r(t) x r t jc r t jc = 6.0 o c/w typical characteristics (q1 n-channel) t j = 25c unless otherwise noted
FDPC8014S powertrench ? power clip ?2013 fairchild semiconductor corporation 7 www.fairchildsemi.com FDPC8014S rev.c7 typical characteristics (q2 n-channel) t j = 25 c unless otherwise noted figure 14. on- region characteristics figure 15. normalized on-resistance vs. drain current and gate voltage figure 16. normalized on-resistance vs. junction temperature figure 17. on-resistance vs. gate to source voltage figure 18. transfer characteristics figure 19. source to drain diode forward voltage vs. source current 0.00 0.25 0.50 0.75 1.00 0 40 80 120 160 v gs = 3 v v gs = 2.5 v v gs = 3.5 v v gs = 4.5 v pulse duration = 80 s duty cycle = 0.5% max v gs = 10 v i d , drain current (a) v ds , drain to source voltage (v) 0 40 80 120 160 0 2 4 6 v gs = 3 v pulse duration = 80 s duty cycle = 0.5% max normalized drain to source on-resistance i d , drain current (a) v gs = 3.5 v v gs = 4.5 v v gs = 2.5 v v gs = 10 v -75 -50 -25 0 25 50 75 100 125 150 0.6 0.8 1.0 1.2 1.4 1.6 i d = 41 a v gs = 10 v normalized drain to source on-resistance t j , junction temperature ( o c ) 246810 0 1 2 3 4 5 t j = 125 o c i d = 41 a t j = 25 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m ) pulse duration = 80 s duty cycle = 0.5% max 1.0 1.5 2.0 2.5 3.0 0 40 80 120 160 t j = 125 o c v ds = 5 v pulse duration = 80 s duty cycle = 0.5% max t j = -55 o c t j = 25 o c i d , drain current (a) v gs , gate to source voltage (v) 0.0 0.2 0.4 0.6 0.8 1.0 0.001 0.01 0.1 1 10 100 200 t j = -55 o c t j = 25 o c t j = 125 o c v gs = 0 v i s , reverse drain current (a) v sd , body diode forward voltage (v)
FDPC8014S powertrench ? power clip ?2013 fairchild semiconductor corporation 8 www.fairchildsemi.com FDPC8014S rev.c7 typical characteristi cs (q2 n-channel) t j = 25c unless otherwise noted figure 20. gate charge characteristics figure 21. capacitance vs. drain to source voltage figure 22. unclamped inductive switching capability figure 23. maximum continuous drain current vs. case temperature f i g u r e 2 4 . f o r w a r d b i a s s a f e operating area figure 25. single pulse maximum power dissipation 0 20406080100 0 2 4 6 8 10 i d = 41 a v dd = 15 v v dd = 10 v v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 13 v 0.1 1 10 25 100 1000 10000 f = 1 mhz v gs = 0 v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss 0.001 0.01 0.1 1 10 100 1000 1 10 100 t j = 100 o c t j = 25 o c t j = 125 o c t av , time in avalanche (ms) i as , avalanche current (a) 25 50 75 100 125 150 0 20 40 60 80 100 120 140 160 180 limited by package v gs = 4.5 v r jc = 3.0 o c/w v gs = 10 v i d , drain current (a) t c , case temperature ( o c ) 0.1 1 10 80 0.1 1 10 100 1000 2000 10 s curve bent to measured data 100 s 1 ms 10 ms dc i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r jc = 3.0 o c/w t c = 25 o c 10 -5 10 -4 10 -3 10 -2 10 -1 1 10 1 10 2 10 3 10 4 single pulse r jc = 3.0 o c/w t c = 25 o c p ( pk ) , peak transient power (w) t, pulse width (sec)
typical characteristics (q2 n-channel) t j = 25 c unless otherwise noted figure 26. junction-to-case transient thermal response curve 10 -5 10 -4 10 -3 10 -2 10 -1 1 0.001 0.01 0.1 1 2 single pulse duty cycle-descending order r(t), normalized effective transient thermal resistance t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 p dm t 1 t 2 notes: duty factor: d = t 1 / t 2 t j - t c = p dm x z t jc (t) z t jc (t) = r(t) x r t jc r t jc = 3.0 o c/w FDPC8014S powertrench ? power clip ?2013 fairchild semiconductor corporation  9  www.fairchildsemi.com FDPC8014S rev.c7
FDPC8014S powertrench ? power clip ?2013 fairchild semiconductor corporation 10 www.fairchildsemi.com FDPC8014S rev.c7 syncfet tm schottky body diode characteristics fairchild?s syncfet tm process embeds a schottky diode in parallel with powertrench ? mosfet. this diode exhibits similar characteristics to a discrete ex ternal schottky diode in parallel with a mosfet. figure 27 shows the reverses recovery characteristic of the FDPC8014S. schottky barrier diodes exhibit si gnificant leakage at high tem- perature and high reverse voltage. this will increase the power in the device. figure 27. FDPC8014S syncfet tm body diode reverse recovery characteristic 100 200 300 400 500 -10 0 10 20 30 40 50 di/dt = 300 a/us current (a) time (ns) figure 28. syncfet tm body diode reverse leakage vs. drain-source voltage 0 5 10 15 20 25 10 -6 10 -5 10 -4 10 -3 10 -2 t j = 125 o c t j = 100 o c t j = 25 o c i dss , reverse leakage current (a) v ds , reverse voltage (v) typical char acteristics (continued)
FDPC8014S powertrench ? power clip ?2013 fairchild semiconductor corporation 11 www.fairchildsemi.com FDPC8014S rev.c7 dimensional outlin e and pad layout package drawings are provided as a servic e to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the draw ing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, spe- cifically the warranty therein, which covers fairchild products. always visit fairchild semiconduc tor?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/package/ packagedetails.html?id=pn_pqdam-x08 c l l c pkg pkg 5.10 4.90 6.10 5.90 c 5.00.05 3.81 1.57.05 top view side view bottom view 5 8 4 1 4 3 2 1 5 6 7 0.10 c a b 0.05 c 1.37.05 0.49.05 notes: unless otherwise specified a) does not fully conform to jedec registration, mo-229, dated 11/2001. b) all dimensions are in millimeters. c) dimensions do not include burrs or mold flash. mold flash or burrs does not exceed 0.10mm. d) dimensioning and tolerancing per asme y14.5m-1994. e) drawing file name: pqfn08krev2 see detail a (scale: 2x) 0.05 0.00 0.30 0.20 0.08 c pin #1 indicator seating plane 0.10 c 0.80 0.70 recommended land pattern 5 6 7 8 1 2 3 4 1.27 0.65.05 0.48.05 a 0.10 c 2x b 0.10 c 2x 0.51.05 2.46.05 8 3.90.05 0.53.05 0.91.05 0.51 6.60 0.75 4.22.05 3.15.05 0.00 0.00 1.43 3.30 2.08 2.48 3.30 2.48 1.53 1.01 1.08 1.48 1.53 2.29 0.83 5.00 0.82 1.01 0.40 2.65 1.98 4.56 4.20 1.27 0.65.05
FDPC8014S powertrench ? power clip ?2013 fairchild semiconductor corporation 12 www.fairchildsemi.com FDPC8014S rev.c7 trademarks the following includes registered and unregistered trademarks and service marks, owned by fairchild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. *trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes wi thout further notice to any products herein to improve reliability, function, or design. fairchild does not assume an y liability arising out of the application or use of any product or circuit described herein; neither does it convey an y license under its patent rights, nor the rights of others. these specifications do not expand the term s of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized for use as critical components in life support de vices or systems without the express written approval of fai rchild semiconductor corporation. as used here in: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms accupower? ax-cap ? * bitsic? build it now? coreplus? corepower? crossvolt ? ctl? current transfer logic? deuxpeed ? dual cool? ecospark ? efficentmax? esbc? fairchild ? fairchild semiconductor ? fact quiet series? fact ? fast ? fastvcore? fetbench? fps? f-pfs? frfet ? global power resource sm greenbridge? green fps? green fps? e-series? g max ? gto? intellimax? isoplanar? marking small speakers sound louder and better? megabuck? microcoupler? microfet? micropak? micropak2? millerdrive? motionmax? mwsaver ? optohit? optologic ? optoplanar ? powertrench ? powerxs? programmable active droop? qfet ? qs? quiet series? rapidconfigure? saving our world, 1mw/w/kw at a time? signalwise? smartmax? smart start? solutions for your success? spm ? stealth? superfet ? supersot?-3 supersot?-6 supersot?-8 supremos ? syncfet? sync-lock? ?* tinyboost ? tinybuck ? tinycalc? tinylogic ? tinyopto? tinypower? tinypwm? tinywire? transic? trifault detect? truecurrent ? * serdes? uhc ? ultra frfet? unifet? vcx? visualmax? voltageplus? xs? ? ? ? ? datasheet identification product status definition advance information formative / in design datasheet contains the design specifications for product development. specifications may change in any manner without notice. preliminary first production datasheet contains preliminary data; supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice to improve design. no identification needed full production datasheet contains final specifications. fa irchild semiconductor reserves the right to make changes at any time without notice to improve the design. obsolete not in production datasheet contains specifications on a product that is discontinued by fairchild semiconductor. the datasheet is for reference information only. anti-counterfeiting policy fairchild semiconductor corporation?s anti-counterfeiting policy. fairchild?s anti-counterfeiting policy is also stated on our external website, www.fairchildsemi.com, under sales support . counterfeiting of semiconductor parts is a growing problem in the industry. all manufactures of semiconductor products are expe riencing counterfeiting of their parts. customers who inadvertently purchase counterfeit parts experie nce many problems such as loss of brand reputation, substa ndard performance, failed application, and increased cost of production and manufacturing del ays. fairchild is taking strong measures to protect ourselve s and our customers from the proliferation of counterfeit parts. fairchild strongly encourages customers to purchase fairchild parts either directly from fa irchild or from authorized fairchild distributors who are listed by country on our web page cited above. products customers buy either from fairchild directly or fr om authorized fairchild distributors are genuine parts, have full traceability, meet fairchild?s quality standards for handing and storage and provide access to fairchild?s full range of up-to-date technical and product information. fairchild and our authorized distributors will stand behind all warranties and wi ll appropriately address and warranty issues that may arise. fairchild will not provide any warranty coverage or other assistance for parts bought from unau thorized sources. fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. rev. i68 tm ?
mouser electronics authorized distributor click to view pricing, inventory, delivery & lifecycle information: fairchild semiconductor: ? FDPC8014S


▲Up To Search▲   

 
Price & Availability of FDPC8014S

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X