View A024CN03V2_7876745.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

customer approval sheet company name model customer approved title : name : approval for specifications only (spec. ver. ) approval for specifications and es sample (spec. ver. ) approval for specifications and cs sample (spec. ver. ) customer remark : auo pm : p/n : comment : 1 li-hsin rd. 2. science-based industrial park hsinchu 300, taiwan, r.o.c. tel: +886-3-500-8899 fax: +886-3-577-2730 do c . v e r s io n : 0 . 2 to ta l pa g e s : 5 3 da t e : 2 0 0 9 / 1 0 / 0 7 product specification 2.36 color tft - lcd module ?????? 13902986740 qq:770654 msn:windows0429@hotmail.com www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 2/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without p ermission from au optronics corp. 2 record of revision version revise date page content 0.0 2009/08/07 draft 0.1 2009/10/07 9 m o d i f y v c d c v a l u e . 0.2 2009/10/30 46 ~ 53 m o d i f y p o w e r o n / o f f s e t t i n g . 0.3 2009/11/30 9 m o d i f y v cdc v o l t a g e v a l u e . model name a024cn03 v2 planned lifetime: from 2009/aug. to 2011/jun. phase-out control: from 2011/mar. to 2011/jun. eol schedule: 2011/jun. note: the content of this specificat ion is subject to change. ? 2009 au optronics a ll rights reserved, do not copy. < > preliminary specification < > final specification auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 3/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without p ermission from au optronics corp. 3 contents: a. physical specifications..................................... ................................................... ...............5 b. electrical specifications ................................... ................................................... ...............6 1. pin assignment.................................. ................................................... ................................................... .... 6 2. absolute maximum ratings ........................ ................................................... ............................................. 7 3. electrical characteristics ...................... ................................................... ................................................... 8 a. typical operating conditions (gnd=0v)............. ................................................... ................................. 8 b. current characteristics (gnd=0v) ................. ................................................... ..................................... 8 c. led driving conditions ............................ ................................................... ............................................ 8 4. ac timing....................................... ................................................... ................................................... ........ 9 a. digital signal ac characteristic ................. ................................................... ......................................... 9 b. ups051 timing conditions........................ ................................................... ........................................ 10 c. ups052 timing conditions .......................... ................................................... ...................................... 13 d. ccir656 timing conditions ......................... ................................................... ..................................... 16 e. yuv timing ...................................... ................................................... ................................................. 18 5. charge pump structure ........................... ................................................... .............................................. 21 6. reference circuit............................... ................................................... ................................................... .. 22 7. serial interface & register table ............... ................................................... ........................................... 26 a. serial interface format.......................... ................................................... ............................................. 26 b. the configuration of serial data at sda terminal is at below ........................................ ....................... 26 c. register parameters.............................. ................................................... ............................................ 27 d. detail register description ..................... ................................................... .......................................... 28 c. optical specification (note 1,note 2, note 3 ).................. ..............................................35 d. reliability test items: ................................... ................................................... ..................38 e. packing form .......................................... ................................................... .........................40 f. outline dimension ..................................... ................................................... .....................41 g. application notes .................................. ................................................... ............................42 1. stand-by timing ................................. ................................................... ................................................... .. 42 2. power on sequence............................... ................................................... ................................................. 43 3. power off sequence .............................. ................................................... ................................................. 44 4. recommended power on/off serial command settings ................................................... ..................... 45 4.1. recommend ups051 (9.7 mhz) power on/off setting. ................................................... .................. 45 4.2. recommend ups052 320rgb mode (24.54 mhz) power o n/off setting ...................................... .. 46 4.3. recommend ups052 360rgb mode (27mhz) power on/of f setting.......................................... ..... 47 4.4. recommend yuv mode a 640y 320crcb (24.54 mhz) po wer on/off setting ................................. 48 4.5. recommend yuv mode a 720y 360crcb (27 mhz) power on/off setting.................................... ... 49 auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 4/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without p ermission from au optronics corp. 4 4.6. recommend yuv mode b 640y 320crcb (24.54 mhz) po wer on/off setting ................................. 50 4.7. recommend yuv mode b 720y 320crcb (27 mhz) powe r on/off setting ................................... ... 51 4.8. recommend ccir656 mode (27 mhz) power on/off sett ing ................................................ ........... 52 auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 5/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without p ermission from au optronics corp. 5 a. physical specifications no. item specification remark 1 display resolution (dot) 480(w)234(h) 2 active area (mm) 48.0 (w) 35.685 (h) 3 screen size (inch) 2.36 (diagonal) 4 dot pitch (mm) 0.10 (w) 0.1525 (h) 5 color configuration r. g. b. delta 6 overall dimension (mm) 54.9 (w) 47.45 (h) 2.6 (d) note 1 7 weight (g) 10.9 8 panel surface treatment hard coating note 1: refer to fig.1 auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 6/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without p ermission from au optronics corp. 6 b. electrical specifications 1. pin assignment pin no symbol i/o description remark 1 vcom i common electrode driving voltage 2 dummy nc no connection 3 vgl c negative low power supply for gate driver o utput: -12.5v 4 c4p c pins to connect capacitance for power circui try 5 c4m c pins to connect capacitance for power circui try 6 vgh c positive power supply for gate driver outpu t: +12.5v 7 frp o frame polarity output for vcom 8 vcac c define the amplitude of the vcom swing 9 vint3 c intermediate voltage for charge pump 10 c3p c pins to connect capacitance for power circuitry 11 c3m c pins to connect capacitance for power circuitry 12 vint2 c intermediate voltage for charge pump 13 c2p c pins to connect capacitance for power circu itry 14 c2m c pins to connect capacitance for power circu itry 15 vint1 c intermediate voltage for charge pump 16 c1p c pins to connect capacitance for power circuitry 17 c1m c pins to connect capacitance for power circu itry 18 pgnd p charge pump power gnd 19 pvdd p charge pump power vdd 20 drv o gate signal for the power transistor of th e boost converter 21 led+ p for led anode voltage 22 dummy nc no connection 23 fb p/i led cathode and main boost regulator feedback input 24 dummy nc no connection 25 gnd p digital gnd 26 vcc p digital power supply 27 cs i serial communication chip select 28 sda i/o serial communication data input/output 29 scl i serial communication clock input 30 hsync i horizontal sync input 31 vsync i vertical sync input 32 dclk i clock input: 33 d7 i data input: msb auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 7/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without p ermission from au optronics corp. 7 34 d6 i data input: 35 d5 i data input: 36 d4 i data input: 37 d3 i data input: 38 d2 i data input: 39 d1 i data input: 40 d0 i data input: lsb i: input; o: output. p: power. i/o input/output c: c apacitor pin. p/i: power / input. note: definition of scanning direction. refer to figu re as below 2. absolute maximum ratings item symbol condition min. max. unit remark v cc gnd=0 -0.5 7.0 v power voltage pv dd pgnd=0 -0.5 7.0 v input signal voltage d0~d7 - -0.3 3.6 v input signal voltage vcom - -2.9 5.2 v vcom dc voltage operating temperature topa - 0 60 ambient temperature storage temperature tstg - -25 70 ambient temperature auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 8/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without p ermission from au optronics corp. 8 3. electrical characteristics a. typical operating conditions (gnd=0v) item symbol min. typ. max. unit remark v cc 2.7 3.3 3.6 v note 1 power voltage pv dd 3.0 3.3 3.6 v note 1 vgh 11.0 12.5 14.0 v gnd=pgnd=0v tft-lcd power voltage vgl -14.0 -12.5 -11.0 v gnd=pgnd=0v h level v oh vcc-0.4 - vcc v output signal voltage l level v ol gnd - gnd+0.4 v h level v ih 0.7xv cc - v cc v input signal voltage l level v il gnd - 0.3xv cc v v cac 4.4 5.0 5.1 v v vcom voltage v cdc 1.0 1.1 1.2 v v drv output voltage v drv 0 - pv dd v v note 1: a build-in power on reset circuit for pv dd and v cc is provided within the integrated lcd driver ic. b. current characteristics (gnd=0v) parameter symbol condition min. typ. max. unit remark input current for v cc i vcc (pin 26) v cc =3.3v -- 0.1 0.3 m a note 1 input current for pv dd i pvdd (pin 19) pv dd =3.3v -- 8 10 ma note 1 h level ioh - 400 - ua output current l level iol - -400 - ua analog stand by current i pvdd pv dd =3.3v - 7.5 10 ua digital stand by current i vcc v cc =3.3v - -- 110 ua dclk is stopped drv output current i drv v cc = 3.0v drv = 0.7v - - 10 ma note 1: use ups052 mode and f dclk =24.54mhz,.other registers are default setting. c. led driving conditions parameter symbol min. typ. max. unit remark led current i l 25 27.5 ma led voltage v l - 3.8 4.4 v note1 note 1 : typical led voltage : 3.2v/pcs,fb=0.6v, le d voltage: v l =3.2+0.6=3.8v . refer to application circuit. auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 9/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without p ermission from au optronics corp. 9 4. ac timing a. digital signal ac characteristic parameter symbol min. typ. max. unit. dclk duty cycle tcwh/tcwl 40 50 60 % t dclk vsync setup time tvst 12 - - ns vsync hold time tvhd 12 - - ns hsync setup time thst 12 - - ns hsync hold time thhd 12 - - ns data set-up time tdsu 12 - - ns data hold time tdhd 12 - - ns hsync width thsw 1 1 254 t dclk vsync width tvsw 1 t dclk 1 t dclk 6t h auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 10/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without p ermission from au optronics corp. 10 b. ups051 timing conditions parameter symbol min. typ. max. unit. remark dclk frequency 1/t dclk 8.4 9.7 11 mhz period t h 580 617 695 t dclk display period t hd 480 t dclk back porch t hbp 84 100 115 t dclk front porch t hfp t h - t hd - t hbp t dclk hsync pulse width t hsw 1 1 50 t dclk note 1 odd period even t v 247.5 262.5 277.5 t h odd display period even t vd 234 t h odd 9 16 24 back porch even t vbp 9.5 16.5 24.5 t h odd front porch even t vfp t v C t vd C t vbp t h odd vsync pulse width even t vsw 1 t dclk 1t h 6t h note 2, 3, 4 note 1: ups051 horizontal back porch time (t hbp ) is adjustable by setting register ddl; requirement of minimum back porch time and minimum front porch time must be satisfied. note 2: ups051 vertical back porch time (t vbp ) is adjustable by setting register hdl; requirement of minimum back porch time and minimum front porch time must be satisfied. note 3: both interlace and non-interlace mode can be accepted. note 4: auo suggests frame rate at least 50 hz to ge t the better display quality. auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 11/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without p ermission from au optronics corp. 11 hsync r g b r g b r g b r g g b r g b r g b r g b r b line 2,4,6 240 line 1,3,5 239 fig.2 ups051 input horizontal data sequence fig.1 ups051 input horizontal timing chat auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 12/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without p ermission from au optronics corp. 12 fig.3 ups051 input vertical timing chat auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 13/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without p ermission from au optronics corp. 13 c. ups052 timing conditions c - 1. ups052 (320 mode 24.55mhz) timing specificatio ns parameter symbol min. typ. max. unit. remark dclk frequency 1/t dclk 21.07 24.55 28.06 mhz period t h 1524 1560 1644 t dclk display period t hd 1280 t dclk back porch t hbp 236 252 267 t dclk front porch t hfp t h - t hd - t hbp t dclk hsync pulse width t hsw 1 1 96 t dclk odd period even t v 247.5 262.5 277.5 t h odd display period even t vd 240 t h odd 6 13 21 back porch even t vbp 6.5 13.5 21.5 t h odd front porch even t vfp t v C t vd C t vbp t h odd vsync pulse width even t vsw 1 t dclk 1t h 6t h note 1, 2 note 1: auo suggests frame rate at least 50 hz to ge t the better display quality. note 2: both interlace and non-interlace mode can be accepted. c - 2. ups052 (360 mode 27mhz) timing specifications parameter symbol min. typ. max. unit. remark dclk frequency 1/t dclk 23.1 27 30.9 mhz period t h 1684 1716 1807 t dclk display period t hd 1440 t dclk back porch t hbp 236 252 267 t dclk front porch t hfp t h - t hd - t hbp t dclk hsync pulse width t hsw 1 1 96 t dclk odd period even t v 247 262 277 t h odd display period even t vd 240 t h odd 6 13 21 back porch even t vbp 6.5 13.5 21.5 t h odd front porch even t vfp t v C t vd C t vbp t h odd vsync pulse width even t vsw 1 t dclk 1t h 6t h note 1, 2 note 1: auo suggests frame rate at least 50 hz to ge t the better display quality. note 2: both interlace and non-interlace mode can be accepted. auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 14/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without p ermission from au optronics corp. 14 fig.4 ups052 input horizontal timing chart auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 15/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without p ermission from au optronics corp. 15 fig.5 ups052 input vertical timing chart auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 16/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without p ermission from au optronics corp. 16 d. ccir656 timing conditions d - 1. ccir656 timing specifications ccir656 data input format d- 2. ccir656 decoding ff 00 00 xy signals are involved with hsync,vsync a nd field xy encode following bits: f=field select v=indicate vertical blanking h=1 if eav else 0 for sav p3-p0=protection bits p 3 = v h p 2 = f h p 1 = f v p 0 = f v h r e p r e s e n t s t h e e x c l u s i v e -or function. control is provided through end of video (eav) an d start of video (sav) timing references. horizontal blanking section consists of repeating pat tern 80 10 80 10 xy d7(msb) d6 d5 d4 d3 d2 d1 d0(lsb) 1 f v h p3 p2 p1 p0 d[7..0] dclk (27mhz) ffh 00h 00h xy (sav) cb1 y1 cr1 y2 cb 360 y719 cr 360 y720 ffh 00h 00h invalid data invalid data xy (eav) 720 ccir valid data ff 00 00 xy 80 10 80 10 // // 80 10 ff 00 00 xy cb 1 y1 cr 1 y2 cb 2 y3 cr 2 y4 // // ff cr 360 y 720 next line digital video stream 1716 1440 4 268 4 eva code blanking sav code valid data h control signal example: h control signal =1 at eav; h control signal =0 at sav; auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 17/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without p ermission from au optronics corp. 17 d- 3. ccir656 to rgb conversion r=1.164 (y-16) +1.596(cr-128) g=1.164 (y-16) -0.813(cr-128)-0.392(cb-128) b=1.164 (y-16) +2.017(cb-128) where y: 0~255 cr: 0~255 cb: 0~255 d- 4. ccir656 vertical timing format (ntsc) line number f v h (eav) h (sav) 1-3 1 1 1 0 4-22 0 1 1 0 23-262 0 0 1 0 263-265 0 1 1 0 266-285 1 1 1 0 286-525 1 0 1 0 f h v 1 even field eav blanking 0 odd field sav active video note: after setting ccir656 vertical timing value, the fra me might be shift. auo suggests to set the register r5 = 04h, then the frame should be ful led. blanking field 1 active video blanking field 2 active video line 1(v=1) line 23(v=0) line 263(v=1) line 286(v=0) line 525(v=0) line 3 line 266 line 4 filed 1 (f=0) odd filed 2 (f=1) even h = 1 eav h = 0 sav auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 18/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without p ermission from au optronics corp. 18 e. yuv timing e - 1. yuv 640 timing specifications parameter symbol min. typ. max. unit. remark dclk frequency 1/t dclk 21.07 24.55 28.06 mhz period t h 1524 1560 1644 t dclk display period t hd 1280 t dclk back porch t hbp 236 252 267 t dclk front porch t hfp t h - t hd - t hbp t dclk hsync pulse width t hsw 1 1 96 t dclk odd period even t v 247.5 262.5 277.5 t h odd display period even t vd 240 t h odd 6 13 21 back porch even t vbp 6.5 13.5 21.5 t h odd front porch even t vfp t v C t vd C t vbp t h odd vsync pulse width even t vsw 1 t dclk 1t h 6t h note 1, 2 note 1: auo suggests frame rate at least 50 hz to ge t the better display quality. note 2: both interlace and non-interlace mode can be accepted. e - 2. yuv 720 timing specifications parameter symbol min. typ. max. unit. remark dclk frequency 1/t dclk 23.1 27 30.9 mhz period t h 1684 1716 1807 t dclk display period t hd 1440 t dclk back porch t hbp 236 252 267 t dclk front porch t hfp t h - t hd - t hbp t dclk hsync pulse width t hsw 1 1 96 t dclk odd period even t v 247.5 262.5 277.5 t h odd display period even t vd 240 t h odd 6 13 21 back porch even t vbp 6.5 13.5 21.5 t h odd front porch even t vfp t v C t vd C t vbp t h odd vsync pulse width even t vsw 1 t dclk 1t h 6t h note 1, 2 note 1: auo suggests frame rate at least 50 hz to ge t the better display quality. note 2: both interlace and non-interlace mode can be accepted. auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 19/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without p ermission from au optronics corp. 19 fig.7 yuv720 input horizontal timing chart fig.8 yuv640 input horizontal timing chart auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 20/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without p ermission from au optronics corp. 20 fig.5 yuv input vertical timing chart auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 21/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without p ermission from au optronics corp. 21 5. charge pump structure pvdd nt39010 power supply application notes c1p c1m cp1 power setting power setting charge pump c2p c2m cp2 power setting power setting vgh c4 internal avdd adjustable and regulator avdd c7 power generator for vgh c3 c3p c3m c6 cp3 power setting power setting power setting vgl charge pump (vghx-1) vcac c5 vcac voltage select c4p c4m cp4 power setting power setting vint3 vint1 c2 vint2 c1 vcomdc vcomdc c8 frp frp power setting iled= 20 ma drv vcc vled ( 5.5~10v ) fb (default= 0.6 v) pwm driving output pwm power input l c rfb fb_p normally open fb_n i led = 25ma vcc switch 3.8 ~ 4.4v auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 22/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. 6. reference circuit external led driver + internal vcomdc application circuit c1 4.7uf/10v frp vcom vcc cs l2 120ohm +3.3v c4 1uf /6.3v c5 1uf /6.3v bead c15 1uf /16v c10 1uf /10v c14 1uf /10v c8 1uf /10v c16 1uf /16v c9 1uf /10v c11 1uf /16v c13 1uf /6.3v c12 1uf /16v vsy nc d3 pgnd d5 d6 led+ frp c2p dclk d1 d2 d4 d7 fb c3p c1p c4p gnd vcom sda vgh scl hsy nc vcac vint2 vint1 c4m c2m vint3 c1m c3m c17 1uf /16v vgl vcom 1 dummy 2 vgl 3 c4p 4 c4m 5 vgh 6 frp 7 vcac 8 vint3 9 c3p 10 c3m 11 vint2 12 c2p 13 c2m 14 vint1 15 c1p 16 c1m 17 pgnd 18 pvdd 19 drv 20 led+ 21 dummy 22 fb 23 dummy 24 gnd 25 vcc 26 cs 27 sda 28 scl 29 hsy nc 30 vsy nc 31 dclk 32 d7 33 d6 34 d5 35 d4 36 d3 37 d2 38 d1 39 d0 40 con1 pvdd vcc d0 l3 120ohm +3.3v c6 1uf /6.3v c7 1uf /6.3v bead pvdd external led driver block fb led+ l4 120ohm bead note: +3.3v is provided from system. auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 23/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. external led driver + external vcomdc application circuit c1 4.7uf/10v frp vcom vcdc vcc cs l2 120ohm +3.3v c4 1uf /6.3v c5 1uf /6.3v bead c15 1uf /16v c10 1uf /10v c14 1uf /10v c8 1uf /10v c16 1uf /16v c9 1uf /10v c11 1uf /16v c13 1uf /6.3v c12 1uf /16v vsy nc d3 pgnd d5 d6 led+ frp c2p dclk d1 d2 d4 d7 fb c3p c1p c4p gnd vcom sda vgh scl hsy nc vcac vint2 vint1 c4m c2m vint3 c1m c3m c17 1uf /16v vgl vcom 1 dummy 2 vgl 3 c4p 4 c4m 5 vgh 6 frp 7 vcac 8 vint3 9 c3p 10 c3m 11 vint2 12 c2p 13 c2m 14 vint1 15 c1p 16 c1m 17 pgnd 18 pvdd 19 drv 20 led+ 21 dummy 22 fb 23 dummy 24 gnd 25 vcc 26 cs 27 sda 28 scl 29 hsy nc 30 vsy nc 31 dclk 32 d7 33 d6 34 d5 35 d4 36 d3 37 d2 38 d1 39 d0 40 con1 pvdd r2 1k ohm 1 3 2 vr1 10k ohm vcc r1 22k ohm d0 vcc led+ fb l3 120ohm +3.3v c6 1uf /6.3v c7 1uf /6.3v bead pvdd external led driver block l4 120ohm bead note: +3.3v is provided from system. auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 24/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. internal led driver + internal vcomdc application circuit c1 4.7uf/10v frp vcom vcc r3 5.1k ohm cs l2 120ohm +3.3v drv c4 1uf /6.3v c5 1uf /6.3v bead c15 1uf /16v c10 1uf /10v c14 1uf /10v c8 1uf /10v c16 1uf /16v c9 1uf /10v c11 1uf /16v c13 1uf /6.3v c12 1uf /16v r4 25 ohm vsy nc d3 pgnd d5 d6 led+ frp c2p dclk drv d1 d2 d4 d7 fb c3p c1p c4p gnd vcom sda vgh scl hsy nc vcac vint2 vint1 c4m c2m vint3 c1m c3m c17 1uf /16v vgl vcom 1 dummy 2 vgl 3 c4p 4 c4m 5 vgh 6 frp 7 vcac 8 vint3 9 c3p 10 c3m 11 vint2 12 c2p 13 c2m 14 vint1 15 c1p 16 c1m 17 pgnd 18 pvdd 19 drv 20 led+ 21 dummy 22 fb 23 dummy 24 gnd 25 vcc 26 cs 27 sda 28 scl 29 hsy nc 30 vsy nc 31 dclk 32 d7 33 d6 34 d5 35 d4 36 d3 37 d2 38 d1 39 d0 40 con1 pvdd led+ vcc 2 3 1 q1 fmmt618 l1 47uh sw d0 l3 120ohm +3.3v c6 1uf /6.3v c7 1uf /6.3v bead pvdd d101 fs1j3 l4 120ohm bead +3.3v led-switch q1 5hnd1ss c2 0.01uf /6.3v c3 1uf /6.3v note: pwm r/c/l (r3/c2/l1) parameters and component charact eristics will effects efficiency and wave like noise. the application circuit is for reference only. if efficiency is not god or wave like noise is seriou s, please adjust rcl parameters to get best efficiency and display quality. note: +3.3v is provided from system. note: q1 is control backlight turn on/off function. * led-switch is h backlight turn on. * led-switch is l backlight turn off. please refer to suggestion standby and power on/off sequence. auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 25/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. internal led driver + external vcomdc application circuit c1 4.7uf/10v frp vcom vcdc +3.3v led-swi tch q1 5hnd1ss vcc r3 5.1k ohm cs l2 120ohm +3.3v drv c4 1uf /6.3v c5 1uf /6.3v bead c15 1uf /16v c10 1uf /10v c14 1uf /10v c8 1uf /10v c16 1uf /16v c9 1uf /10v c11 1uf /16v c13 1uf /6.3v c12 1uf /16v r4 25 ohm vsy nc d3 pgnd d5 d6 led+ frp c2p dclk drv d1 d2 d4 d7 fb c3p c1p c4p gnd vcom sda vgh scl hsy nc vcac vint2 vint1 c4m c2m vint3 c1m c3m c17 1uf /16v vgl vcom 1 dummy 2 vgl 3 c4p 4 c4m 5 vgh 6 frp 7 vcac 8 vint3 9 c3p 10 c3m 11 vint2 12 c2p 13 c2m 14 vint1 15 c1p 16 c1m 17 pgnd 18 pvdd 19 drv 20 led+ 21 dummy 22 fb 23 dummy 24 gnd 25 vcc 26 cs 27 sda 28 scl 29 hsy nc 30 vsy nc 31 dclk 32 d7 33 d6 34 d5 35 d4 36 d3 37 d2 38 d1 39 d0 40 con1 pvdd r2 1k ohm led+ 1 3 2 vr1 10k ohm vcc 2 3 1 q1 fmmt618 r1 22k ohm l1 47uh sw d0 vcc l3 120ohm +3.3v c6 1uf /6.3v c7 1uf /6.3v bead pvdd d101 fs1j3 l4 120ohm bead c2 0.01uf /6.3v c3 1uf /6.3v note: pwm r/c/l (r3/c2/l1) parameters and component charact eristics will effects efficiency and wave like noise. the application circuit is for reference only. if efficiency is not god or wave like noise is seriou s, please adjust rcl parameters to get best efficiency and display quality. note: +3.3v is provided from system. note: q1 is control backlight turn on/off function. * led-switch is h backlight turn on. * led-switch is l backlight turn off. please refer to suggestion standby and power on/off sequence. auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 26/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. 7. serial interface & register table a. serial interface format item symbol conditions min typical max unit t s0 scl to cs 120 ns data setup time t s1 scl to sda 120 ns t h0 scl to cs 120 ns data hold time t h1 scl to sda 120 ns t w1l scl pulse width 120 ns t w1h scl pulse width 120 ns pulse width t w2 cs pulse width 1000 ns b. the configuration of serial data at sda terminal is at below msb lsb d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 register address r/w data note: r/w = 0 write mode r/w = 1 read mode b1 C write mode waveform b2 C read mode waveform scl cs t h1 t s0 50% t w1l t h1h sda t s1 t h0 t w1l t w1h t w2 d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d4 d3 d2 d1 d0 d15 d13 d14 d12 d10 0 d9 d7 d8 d6 d4 d5 d3 d2 d0 d1 d15 d13 d14 d12 d10 1 d9 d7 d8 d6 d4 d5 d3 d2 d0 d1 write mode read mode auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 27/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. c. register parameters address r/w content no d15 d14 d13 d12 d11 d[10 : 8] d7 d6 d5 d4 d3 d2 d1 d0 r0 0 0 0 0 w x x x x x grb stb shdb shcb r1 0 0 1 0 w x x x reserved reserved pfon reserved r2 0 1 0 0 w x x x x x fpol x u/d shl r3 0 1 1 0 w x x x x palm pal sel r4 1 0 0 0 w x x x x ddl r5 1 0 1 0 w x x x oea hdl r6 1 1 0 0 w x x x x x x vcsl r7 1 1 1 0 w x x x x gamsel x vlnc avgy reserved t0 0 0 0 1 w x avddadj pdty fbv2 fbv1 fbv0 t1 0 0 1 1 w x x avg x t352 const t2 0 1 0 1 w x x vdcen vcomdc t3 0 1 1 1 w x x bradj t4 1 0 0 1 w x x x x x x x vnsel t5 1 0 1 1 w x sat hue t6 1 1 0 1 r x reserved note 1: please keep all the reserved register at default value to avoid abnormal display. note 2: register t6 is read only. c1 - default register settings no d15 d14 d13 d12 d11 d[10 : 8] d7 d6 d5 d4 d3 d2 d1 d0 r0 0 0 0 0 r/w x x x x x 1 1 0 1 r1 0 0 1 0 r/w x x x 0 0 0 0 0 1 r2 0 1 0 0 r/w x x x x x 0 x 1 1 r3 0 1 1 0 r/w x x x x 0 0 0 0 1 r4 1 0 0 0 r/w x x x x 0 0 0 0 0 r5 1 0 1 0 r/w x x x 0 0 0 0 0 0 r6 1 1 0 0 r/w x x x x x x 1 1 0 r7 1 1 1 0 r/w x x x x 0 x 0 1 1 t0 0 0 0 1 r/w x 0 0 0 0 0 1 0 0 t1 0 0 1 1 r/w x x 0 x 0 1 0 0 0 t2 0 1 0 1 r/w x x 0 1 0 0 0 0 0 t3 0 1 1 1 r/w x x 1 0 0 0 0 0 0 t4 1 0 0 1 r/w x x x x x x x 0 0 t5 1 0 1 1 r/w x 1 0 0 0 1 0 0 0 t6 1 1 0 1 r x reserved x => dont care. auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 28/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. d. detail register description d1. register r0 address bit description default bit3 (grb) global reset. bit2 (stb) standby mode setting. bit1 (shdb) dc-dc converter shutdown setting. 0000 [3..0] bit0 (shcb) charge pump shutdown setting. 1101b bit3 grb function 0 the controller is resets, dcdc is off. reset all register to default value. 1 normal operation. (default) note: when setting grb=0, charge pump is still on, because of default value. bit2 stb function 0 t-con, source driver and dc-dc converter are off. al l outputs are high-z. 1 normal operation. (default) note: grb have higher priority than stb. therefore, two mode is set in the same time, stb isn't execut ed. bit1 shdb function 0 dc-dc converter is off. (default) 1 dc-dc converter is on. dc-dc controls by stb and power on/off sequence. bit0 shcb function 0 charge pump converter is off. 1 charge pump converter is on. (default) charge pump controls by stb and power on/off sequenc e. d2. register r1: address bit description default reserved reserved reserved reserved bit1 (pfon) pre-filter setting. 0010 [5..0] bit0 (d/s) select delta or stripe mode for data arrangement. 00_0001b bit1 pre-filter setting. 0 pre-filter off (default) 1 pre-filter on note:disable this function in ups051mode. bit0 d/s function 0 stripe mode. q1h always stays high. data alignment always odd line. 1 delta mode q1h toggles each line. data alignment sw itches between odd/even lines. (default) note:disable this function in ups051mode. auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 29/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. d3. register r2: address bit description default bit3 (fpol) frp source driver polarity inversion polarity inversion selection. bit1 (u/d) vertical shift direction selection. 0100 [3..0] bit0 (shl) horizontal shift direction selection. 0011b bit3 fpol function 0 frp=0 when positive polarity frp=1 when negative polarity (default) 1 frp=1 when positive polarity frp=0 when negative polarity bit1 ud function 0 scan down: first line=g241 g239 g2 last line=g0. 1 scan up: first line=g0 g2 g239 last line=g241. (default) bit0 shl function 0 shift left; first data=s640 s639 s2 last data=s1. 1 shift right: first data=s1 s2 s639 last data=s640. (default) d4. register r3: address bit description default bit4 (palm) pal 1/6, pal1/6,8 selection. bit3 (pal) pal/ntsc selection. 0110 [4..0] bit2-0 (sel) input data format selection. 0_0001b bit4 palm function 0 pal 1/6,8 input format. (280 active line). (defaul t) 1 pal1/6 input format. (288 active line). note:disable this function in ups051mode. bit3 pal function 0 ntsc input format (240 active line). (default) 1 pal input format. note:disable this function in ups051mode. bit2-0 sel function 000 ups051 path, special data format: ddx. 001 ups052 320rgb 24.54mhz data format. (default) 010 ups052 360rgb 27mhz data format. 011 yuv mode a 640y 320crcb 24.54mhz data format. 100 yuv mode a 720y 360crcb 27mhz data format. 101 yuv mode b 640y 320crcb 24.54mhz data format. 110 yuv mode b 720y 360crcb 27mhz data format. 111 ccir 656 720y 360crcb 27mhz data format. auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 30/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. d5. register r4: address bit description default 1000 [4..0] bit4-0 (ddl) horizontal data start delay selection. 0_0000b d4 d3 d2 d1 d0 value unit 0 0 0 0 0 +0 0 0 0 0 1 +1 0 0 0 1 0 +2 0 0 0 1 1 +3 0 0 1 0 0 +4 0 0 1 0 1 +5 0 0 1 1 0 +6 0 0 1 1 1 +7 0 1 0 0 0 +8 0 1 0 0 1 +9 0 1 0 1 0 +10 0 1 0 1 1 +11 0 1 1 0 0 +12 0 1 1 0 1 +13 0 1 1 1 0 +14 0 1 1 1 1 +15 1 0 0 0 0 -1 1 0 0 0 1 -2 1 0 0 1 0 -3 1 0 0 1 1 -4 1 0 1 0 0 -5 1 0 1 0 1 -6 1 0 1 1 0 -7 1 0 1 1 1 -8 1 1 0 0 0 -9 1 1 0 0 1 -10 1 1 0 1 0 -11 1 1 0 1 1 -12 1 1 1 0 0 -13 1 1 1 0 1 -14 1 1 1 1 0 -15 1 1 1 1 1 -16 dclk d6. register r5: address bit description default bit5-4 (oea) odd even advance selection. 1010 [5..0] bit3-0 (hdl) vertical delay selection. 00_0000b bit5-4 oea function 00 display start @hdl delay for odd and even field (default) 01 display start @hdl delay for odd field and @hdl+ 1 for even field 1x display start @hdl+1 delay for odd field and @hd l for even field auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 31/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. bit3-0 hdl function hdl3 hdl2 hdl1 hdl0 value unit 0 0 0 0 +0 0 0 0 1 +1 0 0 1 0 +2 0 0 1 1 +3 0 1 0 0 +4 0 1 0 1 +5 0 1 1 0 +6 0 1 1 1 +7 1 0 0 0 +8 1 0 0 1 -1 1 0 1 0 -2 1 0 1 1 -3 1 1 0 0 -4 1 1 0 1 -5 1 1 1 0 -6 1 1 1 1 -7 h d7. register r6: address bit description default 1100 [3..0] bit2-0 (vcom_ac) vcac level adjustment. step 0.1v/lsb. 110b vcsl2 vcsl1 vcsl0 vcac level unit 0 0 0 4.4 0 0 1 4.5 0 1 0 4.6 0 1 1 4.7 1 0 0 4.8 1 0 1 4.9 1 1 0 5 (default) 1 1 1 5.1 v d8. register r7: address bit description default bit4 (gamsel) gamma select function bit2 (vlnc) yuv vertical line function bit1 (avgy) average yuv interface luminance y settin g 1110 [4..0] bit0 (dmda) delta data alignment 0_0011 bit4 gamma select function 0 non- linear gamma (default) 1 gamma 2.2 auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 32/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. bit2 yuv vertical line function 0 vertical line are 240 (default) 1 vertical line are 234 ntsc: 240 lines scaling to 234-skip 6 lines. (1/40) pal: 288 lines scaling to 234-skip 54 lines ( 3/16) @ palm = h 280 lines scaling to 234-skip 46 lines ( 1/6) @ palm = l note:use ups051 mode , this bit must set 0. bit1 average yuv interface luminance y setting 0 only used odd y sample for yuv conversion 1 used odd and even y sample for yuv conversion (def ault) bit0 delta data alignment 0 data alignment by default setting 1 data alignment please reference ups052 timing graph ii. (default) (this function disable in ups051 mode.) d9. register t0: address bit description default bit5-7 (avddadj) select internal avdd voltage bit3-4 (pdty) pwm duty control for dc to dc converter 0001 [7..0] bit2-0 (fbv) fb voltage adjust 0000_0100b bit 5- 7 select internal avdd voltage 000 4.3v(default) 001 4.4v 010 4.5v 011 4.6v 100 4.7v 101 4.8v 110 4.9v 111 5.0v bit3-4 pwm duty control for dc to dc converter 00 75 %(default) 01 55 % 10 60 % 11 65 % bit2-0 fb voltage adjust 000 0.4v 001 0.45v 010 0.5v 011 0.55v 100 0.6v (default) 101 0.65v 110 0.7v 111 0.75v auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 33/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. d10. register t1: address bit description default bit6 (avg) data alignment to scaling down function se lect bit4 (t352) select ups052 path and input data format for 352 rgb 0011 [6..0] bit3-0 (const) rgb contrast level adjustment 000_1000b bit6 data alignment to scaling down function select 0 data alignment by dmda settling (default) 1 data alignment with averaged and input data.(r1, (g1+3g2)/4, (3b2+b3)/4.) bit4 select ups052 path and input data format for 352 rg b 0 sel setting timing (default) 1 sel setting dont care, input data for 352 rgb(27m hz) bit3-0 rgb contrast level adjustment 0x0 0 0x8 1.00 (default) 0xf 1.875 d11. register t2: address bit description default bit6 (vdcen) setting frp output to add dc level 0101 [6..0] bit5-0 (vcom dc) vcom dc level adjustment (16mv/bit) 010_0000b bit6 setting frp output to add dc level 0 external vcom dc 1 internal vcom dc bit5-0 vcom dc level adjustment 0x00 0.688v 0x20 1.2v (default) 0x3f 1.696v d12. register t3: address bit description default 0111 [6..0] bit6-0 (bradj) brightness level adjustment (4/bit) 100_0000b bit6 brightness level adjustment 0x00 -256 0x40 0 (default) 0x7f +256 auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 34/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. d13. register t4: address bit description default 1001 [2..0] bit1-0 (wnsel) wide and narrow display select 000b bit1-0 wide and narrow display select 00 normal display (default) 01 narrow display 10 wide display 11 normal display d14. register t5: address bit description default bit7-4 (sat) yuv saturation constant adjustment (0.12 5/bit) 1011 [7..0] bit3-0 (hue) yuv hue adjustment (5deg/bit) 1000_1000b bit7-4 yuv saturation constant adjustment 0x0 0 0x8 1.00 0xf 1.875 bit3-0 yuv hue adjustment (5deg/bit) 0x0 -40? 0x8 0? 0xf 35 ? note: register t5 is for yuv only. auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 35/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. c. optical specification (note 1,note 2, note 3 ) item symbol condition min. typ. max. unit remark rise tr - 20 30 ms response time fall tf =0 - 30 40 ms note 4, 6 contrast ratio cr at optimized viewing angle 150 250 - note 5, 6 top 10 20 - bottom 30 40 - left 40 45 - viewing angle right c r 1 0 40 45 - deg. note 6, 7 brightness =0 200 250 - nits note 8 x 0.28 0.33 0.38 white chromaticity shift y =0 0.30 0.35 0.40 uniformity y l % 70 75 -- % note 10 n o t e 1 . a m b i e n t t e m p e r a t u r e = 2 5 . note 2. to be measured in the dark room. note 3.to be measured on the center area of panel wi th a field angle of 1by topcon luminance meter bm-7 , after 10 minutes operation under 25 ma. note 4. definition of response time: the output signals of photo detector are measured wh en the input signals are changed from black to white(falling time) and from white to black( rising time), respectively. the response time is defined as the time interval b etween the 10% and 90% of amplitudes. refer to figure as below. note 5. definition of contrast ratio: contrast ratio is calculated with the following form ula. photo detector output when lcd is at white state photo detector output when lcd is at black state s i g n a l ( r e l a t i v e v a l u e ) "black" tr tf "white" "white" 0% 10% 90% 100% contrast ratio (cr) = auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 36/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. note 6. white vi=v i5 +1.5v black vi=v i50 2.0v means that the analog input signal swings in ph ase with com signal. + means that the analog input signal swings out of phase with com signal. v i50 : the analog input voltage when transmission is 50% the 100% transmission is defined as the transmissio n of lcd panel when all the input terminals of module are electrically opened. note 7. definition of viewing angle: refer to figure as below. x' y x y' x' y x y' x' y x y' note 8. measured at the center area of the panel in gray level 255 auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 37/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. note 9 cf arrangement note 10. luminance uniformity of these 9 points is d efined as below: 9) - (1 points 9 in luminance maximum 9) - (1 points 9 in luminance minimum uniformity = r g b r g b d r g b r g b d d d d d d d d d d d d d d d d d d d d line1 line2 dummy line dummy line s1 line234 s2 s3 s4 s5 s6 s480 s479 s478 s476 d g d r g b r g b d r g b r g b r g b r d b d g line233 r g b r g r g b r g b r g r b d d d d d d b b d r d d d auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 38/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. d. reliability test items: no. test items conditions remark 1 high temperature storage ta= 70 240hrs 2 low temperature storage ta= -25 240hrs 3 high temperature operation ta= 60 240hrs 4 low temperature operation ta= 0 240hrs 5 high temperature and high humidity ta= 60 . 90% rh 240hrs operation 6 heat shock - 2 5 ~ 8 0 / 5 0 c y c l e 2 h r s / c y c l e non-operation 7 electrostatic discharge air mode:+/- 8kv contact mode: +-4kv base on auos s tandard testing method 8 vibration (with carton) random vibration: 0.015g 2 /hz from 5~200hz C 6db/octave from 200~500hz iec 68-34 9 drop (with carton) height: 60cm 1 corner, 3 edges, 6 surfaces note: ta: ambient temperature. note 2. esd testing flow as the below note 3. esd testing method. 1. a m b i e n t : 2 4 ~ 2 6 , 5 6 ~ 6 5 % r h 2. instruments:noisekeness-2000, 3. operation system: ct30aa-a and adapter a024cn 02 vxt0 4. test mode: operating mode, test pattern: colorbar +8gray scale 5. test method: a. contact discharge: max20kv, 150pf(330?) 1sec, 5 po ints, 10 times/point b. air discharge: max 20kv, 150pf(330?) 1sec, 5 poin ts, 10 times/point lcd power on, functional electrostatic discharge functional check & judge the check auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 39/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. 6. test point: display area bezel auo 1 2 3 4 5 7. the metal casing is connected to ground (0v) at fo ur corners. 8. all register commands are repeating transfer. auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 40/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. e. packing form auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 41/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. f. outline dimension to avoid applying pressure or stress on the product s. these will cause visual defects or luminance non-uniformity on the lighting area. the protection film in the back side of lcm should be tear off before assembly. fig. 1 outline dimension of tft-lcd module auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 42/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. g. application notes 1. stand-by timing fig. 1 stand-by timing diagram note 1:during no dclk, hsync and vsync can be stoppe d. but in all other cases hsync and vsync must be active. note 2: external signal: dclk, vsync, din (d0 ~ d7), stb (by register) internal signal: dc/dc enable s1 ~ s480 (sour ce driver output signal), frp enable g1 ~ g240 (gate driver output signal) and charge pu mp enable. dc/dc enable / l ed switch stb no dclk 1 2 3 4 5 6 dclk vsync valid data dont care dont care valid data din normal output normal output normal output s1~s480 g1~g240 charge pump enable frp enable 7 normal output 00h 3fh 1 2 3 4 5 6 7 8 9 1 11 00h auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 43/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. 2. power on sequence note 1: external signal: v cc, pv dd, dclk, vsync, din (d0 ~ d7), stb (by register) internal signal: dc/dc enable s1 ~ s480 (sour ce driver output signal), frp enable, g1 ~ g240 (gate driver output signal) and charge pu mp enable. v cc pv dd dont care valid data normal output 1 2 3 4 5 6 7 8 9 10 11 00h vsync charge pump enable normal display frp enable din dc/dc enable /led switch source output gate output stb max: 16 ms dclk auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 44/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. 3. power off sequence note 1: external signal: v cc, pv dd, dclk, vsync, din (d0 ~ d7), stb (by register) internal signal: dc/dc enable s1 ~ s480 (sour ce driver output signal), frp enable, g1 ~ g240 (gate driver output signal) and charge pu mp enable. v cc pv dd stb dc/dc enable / l ed switch dclk vsync valid data dont care din normal output s1~s480 g1~g240 charge pump enable frp enable 1 2 3 4 5 6 7 normal output 00h 3fh 8 auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 45/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. 4. recommended power on/off serial command settings 4.1. recommend ups051 (9.7 mhz) power on/off setting global reset global reset initial global reset recovery set standby power on power off 1 vsync input register r0 dclk / hsync / vsync 7 vsync dclk / hsync / vsync vcc/pv dd min: 16 ms max: 20 msec signal input register 0 d h r0 data input normal operation don t care 0bh vcc/pv dd don t care normal operation data input 11 vsync r0 05h r0 other registers setting set to ups051 mode turn on dcdc 00h r3 0fh r0 xxh rx or tx 0dh auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 46/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. 4.2. recommend ups052 320rgb mode (24.54 mhz) power on/off setting global reset global reset initial global reset recovery set standby power on power off 1 vsync input register r0 dclk / hsync / vsync 7 vsync dclk / hsync / vsync vcc/pv dd min: 16 ms max: 20 msec signal input register 0dh r0 data input normal operation don t care 0bh vcc/pv dd don t care normal operation data input 11 vsync r0 05h r0 other registers setting set to ups052 320 mode turn on dcdc 01h r3 0fh r0 xxh rx or tx 0dh auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 47/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. 4.3. recommend ups052 360rgb mode (27mhz) power on/off setting global reset global reset initial global reset recovery set standby power on power off 1 vsync input register r0 dclk / hsync / vsync 7 vsync dclk / hsync / vsync vcc/pv dd min: 16 ms max: 20 msec signal input register 0dh r0 data input normal operation don t care 0bh vcc/pv dd don t care normal operation data input 11 vsync r0 05h r0 other registers setting set to ups052 360 mode turn on dcdc 02h r3 0fh r0 xxh rx or tx 0dh auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 48/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. 4.4. recommend yuv mode a 640y 320crcb (24.54 mhz) power on/off setting global reset global reset initial global reset recovery set standby power on power off 1 vsync input register r0 dclk / hsync / vsync 7 vsync dclk / hsync / vsync vcc/pv dd min: 16 ms max: 20 msec signal input register 0dh r0 data input normal operation don t care 0bh vcc/pv dd don t c are normal operation data input 11 vsync r0 05h r0 other registers setting set to yuv 640 modea turn on dcdc 03h r3 0fh r0 xxh rx or tx 0dh auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 49/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. 4.5. recommend yuv mode a 720y 360crcb (27 mhz) power on/off setting global reset global reset initial global reset recovery set standby power on power off 1 vsync input register r0 dclk / hsync / vsync 7 vsync dclk / hsync / vsync vcc/pv dd min: 16 ms max: 20 msec signal input register 0dh r0 data input normal operation don t care 0bh vcc/pv dd don t care normal operation data input 11 vsync r0 05h r0 other registers setting set to yuv 720 modea turn on dcdc 04h r3 0fh r0 xxh rx or tx 0dh auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 50/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. 4.6. recommend yuv mode b 640y 320crcb (24.54 mhz) power on/off settin g global reset global reset initial global reset recovery set standby power on power off 1 vsync input register r0 dclk / hsync / vsync 7 vsync dclk / hsync / vsync vcc/pv dd min: 16 ms max: 20 msec signal input register 0dh r0 data input normal operation don t care 0bh vcc/pv dd don t care normal operation data input 11 vsync r0 05h r0 other registers setting set to yuv 640 modeb turn on dcdc 05h r3 0fh r0 xxh rx or tx 0dh auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 51/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. 4.7. recommend yuv mode b 720y 320crcb (27 mhz) power on/off setting global reset global reset initial global reset recovery set standby power on power off 1 vsync input register r0 dclk / hsync / vsync 7 vsync dclk / hsync / vsync vcc/pv dd min: 16 ms max: 20 msec signal input register 0dh r0 data input normal operation don t care 0bh vcc/pv dd don t care normal operation data input 11 vsync r0 05h r0 other registers setting set to yuv 720 modeb turn on dcdc 06h r3 0fh r0 xxh rx or tx 0dh auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/
version : 0.3 page : 52/ 52 all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission from au optronics corp. 4.8. recommend ccir656 mode (27 mhz) power on/off setting vcc/pv dd global reset global reset initial global reset recovery set standby power on power off 1 vsync input register r0 dclk / hsync / vsync 7 vsync dclk / hsync / vsync vcc/pv dd min: 16 ms max: 20 msec signal input register 0dh r0 data input normal operation don t care 0bh vcc/pv dd don t care normal operation data input 11 vsync r0 05h r0 other registers setting set to ccir656 mode turn on dcdc 07h r3 0fh r0 xxh rx or tx 0dh auo confidential for sas internal use only / 2009/12/28 www.datasheet.co.kr datasheet pdf - http://www..net/

▲Up To Search▲

Price & Availability of A024CN03V2

	To Download A024CN03V2 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .