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dual 0. 2 75% comparators and reference with programmable hysteresis data sheet adcmp341 / adcmp343 rev. a document feedback information furnished by anal og devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change wi thout notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9 106, u.s.a. tel: 781.329.4700 ? 2007 C 2013 analog devices, inc. all rights reserved. technical support ww w.analog.com features 400 mv 0.275 % threshold user programmable hysteresis via resistor string supply range: 1.7 v to 5.5 v low q uiescent c urrent: 6.5 a t yp ical input r ange i ncludes g round low i nput b ias c urrent: 5 na m ax imum open - drain outputs supports w ired - and c onnections input p olarities: adcmp341 noninverting adcmp343 inverting small sot - 23 p ackage applications portable applications li - ion m onitoring handheld i nstruments led / r elay d riving optoisolator d riving control s ystems general description the adcmp341/ adcmp343 consist of two low power, high accuracy comparators with a 400 mv reference in an 8 - lead sot - 23 package. operating within a supply range of 1.7 v to 5.5 v, the devices only draw 6.5 a ( typical ) , making them ideal for low voltage system monitoring and portable applications. hysteresis is determined using three resistors in a string configura - tion with the upper and lower tap points connected to the ina_u and ina_l pins of each comparator , respectively. the state of the outputs of the c omparators selects which pin is internally connected to the comparator s input . therefore, a change of state in the comparator s output result s in one of the inputs being switched in to the comparator and the other being switched out. this provide s the user with a ful ly flexible and accurate method of setting the hysteresis. o ne input of each comparator is internally connected to the reference. the other input is available externally, via an internal mux, through pins ina_u or ina_l . the state of the output determine s which of these pins is connected at any one time. the comparator outputs are open - drain with the output stage sinking capability guaranteed greater than 5 ma ove r temperature. the adcmp341 has noninverting inputs and the adcmp343 ha s inverting inputs. th e devices are suitable for portable, commercial, industrial , and automotive applications . functional block dia gram s +ina_u +inb_u outa mux mux outb v dd gnd 400mv adcmp341 +ina_l +inb_l vinb vina r1 r2 r3 06500-001 figure 1 . adcmp341 ?ina_u ?inb_u outa mux mux outb v dd gnd 400mv adcmp343 ?ina_l ?inb_l vinb vina 06500-002 r1 r2 r3 figure 2 . adcmp343 ch1 2.00v ch2 500mv 2 1 06500-029 outa v in r1 = 22k? r2 = 2.2k? r3 = 6.2k? m100ms figure 3. hysteresis programmed to 513 mv @ v in on adcmp341
adcmp341/adcmp343 data sheet rev. a | page 2 of 12 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 functional block diagrams ............................................................. 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 4 thermal characteristics .............................................................. 4 esd caution .................................................................................. 4 pin configurations and function descriptions ........................... 5 typical performance characteristics ..............................................6 application information ................................................................ 10 comparators and internal reference ...................................... 10 po wer supply ............................................................................... 10 inputs ........................................................................................... 10 outputs ........................................................................................ 10 programming hysteresis ........................................................... 10 layout recommendations ........................................................ 10 outline dimensio ns ....................................................................... 11 ordering guide .......................................................................... 11 revision history 8 /13 rev. 0 to rev. a changes to f igure 8 .......................................................................... 6 updated outline dimensions ....................................................... 11 2/07 revision 0: initial version
data sheet adcmp341/adcmp343 rev. a | page 3 of 12 specifications v dd = 1.7 v to 5.5 v, ? 40c t a + 125c, unless otherwise noted. table 1 . parameter min typ max unit test conditions/comments threshold 1 threshold voltage 396.6 400.4 404.3 mv v dd = 1.7 v , t a = 25 c 399.3 400.4 401.5 mv v dd = 3.3 v , t a = 25 c 398.5 400.4 402.2 mv v dd = 5.5 v , t a = 25 c 395.0 400.4 405.8 mv v dd = 1.7 v , 0c t a 70c 397.4 400.4 403.4 mv v dd = 3.3 v , 0c t a 70c 396.9 400.4 403.7 mv v dd = 5.5 v , 0c t a 70c 391.2 400.4 407.7 mv v dd = 1.7 v , ?40c t a + 125c 393.4 400.4 405.6 mv v dd = 3.3 v , ?40c t a + 125c 393.2 400.4 405.8 mv v dd = 5.5 v , ?40c t a + 125c threshold voltage accuracy 0.275 % t a = 25 c , v dd = 3.3 v threshold voltage temperature coefficient 16 ppm/c power supply sup ply current 6.5 9 a v dd = 1.7 v 7.0 10 a v dd = 5.5 v input characteristics input bias current 0.01 5 na v dd = 1.7 v, v in = v dd 0.01 5 na v dd = 1.7 v, v in = 0.1 v open - drain outputs output low voltage 2 140 220 mv v dd = 1.7 v, i out = 3 ma 140 220 mv v dd = 5 .5 v, i out = 5 ma output leakage current 3 0.01 1 a v dd = 1.7 v, v out = v dd 0.01 1 a v dd = 1.7 v, v out = 5.5 v dynamic performance 2 , 4 high - to -l ow propagation delay 10 s v dd = 5 v, v o l = 400 mv low -to - high propagation delay 8 s v dd = 5 v, v oh = 0.9 v dd output rise time 0.5 s v dd = 5 v, v o = (0.1 to 0.9) v dd output fall time 0.07 s v dd = 5 v, v o = (0.1 to 0.9) v dd 1 r l = 100 k , v o = 2 v swing. 2 10 mv input overdrive. 3 v in = 40 mv overdrive. 4 r l = 10 k .
adcmp341/adcmp343 data sheet rev. a | page 4 of 12 absolute maximum ratings table 2. parameter rating v dd ?0.3 v to +6 v ina_u, ina_l, inb_u, inb_l ?0.3 v to +6 v outa, outb ?0.3 v to +6 v operating temperature range ?40c to +125c storage temperature range ?65c to +150c lead temperature soldering (10 sec) 300c vapor phase (60 sec) 215c infrared (15 sec) 220c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal characteristics ja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. table 3. thermal resistance package type ja unit 8-lead sot-23 211.5 c/w esd caution
data sheet adcmp341/adcmp343 rev. a | page 5 of 12 pin config uration s and function descrip tions 1 outa 8 outb 2 +ina_u 7 v dd 3 +ina_l 6 +inb_u 4 gnd 5 +inb_l adcmp341 top view (not to scale) 06500-003 figure 4 . adcmp341 pin configuration 1 outa 8 outb 2 ?ina_u 7 v dd 3 ?ina_l 6 ?inb_u 4 gnd 5 ?inb_l adcmp343 top view (not to scale) 06500-004 figure 5 . adcmp343 pin configuration table 4 . pin function descriptions pin o. nemonic descriptio n 1 outa open - drain output for c omparator a. 2 ina_u monitors analog input voltage on c omparator a. connect to the upper tap point of the resistor string. connect internally to the noninverting input on the adcmp341 or the inverting pin on the adcmp343 via a mux controlled by the output level on c omparator a. the other input of comparator a is connected to a 400 mv reference. 3 ina_l monitors analog input voltage on c omparator a. connect to the lower tap point of the resistor string. connect internal ly to the noninverting input on the adcmp341 or the inverting pin on the adcmp343 via a mux controlled by the output level on c omparator a. the other input of c omparator a is connected to a 400 mv reference. 4 gnd ground . 5 inb_l monitors analog input voltage on c omparator b. connect to the lower tap point of the resistor string. connect internally to the noninverting input on the adcmp341 or the inverting pin on the adcmp343 via a mux controlled by the output level on c omparator b. the other input of c omparator b is connected to a 400 mv reference. 6 inb_u monitors analog input voltage on c omparator b. connect to the upper tap point of the resistor string. connect internally to the noninverting input on the adcmp341 or the inverting pin on the adcmp3 43 via a mux controlled by the output level on comparator b. the other input of c omparator b is connected to a 400 mv reference. 7 v dd power supply pin. 8 outb open - drain output for c omparator b.
adcmp341/adcmp343 data sheet rev. a | page 6 of 12 typical performance characteristics 0 10 20 30 40 50 percent of units (%) rising input threshold voltage (mv) 60 394 395 396 397 398 399 400 401 402 403 404 405 406 06500-005 v dd = 5v t a = 25c figure 6. distribution of rising input threshold voltage 395 rising input threshold voltage (mv) supply voltage (v) 401 400 399 398 397 396 1.7 5.7 5.2 4.7 4.2 3.7 3.2 2.7 2.2 t a = ?40c t a = +25c t a = +85c t a = +125c 06500-007 figure 7. rising input threshold voltage vs. supply voltage 10 4 5.2 supply current (a) supply voltage (v) 9 8 7 6 5 1.7 2.2 2.7 3.2 3.7 4.2 4.7 t a = +125c t a = +85c t a = +25c t a = ?40c 06500-008 no load current figure 8. quiescent supply current vs. supply voltage 396 rising input threshold voltage (mv) temperature (c) 404 402 400 398 ?40 ?20 120 0 20406080100 4 3 2 1 0 6500-006 four typical parts v dd = 5v figure 9. rising input threshold voltage vs. temperature ?5 threshold shift (mv) supply voltage (v) 1 1.5 2.52.42.32.22.12.01.91.8 1.7 1.6 06500-009 t a = +125c t a = +85c t a = +25c t a = ?40c 0 ?1 ?2 ?3 ?4 figure 10. minimum supply voltage 50 0 1.5 supply current (a) supply voltage (v) 40 30 20 10 00.51.0 06500-010 t a = +125c t a = +85c t a = +25c t a = ?40c figure 11. start-up supply current
data sheet adcmp341/adcmp343 rev. a | page 7 of 12 1 supply current (a) output sink current (ma) 1000 100 10 0.001 100 10 1 0.1 0.01 t a = ?40c v dd = 5.0v v dd = 3.3v v dd = 2.5v v dd = 1.7v 0 6500-011 figure 12. supply current vs. output sink current 1 supply current (a) output sink current (ma) 1000 100 10 0.001 100 10 1 0.1 0.01 v dd = 5.0v v dd = 3.3v v dd = 2.5v v dd = 1.7v t a = 85c 06500-013 figure 13. supply current vs. output sink current ?7 1.0 input bias current (na) input voltage (v) ?3 ?5 00.2 0.6 ?1 3 1 0.4 0.8 t a = +125c t a = +85c t a = +25c t a = ?40c 06500-015 current is positive going into the device. v dd = 5v 0v < v ib < 1v figure 14. low level input bias current 1 supply current (a) output sink current (ma) 1000 100 10 0.001 100 10 1 0.1 0.01 v dd = 5.0v v dd = 3.3v v dd = 2.5v v dd = 1.7v t a = 25c 06500-012 figure 15. supply current vs. output sink current 0.1 0 input bias current (na) input voltage (v) 1k 10k 100 10 1 ?0.3 ?0.2 ?0.1 t a = +125c t a = +85c t a = +25c t a = ?40c 06500-014 current is going out of the device. v dd = 5v ?0.3v < v ib < 0v figure 16. below ground input bias current 0.01 5 input bias current (na) input voltage (v) 1 0.1 12 4 10 3 t a = ?40c 06500-016 t a = +125c t a = +85c t a = +25c current is going into the device v dd = 5v v ib > 1v figure 17. high level input bias current
adcmp341/adcmp343 data sheet rev. a | page 8 of 12 1 output saturation voltage (mv) output sink current (ma) 100 10 0.001 0.1 0.01 1000 10 1 v dd = 5.0v v dd = 3.3v v dd = 2.5v v dd = 1.8v 06500-017 t a = 25c figure 18. output saturation voltage vs. output sink current 1 output saturation voltage (mv) output sink current (ma) 100 10 0.001 0.1 1000 10 0.01 1 v dd = 5.0v v dd = 3.3v v dd = 2.5v v dd = 1.8v 0 6500-019 t a = 85c figure 19. output saturation voltage vs. output sink current 0 short-circuit current (ma) output voltage (v) 40 20 02 70 4 60 30 10 50 v dd = 5.0v v dd = 3.3v v dd = 2.5v v dd = 1.8v 06500-021 t a = 25c figure 20. short-circuit current vs. output voltage 1 output saturation voltage (mv) output sink current (ma) 100 10 0.001 0.1 1000 10 0.01 1 v dd = 5.0v t a = ?40c v dd = 3.3v v dd = 2.5v v dd = 1.8v 06500-018 figure 21. output saturation voltage vs. output sink current 0 short-circuit current (ma) output voltage (v) 40 20 02 80 4 60 30 10 70 50 t a = +85c t a = +25c 06500-020 t a = +125c t a = ?40c v dd = 5v figure 22. short-circuit current vs. output voltage 0.001 output leakage current (na) output voltage (v) 0.01 0123 10 45 1 0.1 0 6500-022 t a = +125c t a = +85c t a = +25c t a = ?40c v dd = 5v figure 23. output leakage current vs. output voltage
data sheet adcmp341/adcmp343 rev. a | page 9 of 12 0 propagation delay (s) input overdrive (mv) 0 204060 60 50 40 30 20 10 80 100 0 6500-023 lh non inv lh inv hl non inv hl inv t a = 25c figure 24. propagation delay vs. input overdrive ch1 50.0mv ch3 5.00v ch2 5.00v m20.0s ch1 7mv 2 3 1 v in (+ina, ?inb) non inv (outa) inv (outb) 06500-024 figure 25. noninverting and inverting comparators propagation delay 0.01 rise and fall times (s) output pull-up resistor (k ? ) 1 0.1 1 100 10 10 0.1 100 1000 rise fall 06500-025 v dd = 5v c l = 20pf t a = 25c figure 26. rise and fall times vs. output pull-up resistor ch1 2.00v ch2 500mv 2 1 0 6500-026 outa v in r1 = 22k ? r2 = 2.2k ? r3 = 6.2k ? m100ms figure 27. hysteresis programmed to ~513 mv at top of input string (hysteresis at adcmp341 pins 104 mv)
adcmp341/adcmp343 data sheet rev. a | page 10 of 12 application i nformation the adcmp341/ adcmp34 3 are dual , low power comparators with a built - in 400 mv reference that operates from 1.7 v to 5.5 v. the comparators are 0.275 % accurate with fully programmable hysteresis , i mpleme nted using a new technique of a three - resistor string on the input. the se open - drain outputs are capable of sinking up to 40 ma. comparators and inte rnal r eference each of the comparators has one input available externally; the other comparator inputs are connected internally to the 400 mv reference. the adcmp341 has two noninverting comparators and the adcmp343 has two inverting comparators. there are two input pins available to each comparator. however, these two input pins ( inx_u, inx_l ) connect to th e same input leg of the comparator via a muxing system. this is to provide fully programmable rising and falling trip points. the output of the comparator determines which pin is connected to the input of the same comparator. using figure 28 as an example, when outa is high , + ina_u is connected to the comparator input. when the input voltage drops and passes below the 400 mv reference , the output goes low. this in turn disconnects + ina_u from the comparator and connects + ina_l. thi s leg of the string is at a lower voltage and thus instantaneously the effect of hysteresis is applied. therefore, using a resistor string on the input as shown in figure 28 , the voltages for the rising and falling trip points can be programmed by selecting the appropriate resistors in the string. power supply the adcmp341/adcmp343 are designed to operate from 1.7 v to 5.5 v. a 0.1 f decoupling capacitor is recommended between v dd and gnd. inputs the comparator inputs are limited to the maximum v dd voltage range. the voltage on these inputs can be above v dd but never above the maximum allowed v dd voltage. out puts the open - drain comparator outputs are limited to the maximum specified v dd voltage range, regardless of the v dd voltage . these outputs are capable of sinking up to 40 ma. outputs can be tied together to provide a common output signal . p rogramming hysteresi s when choosing the resistor values , the input bias current must be considered as a potential source of error. begin by choosing a resistor value for r3, which takes into account the acceptable error introduced by the maximum specified input bias current. to reduce this error , the current flowing through the resistor r3 should be considerably grea ter than the input bias cu rrent. bias r3 i i >> r3 is therefore 3 3 r ref i v r = now r2 can be calculated from the following : ( ) falling falling rising v v v r r ? = 3 2 r1 can then be calculated using the following equation: 2 1 3 1 r v v r r ref rising ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? = w here: v ref is the specified on ch ip reference. i bias is the maximum specified input bias current. r1 , r2 , and r3 are the three resistors as shown in figure 28. i r3 is the current flowing through r3 . v falling is the desired falling trip voltage and lower of the t wo. v rising is the desired rising trip voltage and higher of the two. +ina_u outa mux v dd 400mv adcmp341 +ina_l vina r1 r2 r3 06500-027 figure 28 . programming hysteresis example layout recommendatio ns correct layout is very important to increase noise immunity. long tracks from the input resis tors to the device can lead to noise being coupled onto the inputs. to avoid this , it is best to place the input resistors as close as possible to the device. it is also recommended that a gnd plane is used under this layout. the combination of small hyste resis and the use of a large r3 resistor further increase s susceptibility to noise. in this case , a decoupling capacitor (ca, cb) may be required on the inx_u node to help reduce any noise. a recommended layout example can be seen in figure 29. c1 ca cb u1 gnd v dd outa ina r1a r2a r3a outb inb r1b r2b r3b 06500-028 figure 29 . recommended layout example
data sheet adcmp341/adcmp343 rev. a | page 11 of 12 outline dimensions compliant to jedec standards mo-178-ba 8 4 0 seating plane 1.95 bsc 0.65 bsc 0.60 bsc 76 1234 5 3.00 2.90 2.80 3.00 2.80 2.60 1.70 1.60 1.50 1.30 1.15 0.90 0 .15 max 0 .05 min 1.45 max 0.95 min 0.22 max 0.08 min 0.38 max 0.22 min 0.60 0.45 0.30 pin 1 indicator 8 12-16-2008-a figure 30. 8-lead small outline transistor package [sot-23] (rj-8) dimensions shown in millimeters ordering guide model 1 temperature range package description package option branding adcmp341yrjz-reel7 C40c to +125c 8-lead sot-23 rj-8 m8y adcmp343yrjz-reel7 C40c to +125c 8-lead sot-23 rj-8 m91 1 z = rohs compliant part.
adcmp341/adcmp343 data sheet rev. a | page 12 of 12 notes ? 2007 C 2013 analog devices, inc. all right s reserved. trademarks and registered trademarks are the property of their respective owners. d06500 - 0 - 8/13(a)

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