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  rfics for paging xprt tm p r e l i mi nary da t a s h e e t BT10381P pocsag pager receiver ic october 9, 2001 confidential and proprietary information of bti page 1 100 - 400mhz pocsag pager receiver ic features ? high performance integrated 100-400mhz pager receiver ic ? low power consumption ? wide operating frequency range ? wide frequency offset and deviation range ? fully pocsag compatible dig ital fsk receiver for 1200bps ? power on/off mode selectivity ? high sensitivity and wide dynamic range ? ambient temperature range (-40c to +85c) ? 28 pin tssop package applications ? pager receivers (pocsag) ? wireless communication products ? telemetry receivers description the BT10381P is a fully integrated, high-performance, low-power, cmos monolithic rf receiver designed specifically for wide area digital paging systems. the BT10381P employs a dire ct fm non-return-to-zero (nrz) frequency shift keying (fsk) digital demodulation scheme. the receiver design is based on dual con- version of the input rf signal to the baseband signal by on-chip mixers. the BT10381P includes an on-chip rf downconversion mixer, if downconversion mixer, li miter/rssi block, digital fsk demodulator, fsk ref- erence pll, a low battery indicator, and an on-chip +1v regulator. the BT10381P requires a dc supply volt- age of +2.7v. ordering information BT10381P pocsag pager receiver ic bti, 13825 cerritos corporate dr., cerritos ca. 90703, u.s.a. tel (562) 407-0500 fax (562) 407-0510 sales@betheltronix.com www.betheltronix.com 1 2 3 4 5 6 7 8 gndrfmx vddbias rfmxlo lf rfmxout BT10381P bti gndbias dig_gr limin ifmxout lim_c1 gndlim lim_c2 rssi con gnddig pd ref_dec fsk_o vddrfmx rfmxin vdddig vddlim ref1 reg_out alarm reg_ctrl ref2 ifmxin 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15
rfics for paging xprt tm p r e l i mi nary da t a s h e e t october 9, 2001 confidential and proprietary information of bti page 2 pocsag pager receiver ic BT10381P specifications pin table parameter conditions min typ max unit supply voltage ta=25 o c 2.4 2.7 3.0 v supply current @ 2.7v power supply 1.69 ma stand-by current <200 a parameters min typ max unit rf downconversion mixer input rf frequency output if frequency gain input ip3 1db compression point noise figure input impedance output impedance 100 280 21.4 8.5 -14.5 -29 15.9 150 1.5 400 mhz mhz db dbm dbm db ? k ? if downconversion mixer input frequency output frequency gain input ip3 1db compression point 21.4 454.4 27.7 -36 -51.5 mhz khz db dbm dbm rssi dynamic range 50 db 2-level digital fsk demodulator output pll charge pump output current 1 210 bit ua regulator regulator output voltage 0.92 0.99 1.01 v pin # parameter i/o description power and ground pins 3 gndrfmx - ground to rf mixer 1 gndbias - ground to ptat bias 26 gndlim - ground to limiter/rssi block 16 gnddig - ground to digital blocks 9 dig_gr - ground to digital guard ring 5 vddrfmx power supply to rf mixer 21 vddlim - power supply to limiter/rssi block 7 vddbias - power supply to ptat bias
rfics for paging xprt tm p r e l i mi nary da t a s h e e t october 9, 2001 confidential and proprietary information of bti page 3 pocsag pager receiver BT10381P detailed pin descriptions receiver pins: rfmxin (pin 4 ) input to the rf mixer input to the rf do wnconversion mixer from the external rf saw filter. this pin should be matched with the output impedance requirement of the rf saw filter (150w). it is necessary to have a tau matching scheme for this pin to provide a ground path for one side of the internal single-to-differential scheme ( see application circuit ). rfmxout (pin 2 ) if output signal of the rf mixer single-ended output of the rf downconversion mixer wh ich interfaces with the extern al 21.4mhz xtal filter. matching is required between this pin and the 21 .4mhz xtal filter?s input impedance of 1.5kw. rfmxlo (pin 6 ) vco/clock input to the rf mixer this pin provides the clock input to the rf downconversion mixer from the external rf vco. this pin has a high input impedance. matching is optional but recommended. vddrfmx (pin 5 ) and gndrfmx (pin 3 ) rf mixer power supply and ground vddrfmx and gndrfmx are the +2.7v power su pply and ground for the rf mixer block. 15 vdddig - power supply to digital blocks receiver pins 4 rfmxin i input to the rf mixer 6 rfmxlo i vco clock input for the rf mixer 2 rfmxout o rf mixer output signal 28 ifmxin i input to the if mixer 27 ifmxout o output of the if mixer 23 limin i input to the limiter 25 / 24 lim_c1 / lim_c2 i external tuning capacitors for the limiter 22 rssi o rssi output to the mpu digital fsk demodulator pins 18 fsk_o o digital fsk demodulator output pin to the decoder 17 ref_dec i fsk reference clock signal from the decoder 20 con i fsk control signal from the decoder 10 / 11 ref2 / ref1 i xtal reference frequency input pins 8 lf o output of the charge pump to the external loop filter power control & voltage regulator pins 19 pd i power down/battery save pin 13 reg_crtl i voltage regulator control 12 reg_out o +1v regulator output 14 alarm o low battery alarm
rfics for paging xprt tm p r e l i mi nary da t a s h e e t october 9, 2001 confidential and proprietary information of bti page 4 pocsag pager receiver ic BT10381P ifmxin (pin 28 ) input to the if mixer this pin is the input to the if downconversion mixer fr om the external 21.4mhz xtal filter. this pin should be matched with the 1.5kw output impedance of the 21.4mhz xtal filter. ifmxout (pin 27 ) output from the if mixer output from the if downconversion mixer which presen ts a nominal 1.5kw output resistance and interfaces directly to the external 455khz bandpass filter. vddbias (pin 7 ) and gndbias (pin 1) ptat bias power supply and ground vddbias and gndbias are the +2.7v power supply and ground for the ptat bias block. limin (pin 23 ) input to the limiter input to the limiter block from the external 455khz bandp ass filter. this pin is ma tched with the 1.5kw output impedance of the 455khz bandpass filter. lim_c1/lim_c2 (pins 25 and 24 ) external tuning capacitors for the limiter external capacitors connect these pins to ground to tune the on-chip limiter feedback. rssi (pin 22 ) rssi output to the decoder a resistor to ground is connected to this pin to out put a dc voltage level signal that is proportional to the received signal strength. the output range of the r ssi is 0.5v to 2.5v and increases with increasing signal strength ( see application information for more details ). vddlim (pin 21 ) and gndlim (pin 26 ) limiter/rssi block po wer supply and ground vddlim and gndlim are the +2.7v power supply and ground for the limiter/rssi block. fsk demodulator pins: fsk_o (pin 18 ) digital fsk digital demodulator output to the decoder output pin of the fsk digital demodul ator which detects the 2 input tones. this pin directly connects to a pocsag decoder chip. ref_dec (pin 17 ) fsk reference clock signal from the decoder this pin receives the clock signal for the 2-level fsk digital demodulator from a pocsag decoder chip. the clock synchronizes the output signal at fsk_o with the off-chip pocsag decoder chip. con (pin 20 ) fsk control signal from the decoder this pin receives the control signal from a pocsag decoder chip for the fsk demodulator. depending on the signals at con, the bt10 381p will be in one of 2 modes: acquisition or hold mode. ref1 / ref2 (pins 11 and 10 ) pll reference frequency input ref1 and ref2 connect to an external 20.945mhz crysta l. these pins provide the clock signals for the ifmx and fsk sections of the BT10381P.
rfics for paging xprt tm p r e l i mi nary da t a s h e e t october 9, 2001 confidential and proprietary information of bti page 5 pocsag pager receiver BT10381P lf (pin 8 ) loop filter output this pin provides the pll/charge pump output signal required for the external loop filter. an rc network from this pin to ground is used to establish the pll bandwidth. vdddig (pin 15 ) and gnddig (pin 16 ) digital block power supply and ground vdddig and gnddig are the +2.7v po wer supply and ground for the fsk and internal pll sections. power saving pins: pd (pin 19 ) power down pin this pin controls the power down function of the BT10381P. a high signal turns the circuit on while a low signal turns the circuit off . reg_out (pin 12 ) output of on-chip regulator this is the output feedback pin for the on-chip +1v re gulator. this must be connected to an external pnp pass transistor as shown in the application circuit. alarm (pin 14 ) low battery alarm indicator for a +1.1v low battery signal. this output becom es high to indicate deterioration of the battery. a pull-up resistor must be conn ected to this pin because it is an open-collector output. reg_crtl (pin 13 ) control of on-chip regulator external transistor control terminal fo r the regulator. connect an external pn p pass transistor to this terminal as shown in the application circuit. dig_gr (pin 9 ) ground for the digital guard ring dig_gr is the ground pin for the digital guard ring.
rfics for paging xprt tm p r e l i mi nary da t a s h e e t october 9, 2001 confidential and proprietary information of bti page 6 pocsag pager receiver ic BT10381P block diagram application information the BT10381P has all of the required blocks to build an integrated pager rf front-end receiver. the BT10381P can be used over a wide frequency range of 120mh z to 300mhz, but it is op timized to work in the 278mhz - 282mhz range. rf mixer block the BT10381P rf mixer is driven by the off-chip vc o to downconvert the rf frequency to the 21.4mhz if frequency. the output of the mixer drives the 1.5kw input impedance of a 21.4mhz off-chip xtal filter. if mixer block the if mixer of the BT10381P downconverts the 21.4mh z if frequency to 455khz and requires an external 20.945mhz xtal for its clock signals. an external 455khz bandpass filter is used after the if mixer to fu rther suppress the image and improve the linearity of the downconverted if signal. limiter/rssi block the limiter/rssi block of the BT10381P is used to indicate the strength of the incoming (received) signal as well as to generate a hard limited output for the digita l circuitry in the digital demodulator. the rssi circuit has a dc level output with a 50db dynamic range ( see graph ). limiter rssi pocsag fsk demodulator fsk_o rssi fsk rssi limin ifmxout fsk controls ref_dec rf mixer ifmxin rfmxlo bpf con 21.4mhz xtal filter rfmxout antenna il =3db rf saw filter rfmxin 455khz lna xtal if mixer ref1 ref2 output regulator reg_out reg_crtl +1.5v reg out alarm alarm alarm vdd pd pd reg +1v xtal 20.945mhz +1v lf rc loop filter digital clock pll
rfics for paging xprt tm p r e l i mi nary da t a s h e e t october 9, 2001 confidential and proprietary information of bti page 7 pocsag pager receiver BT10381P fsk block the fsk digital demodulator receives the input signal fr om the limiter stage and the clock signal from the external 20.945mhz xtal to generate the 1-bit data output required by an external pocsag decoder. to guarantee proper operation of the fsk digital demodulator, the toleration frequency, f t , must not exceed the greatest frequency deviation (dfmax, which is 4.5 khz) from the nominal frequency. the toleration fre- quency is calculated with the following equation: where : rffreq is the incoming rf signal to the rf mixer xtal tolerance is the sum of the crystal tolerances of the rfvco xtal, measured in ppm. the off-chip reference crystal tolerances are the sum of all crystal to lerances, including t he frequency stability of the reference temperatur e, temperature vs. fr equency stability, and aging (a ll measured in ppm). the sum of these tolerances (for rfvco xtal) should not exceed + 10 ppm. to achieve greater flexibility with the crystal tolerances, the frequency stabilit y error about the reference temperatur e can be eliminated by manually tuning the crystal used for the rf mixer to its nominal frequency. then the remaining tolerances must not exceed + 10 ppm. the fsk has an internal pll which is used to provide a 454.4 khz reference frequency for the digital fsk to demodulate the incoming limiter output signal. the 20 .945 mhz off-chip crystal provides the reference fre- quency for the pll. the on-chip pll uses a voltage controlled ring oscillato r and a fixed divider. an off-chip rc loop filter is converted to pin lf . further, the 20.945mhz off-chip xtal is recommended but not limited to + 10ppm to guarantee proper operation of the fsk. the internal pll locks to 454.4 khz, which serves as a reference frequency for the digital fsk to demodulate the incoming limiter output signal. the demodulated signals are detected and converted into a 1-bit digital out- put. the 1-bit digital output is given to the decoder via the pin fsk_o. BT10381P rssi 0 0.5 1 1.5 2 2.5 -80 -70 -60 -50 -40 -30 -20 -10 limiter input (dbm) rssi (v) dr rffreq ? xtaltolerance f t ? fmax < =
rfics for paging xprt tm p r e l i mi nary da t a s h e e t october 9, 2001 confidential and proprietary information of bti page 8 pocsag pager receiver ic BT10381P pin con is used to control the mode of the fsk. this signal comes from the external pocsag decoder. pin ref_dec takes the decoder clock as an input. this cl ock is used to synchronize the fsk 1-bit output data with the external pocsag decoder clock. the fsk can either be in tracking mode or hold mode. the mode is controled by pin con. when con = high, then the fsk is tracking. when con = low then it is in the hold mode. the recommended usage of BT10381P is shown in figure 1 . application circuit figure 1. recommended usage of the BT10381P. BT10381P decoder mpu off-chip vco loop filter bpf xlf lna sawf xtal ref antenna 20.945 mhz to/from decoder/mpu to mpu 455 khz +1v vreg lna +2.7v vdd +1.5v battery +1v vreg rf saw filter 21.4mhz xtal filter BT10381P bti reg_out ifmxout lim_c1 gndlim lim_c2 rssi limin fsk_o gnddig vddlim ref_dec con reg_ctrl vdddig pd vddbias lf alarm ref1 28 24 27 26 25 23 ifmxin rfmxin rfmxlo dig_gr vddrfmx ref2 gndbias rfmxout gndrfmx 4 5 6 7 8 3 2 1 12 13 14 11 10 9 22 21 20 16 19 18 17 15 +2.7v vdd +2.7v vdd alarm
rfics for paging xprt tm p r e l i mi nary da t a s h e e t october 9, 2001 confidential and proprietary information of bti page 9 pocsag pager receiver BT10381P package dimensions appendix a: reference desi gn system specifications parameter conditions min typ max unit radio frequency input rf input sensitivity ber,3%;+ 4.5khz (fsk); data rate 1200bits/s; snr=4.5db; nf=4.0db t amb =25 -130 dbm adjacent channel selectivity t amb = 25c t amb = -10 to +70c 60 60 65 - - - db if filter channel imbalance - - 2 db co-channel rejection fc + 300hz - 4 6 db spurious immunity 55 db intermodulation immunity 55 db blocking immunity ? f > + 1mhz 75 82 - db deviation range (3db degrada- tion in sensitivity) + tbd + 4.5 + tbd khz receiver turn-on time 5ms e b e e 1 package dimensions in mm. 12 typ. 6+ 4 typ. l r = 0 . 2 0 0.20 to p vi e w side view lead count 28l dimensions tolerance amax. 1.20 a1 0.05 min/0.10 max a2 + 0.125 0.925 d+ 0.10 9.70 e+ 0.15 6.40 e1 + 0.10 4.40 l +0.15/-0.10 0.60 l1 +0.15/-0.10 1.00 e+ 0.15 0.65 b 0.19 min/0.30 max + 4 4 a2 a a1 1 d max. rad. ty p 0.25 l1 28l tssop package the information provided herein is believed to be accurate and correct. betheltronix, inc. assumes no responsibility for the i naccuracies or use of the information or the use of the described product. betheltronix, inc. reserves the right to make changes in circuit d esign and/or spec- ifications at any time without further notice. no patent rights or licenses to any of the circuits described herein are implied or granted to any third parties. ? copyright 2001 betheltronix, inc. all rights reserved


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