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precision, micropower operational amplifiers op193/op29 3 rev. c information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change with out notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 910 6, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ? 1995C 2009 analog devices, inc. all rights reserved. features operates from + 1.7 v to 18 v low s upply current: 15 a/ a mplifier low o ffset v oltage: 100 v maximum outputs s ink and s ource: 8 ma no p hase r eversal single - or d ual -s upply o peration high o pen -l oop g ain: 600 v/mv unity -g ain s table applications digital s cales strain g ages portable m edical e quipment battery -p owered i nstrumentation temperature t ransducer a mplifier general description the op193/op293 are single- supply operational amplifiers that feature a combination of high precision, low supply curr ent , and the ability to operate at low voltages. for high performance in single- supply systems , the input and output ranges include ground, and the outputs swing from the negative rail to within 600 mv of the positive supply. for low voltage operation , the op193/op293 can operate down to +1.7 v or 0.85 v. the combination of high accuracy and low power operation make the op193/op293 useful for battery - powered equipment. the p ar ts low current drain and low voltage operation allow it to continue performing l ong after other amplifiers have ceased functioning either because of battery drain or headroom. the op193/op293 are specified for single +2 v through dual 15 v operation over the extended ( ?40c to +125c) tempera ture range. they are available in soic s urface - mount packages. pin configurations nul l 1 ?in a 2 +in a 3 v? 4 nc 8 v+ 7 out a 6 nul l 5 nc = no connect op193 top view (not to scale) 00295-001 figure 1 . 8 - lead soic _n (s suffix) out a 1 ?in a 2 +in a 3 v? 4 v+ 8 out b 7 ?in b 6 +in b 5 op293 top view (not to scale) 00295-002 figure 2 . 8 - lead soic _n (s suffix)
op193/op293 rev. c | page 2 of 2 0 table of contents feature s .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 pin configurations ........................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 electrical specifications ............................................................... 3 absolute maximum ratings ............................................................ 8 thermal resistance ...................................................................... 8 esd caution .................................................................................. 8 typical performance characteristics ............................................. 9 functional description .................................................................. 13 driv ing capacitive loads .......................................................... 13 input overvoltage protection ................................................... 14 output phase reversal op193 ............................................... 14 output phase reversal op293 ............................................... 14 battery - powered applications .................................................. 14 a micropower false - ground generator ................................. 15 a battery - powered voltage reference ..................................... 15 a single - supply current monitor ............................................ 15 a single - supply instrumentation amplifier .......................... 16 a low power, temperature to 4 ma to 20 ma transmitter .................................................................................. 16 a micropower voltage controlled oscillator ........................ 17 outline dimensions ....................................................................... 18 ordering guide .......................................................................... 18 revision history 9/09 rev . b to rev. c updated format .................................................................. universal deleted op493 .................................................................... universal changes to features and general description section s .............. 1 deleted 8 - lead epoxy dip pin configurations for op193 and op293, and 14 - lead epoxy dip and 16 - lead wide body sol pin configurations for op 493 ........................................................ 1 changes to offset voltage parameter and large signal voltage gain, r l = 100 k , ?10 v v out +10 v parameter , and power supply rejection ratio parameter, table 1 ........................ 3 changes to offset voltage parameter and power supply rejection ratio parameter , tabl e 2 ................................................ 4 changes to offset voltage parameter and power supply rejection ratio parameter , tabl e 3 ................................................ 6 changes to offset voltage parameter and power supply rejection ratio parameter , tabl e 4 ................................................ 7 changes to table 5 and table 6 ....................................................... 8 changes to figure 3 to figure 6 ...................................................... 9 changes to figure 10 and figure 12 ............................................. 10 changes to fu nctional description sectio n and figure 2 6 ...... 13 deleted a micropower, single - supply quad voltage output 8- bit dac section .......................................................................... 13 deleted figure 13; renumbered sequentially ............................ 14 deleted a single - supply micropower quad programmable - gain amplifier section .................................................................. 14 changes to output phase reversal o p293 section, battery - powered applications section, and figure 27 ............................ 14 deleted figure 14 ............................................................................ 15 changes to figure 31 , a single - supply current monitor section, and figure 32 .................................................................... 15 changes to a low power, temperature to 4 ma to 20 ma transmitter section and figure 35 ............................................... 16 updated outline dimensions ....................................................... 18 changes to ordering guide .......................................................... 18 1/02 rev. a to rev. b deletion of wafer test limits table ................................................ 5 deletion of dice characteristics images ........................................ 6 edits to ordering guide ................................................................... 6
op193/op293 rev. c | page 3 of 20 specifications e lectrical s pecifications v s = 15.0 v, t a = 25 c, unless otherwise noted . table 1. e grade f grade parameter symbol conditions min typ max min typ max unit input characteristics offset voltage v os op193 150 v op193, ?40c t a +125c 250 v op293 100 250 v op293, ?40c t a +125c 200 350 v input bias current i b v cm = 0 v, ?40c t a +125c 15 20 na input offset current i os v cm = 0 v, ?40c t a +125c 2 4 na input voltage range v cm ?14.9 +13.5 ?14.9 +13.5 v common - mode rejection cmrr ?14.9 v v cm +14 v 100 116 97 116 db ?14.9 v v cm +14 v, ?40c t a +125c 97 94 db large signal voltage gain a vo r l = 100 k , ?10 v v out +10 v 500 600 500 600 v/mv ?40c t a +85c 300 300 v/mv ?40c t a +125c 300 300 v/mv large signal voltage gain a vo r l = 10 k , ?10 v v out +10 v 350 350 v/mv ?40c t a +85c 200 200 v/mv ?40c t a +125c 150 150 v/mv large signal voltage gain a vo r l = 2 k , ?10 v v out +10 v 200 200 v/mv ?40c t a +85c 125 125 v/mv ?40c t a +125c 100 100 v/mv long - term offset voltage 1 v os 150 300 v offset voltage drift 2 v os /t 0.2 1.75 v/c output characteristics output voltage swing high v oh i l = 1 ma 14.1 14.2 14.1 14.2 v i l = 1 ma, ?40c t a +125c 14.0 14.0 v i l = 5 ma 13.9 14.1 13.9 14.1 v output voltage swing low v ol i l = ?1 ma ?14.7 ?14.6 ?14.7 ?14.6 v i l = ?1 ma, ?40c t a +125c ?14.4 ?14.4 v i l = ?5 ma +14.2 ?14.1 +14.2 ?14.1 v short - circuit current i sc 25 25 ma power supply power supply rejection ratio psrr v s = 1.5 v to 18 v 100 120 97 120 db ?40c t a +125c 97 94 db supply current per amplifier i sy v out = 0 v, v s = 18 v, ?40c t a +125c, r l = 30 30 a noise performance voltage noise density e n f = 1 khz 65 65 nv/hz current noise density i n f = 1 khz 0.05 0.05 pa/hz voltage noise e n p- p 0.1 hz to 10 hz 3 3 v p -p
op193/op293 rev. c | page 4 of 20 e grade f grade parameter symbol conditions min typ max min typ max unit dynamic performance slew rate sr r l = 2 k 15 15 v/m s gain bandwidth product gbp 35 35 khz channel separation v out = 10 v p - p, r l = 2 k , f = 1 khz 120 120 db 1 long - term offset voltage is guaranteed by a 1000 hour life test p erformed on three independent lots at 125 c, with an ltpd o f 1.3 . 2 offset voltage drift is the average of the ? 40c to +25c delta and the +25c to +125c delta. v s = 5.0 v, v cm = 0.1 v, t a = 25c , unless otherwise noted. table 2. e grade f grade parameter symbol conditions min typ max min typ max unit input characteristics offset voltage v os op193 150 v op193, ?40c t a +125c 250 v op293 100 250 v op293, ?40c t a +125c 200 350 v input bias current i b ?40c t a +125c 15 20 na input offset current i os ?40c t a +125c 2 4 na input voltage range v cm 0 4 0 4 v common - mode rejection cmrr 0.1 v v cm 4 v 100 116 96 116 db 0.1 v v cm 4 v, ?40c t a +125c 92 92 db large signal voltage gain a vo r l = 100 k , 0.03 v v out 4.0 v 200 200 v/mv ?40c t a +85c 125 125 v/mv ?40c t a +125c 130 130 v/mv large signal voltage gain a vo r l = 10 k , 0 .03 v v out 4.0 v 75 75 v/mv ?40c t a +85c 50 50 v/mv ?40c t a +125c 70 70 v/mv long - term offset voltage 1 v os 150 300 v offset voltage drift 2 v os /t 0.2 1.25 v/c output characteristics output voltage swing high v oh i l = 100 a 4.4 4.4 v i l = 1 ma 4.1 4.4 4.1 4.4 v i l = 1 ma, ?40c t a +125c 4.0 4.0 v i l = 5 ma 4.0 4.4 4.0 4.4 v output voltage swing low v ol i l = ?100 a 140 160 140 160 mv i l = ?100 a, ?40c t a +125c 220 220 mv no load 5 5 mv i l = ?1 ma 280 400 280 400 mv i l = ?1 ma, ?40c t a +125c 500 500 mv i l = C 5 ma 700 900 700 900 mv short - circuit current i sc 8 8 ma power supply power supply rejection ratio psrr v s = 1.7 v to 6.0 v 100 120 97 120 db ?40c t a +125c 94 90 db supply current per amplifier i sy v cm = 2.5 v, r l = 14.5 14.5 a
op193/op293 rev. c | page 5 of 20 e grade f grade parameter symbol conditions min typ max min typ max unit noise performance voltage noise d ensity e n f = 1 khz 65 65 nv/hz current noise density i n f = 1 khz 0.05 0.05 pa/hz voltage noise e n p- p 0.1 hz to 10 hz 3 3 v p -p dynamic performance slew rate sr r l = 2 k 12 12 v/ms gain bandwidth pr oduct gbp 35 35 khz 1 long - term offset voltage is guaranteed by a 1000 hour life test performed on three indepen dent lots at 125 c, with an ltpd of 1.3. 2 offset voltage drift is the average of the ? 40c to +25c delta and the +25c to +125c delta.
op193/op293 rev. c | page 6 of 20 v s = 3.0 v, v cm = 0.1 v, t a = 25c , unless otherwise noted. table 3. e grade f grade parameter symbol conditions min typ max min typ max unit input characteristics offset voltage v os op193 150 v op193, ?40c t a +125c 250 v op293 100 250 v op293, ?40c t a +125c 200 350 v input bias current i b ?40c t a +125c 15 20 na input offset current i os ?40c t a +125c 2 4 na inpu t voltage range v cm 0 2 0 2 v common - mode rejection cmrr 0.1 v cm 2 v 97 116 94 116 db 0.1 v cm 2 v, ?40c t a +125c 90 87 db large signal voltage gain a vo r l = 100 k , 0.03 v v out 2 v 100 100 v/mv ?40c t a +85c 75 75 v/mv ?40c t a +125c 100 100 v/mv long - term offset voltage 1 v os 150 300 v offset voltage drift 2 v os /t 0.2 1.25 v/c output characteristics output voltage swing high v oh i l = 1 ma 2.1 2.14 2.1 2.14 v i l = 1 ma, C40c t a +125c 1.9 1.9 v i l = 5 ma 1.9 2.1 1.9 2.1 v output voltage swing low v ol i l = ?1 ma 280 400 280 400 mv i l = ?1 ma, ?40c t a +125c 500 500 mv i l = ?5 ma 700 900 700 900 mv short - circuit current i sc 8 8 ma power supply power supply rejection ratio psrr v s = +1.7 v to +6 v 100 97 db ?40c t a +125c 94 90 db supply current per amplifier i sy v cm = 1.5 v, r l = 14.5 22 14.5 22 a ?40c t a +125c 22 22 a supply voltage range v s +2 18 +2 18 v noise performance voltage noise density e n f = 1 khz 65 65 nv/hz current noise density i n f = 1 khz 0.05 0.05 pa/hz voltage noise e n p- p 0 .1 hz to 10 hz 3 3 v p -p dynamic performance slew rate sr r l = 2 k 10 10 v/m s gain bandwidth product gbp 25 25 khz channel separation v out = 10 v p - p, r l = 2 k , f = 1 khz 120 120 db 1 long - term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at 125 c, with an ltpd of 1.3. 2 offset voltage drift is the average of the C 40c to +25c delta and the +25c to +125c delta.
op193/op293 rev. c | page 7 of 20 v s = 2.0 v, v cm = 0.1 v, t a = 25 c, unless otherwise noted . table 4. e grade f grade parameter symbol conditions min typ max min typ max unit input characteristics offset voltage v os op193 150 v op193, ?40c t a +125c 250 v op293 100 250 v op293, ?40c t a +125c 175 350 v input bias current i b ?40c t a +125c 15 20 na input offset current i os ?40c t a +125c 2 4 na input voltage range v cm 0 1 0 1 v large signal voltage gain a vo r l = 100 k , 0.03 v v out 1 v 60 60 v/mv ?40c t a +125c 70 70 v/mv long - term offset voltage v os 150 300 v power supply power supply rejection rat io psrr v s = 1.7 v to 6 v 100 97 db ?40c t a +125c 94 90 db supply current/amplifier i sy v cm = 1.0 v, r l = 13.2 20 13.2 20 a ?40c t a +125c 25 25 a supply voltage range v s +2 18 +2 18 v noise performance voltage noise density e n f = 1 khz 65 65 nv/hz current noise density i n f = 1 khz 0.05 0.05 pa/hz voltage noise e n p- p 0.1 hz to 10 hz 3 3 v p -p dynamic performance slew rate sr r l = 2 k 10 25 v/ms g ain bandwidth product gbp 25 khz
op193/op293 rev. c | page 8 of 20 absolute maximum rat ings table 5. parameter rating supply voltage 1 18 v input voltage 1 18 v differential input voltage 1 18 v output short - circuit duration to g nd indefinite storag e temperature range ?65c to +150c operating temperature range ?40c to +125c junction temperature range ?65c to +150c lead temperature (soldering, 60 sec) 300c 1 for supply voltages less than 18 v, the input voltage is limited to the supply voltage. stresses abov e those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance ja is specified for the worst - case conditions, that is, a device soldered in a circuit board for surface - mount packages. table 6 . thermal resistance package type ja 1 jc unit 8- lead soic _n (s) 158 43 c/w 1 ja is specif i ed for the worst - case conditions . ja is specified for a device soldered in a circuit board for the soic package. esd caution
op193/op293 rev. c | page 9 of 20 typical performance characteristics 200 160 120 80 40 0 7560 3015 0 ?15?30?45?60?75 45 number of amplifiers offset (v) v s = 15v t a = 25c 00295-003 figure 3 . offset distribution, v s = 15 v 200 160 120 80 40 0 7560 3015 0 ?15?30?45?60?75 45 number of amplifiers offset (v) v s = 3v v cm = 0.1v t a = 25c 00295-004 figure 4 . offset distribution, v s = +3 v 150 120 90 60 30 0 1.0 0.6 0.4 0.2 0 0.8 number of amplifiers tcv os (v/c) v s = 3v v cm = 0.1v ?40c t a +125c 00295-005 figure 5 . tcv os distribution, v s = +3 v 150 120 90 60 30 0 1.0 0.6 0.4 0.2 0 0.8 number of amplifiers tcv os (v/c) v s = 15v ?40c t a +125c 00295-006 figure 6 . tcv os distribution, v s = 15 v 1 ?4 5 0 input bias current (na) common-mode voltage (v) 0 ?1 ?2 ?3 1 2 3 4 v s = 5v ?40c +125c +25c 00295-007 figure 7 . input bias current vs. common - mode voltage 120 0 10k 10 psrr (db) frequency (hz) 100 80 60 40 20 100 1k ?psrr +psrr 5v v s 30v t a = 25c 00295-008 figure 8 . psrr vs. frequency
op193/op293 rev. c | page 10 of 20 120 0 10k 10 cmrr (db) frequency (hz) 100 80 60 40 20 100 1k t a = 25c v s = 15v v s = +5v 00295-009 figure 9 . cmrr vs. frequency 25 0 125 ?50 slew rate (v/ms) temperature (c) 20 15 10 5 ?25 0 25 50 75 100 +sr = ?sr v s = 15v +sr = ?sr v s = +5v 00295-010 figure 10 . slew rate vs. temperature 40 0 125 ?50 short-circuit current (ma) temperature (c) 30 20 10 ?25 0 25 50 75 100 | ?i sc | v s = 15v +i sc v s = +5v | ?i sc | v s = +5v +i sc v s = 15v 00295-011 figure 11 . short - circuit current vs. temperature 0 ?0.25 125 ?50 input offset current (na) temperature (c) ?25 0 25 50 75 100 ?0.05 ?0.10 ?0.15 ?0.20 v s = +2v v cm = 0.1v v s = 15v 00295-012 figure 12 . input offset current vs. temperature 0 ?5 125 ?50 input bias current (na) temperature (c) ?25 0 25 50 75 100 ?1 ?2 ?3 ?4 v s = 15v v s = +2v v cm = 0.1v 00295-013 figure 13 . input bias current vs. temperature 25 0 125 ?50 supply current (a) temperature (c) 20 15 10 5 ?25 0 25 50 75 100 v s = 18v v s = +2v v cm = 1v 00295-014 figure 14 . supply current vs. temperature
op193/op293 rev. c | page 11 of 20 1k 1 1k 0.1 voltage noise density (nv/ hz) frequency (hz) 1 10 100 10 100 5v v s 30v t a = 25c 00295-015 figu re 15 . voltage noise density vs. frequency 1k 1 1k 0.1 current noise density (pa/ hz) frequency (hz) 1 10 100 10 100 5v v s 30v t a = 25c 00295-016 figure 16 . current noise density vs. frequency 10k 1 10k 0.1 delta from supply rail (mv) current load (a) 5v v s 30v t a = 25c 1 10 100 1k 10 100 1k delta from v ee delta from v cc 00295-017 figure 17 . delta output swing vs. current load 2500 0 125 ?50 voltage gain (v/mv) temperature (c) 2000 1500 1000 500 ?25 0 25 50 75 100 v s = +5v 0.03v v out 4v v s = 15v ?10v v out +10v 00295-018 figure 18 . voltage gain (r l = 100 k) vs. temperature 1000 0 125 ?50 voltage gain (v/mv) temperature (c) 800 600 400 200 ?25 0 25 50 75 100 v s = +5v 0.03v v out 4v v s = 15v ?10v v out +10v 00295-019 figure 19 . voltage gain (r l = 10 k) vs. temperature 60 ?20 100k 10 gain (db) frequency (hz) 100 1k 10k 40 20 0 v s = 5v t a = 25c 00295-020 figure 20 . closed - loop gain vs. frequency, v s = 5 v
op193/op293 rev. c | page 12 of 20 60 ?20 100k 10 gain (db) frequency (hz) 100 1k 10k 40 20 0 v s = 15v t a = 25c 00295-021 figure 21 . closed - loop gain vs. frequency, v s = 15 v 60 0 10k 10 overshoot (%) capacitive load (pf) 100 1k 50 40 30 20 10 +os r l = ?os r l = +os = | ?os | r l = 50k ? +os = | ?os | r l = 10k ? v s = 5v t a = 25c a v = 1 50mv v in 150mv loads to gnd 00295-022 figure 22 . small signal overshoot vs. capacitive load 60 ?20 ?40 1m 100 gain (db) phase (degrees) frequency (hz) 1k 10k 100k 40 20 0 ?45 ?90 90 45 0 phase gain v s = 5v 00295-023 figure 23 . open - loop gain and phase vs. frequency 60 ?20 ?40 1m 100 gain (db) phase (degrees) frequency (hz) 1k 10k 100k 40 20 0 ?45 ?90 90 45 0 phase gain v s = 15v 00295-024 figure 24 . open - loop gain an d phase vs. frequency
op193/op293 rev. c | page 13 of 20 functional description the op193/op293 operational amplifiers are single-supply, micropower, precision amplifiers whose input and output ranges both include ground. input offset voltage (v os ) is only 100 v maximum, while the output delivers 5 ma to a load. supply current is only 15 a. a simplified schematic of the input stage is shown in figure 26. the input transistors, q1 and q2, are pnp devices, which permit the inputs to operate down to ground potential. the input transis- tors have resistors in series with the base terminals to protect the junctions from overvoltage conditions. the second stage is an npn cascode that is buffered by an emitter follower before driving the final pnp gain stage. the op193 includes connections to taps on the input load resis- tors, which can be used to null the input offset voltage, v os . the op293 have two additional transistors, q7 and q8. the behavior of these transistors is discussed in the output phase reversalop193 and output phase reversalop293 sections. the output stage, shown in figure 25, is a noninverting npn totem-pole configuration. current is sourced to the load by emitter follower q1, while q2 provides current sink capability. when q2 saturates, the output is pulled to within 5 mv of ground without an external pull-down resistor. the totem-pole output stage supplies a minimum of 5 ma to an external load, even when operating from a single 3.0 v power supply. q4 q1 q5 q3 q2 output i1 i2 i3 v + from input s tage v? 00295-026 figure 25. op193/op293 equivalent output circuit by operating as an emitter follower, q1 offers a high impedance load to the final pnp collector of the input stage. base drive to q2 is derived by monitoring q1s collector current. transistor q5 tracks the collector current of q1. when q1 is on, q5 keeps q4 off, and current source i1 keeps q2 turned off. when q1 is driven to cutoff (that is, the output must move toward v?), q5 allows q4 to turn on. q4s collector current then provides the base drive for q3 and q2, and the output low voltage swing is set by q2s v ce,sat , which is about 5 mv. driving capacitive loads the op193/op293 amplifiers are unconditionally stable with capacitive loads less than 200 pf. however, the small signal, unity-gain overshoot improves if a resistive load is added. for example, transient overshoot is 20% when driving a 1000 pf, 10 k load. when driving large capacitive loads in unity-gain configurations, an in-the-loop compensation technique is recommended, as illustrated in figure 30. 2k ? 2k ? +input q1 q7 q8 q3 q4 d1 i2 i3 i4 q5 q6 i5 i6 v? v + i1 to output stage q2 r2 a r2 b nulling terminals (op193 only) r1 a r1 b ?input op293 only 00295-025 figure 26. op193/op293 equivalent input circuit
op193/op293 rev. c | page 14 of 20 i nput overvoltage protection as previously mentioned, the op193/op293 op amps use a pnp input stage with protection resistors in series with the inverting and noninverting inputs. the high breakdown of the pnp transistors, coupled with the protection resist ors, provides a large amount of input protection from overvoltage conditions . the inputs can therefore be taken 20 v beyond either supply without damaging the amplifier. output phase reversa l op193 the op193s input pnp collector - base junction can be forward - biased if the inputs are brought more than one diode drop (0.7 v ) below ground. when this happens to the noninverting input, q4 of the cascode stage turns on and the output goes high. if the positive input signal can go below ground, phase reversal can be prevented by clamping the input to the negative supply ( that is , gnd) with a diode. the reverse leakage of the diode does add to the input bias current of the amplifier. if input bias current is not critical, a 1n914 diode add s less than 10 na of leakag e. however, its leakage current double s for every 10c increase in ambient temperature. for critical applications, the collector - base junction of a 2n3906 transistor add s only about 10 pa of additional bias current. to limit the current through the diode u nder fault conditions, a 1 k resistor is recommended in series with the input. (the op193s internal current limiting resistors do not protect the external diode.) output phase reversa l op293 the op293 include s two lateral pnp transistors , q7 and q8 , to protect against phase reversal. if an input is brought more than one diode drop ( 0.7 v) below ground, q7 and q8 combine to level shift the entire cascode stage, including the bias to q3 and q4, simultaneously. in this case , q4 does not saturate and the ou tput remains low. the op293 do es not exhibit output phase reversal for inputs up to ? 5 v below v ? at +25c. the phase reversal limit at +125c is about ? 3 v. if the inputs can be driven below these levels, an external clamp diode, as discussed in the previ ous section, should be added. battery - powered applications op193/op293 series op amps can be operated on a minimum supply voltage of 1.7 v, and draw only 13 a of supply current per amplifier from a 2.0 v supply. in many battery - powered cir - cuits , op193/op293 devices can be continuously operated for thousands of hours before requiring battery replacement, thus reducing equipment downtime and operating cost. high performance portable equipment and instruments fre - quently use lithium cells because of their l ong shelf life, light weight, and high energy density relative to older primary cells. most lithium cells have a nominal output voltage of 3 v and are noted for a flat discharge characteristic. the low supply voltage requirement of the op193/op293 , combine d with the flat discharge characteristic of the lithium cell, indicates that the op193/op293 can be operated over the entire useful life of the cell. figure 27 shows the typical discharge characteristic of a 1 ah lithium cell powe ring the op193 and op293 , with each amplifier, in turn, driving 2.1 v into a 100 k load. lithium sulfur dioxide cell voltage (v) 2 1 hours 3 4 0 op293 op193 0 1000 2000 3000 4000 5000 6000 7000 00295-027 figure 27 . lithium sulfur dioxide cell discharge characteristic with op193/op293 and 100 k loads input offset voltage nulling the op193 provides two offset nulling terminals that can be used to adjust the op 193s internal v os . in general, operational amplifier terminals should never be used to adjust system offset voltages. the offset null ing circuit of figure 28 provides about 7 m v of offset adjustment range. a 100 k resistor plac ed in series with the wiper arm of the offset null potentiometer, as shown in figure 29 , reduces the offset adjustment range to 400 v and is recommended for applications requiring high null resolution. offset nulling does not adv ersely affect tcv os performance, providing that the trimming potentiometer temperature coeffi - cient does not exceed 100 ppm/c. v+ op193 100k? v? 2 3 1 5 6 4 7 00295-028 figure 28 . offset nulling circuit v+ op193 100k? 100k? v? 2 3 1 5 6 4 7 00295-029 figure 29 . high resolution offset nulling circuit
op193/op293 rev. c | page 15 of 20 a micropower false - ground generator some single - supply circuits work best when inputs are biased above ground, typically at ? of the supply voltage. in these cases, a false ground can be created by using a voltage divider buffered by an amplifi er. one such circuit is shown in figure 30 . this circuit generate s a false - ground reference at ? of the supply voltage, while drawing only about 27 a from a 5 v supply. the circuit includes compensation to allow for a 1 f bypa ss capacitor at the false - ground output. the benefit of a large capacitor is that not only does the false ground present a very low dc resistance to the load, but its ac impedance is low as well. the op193 can both sink and source more than 5 ma, which imp roves recovery time from transients in the load current. op193 2 3 6 7 5v or 12v 2.5v or 6v + + + 4 10k? 100? 0.022f 240k? 240k? 1f 1f 00295-030 figure 30 . a micropower false - ground generator a battery - powered voltage refe rence the circuit of figure 31 is a battery - powered voltage reference that draws only 17 a of supply current. at this level, two aa alkaline cells can power this reference for more than 18 months. at an output voltage of 1.23 v at 25c, drift of the reference is only 5.5 v/c over the industrial temperature range. load re gulation is 85 v/ma with line regulation at 120 v/v. design of the reference is based on the brokaw band gap core tech nique. scaling of resistor r1 and resistor r2 produces unequal currents in q1 and q2. the resulting v be across r3 creates a temperatur e- proportional voltage (ptat) , which, in turn, produces a larger temperature - proportional voltage across r4 and r5, v1. the temperature coefficient of v1 cancels (first order) the complementary to absolute temperature (ctat) coefficient of v be1 . when adjus ted to 1.23 v at 25c, output voltage temperature coefficient is at a minimum. band gap references can have start - up problems. with no current in r1 and r2, the op193 is beyond its positive input range limit and has an undefined output state. shorting pin 5 (an offset adjust pin) to ground forces the output high under these circums tances and ensures reliable startup without significantly degrading the op193s offset drift. 3 op193 2 4 5 6 7 v be2 q1 v+ (2.5v to 36v) q2 1 2 3 7 6 5 mat01ah r3 68k? v1 r2 1.5m ? v out (1.23v @ 25c) c1 1000pf r1 240k? v be1 + ? + ? + ? v be r4 130k? r5, 20k ? output adjust 00295-031 figure 31 . a battery - powered voltage reference a single - supply current monitor current monitoring essentially consists of amplifying the voltage drop across a resistor placed in series with the current to be measured. the difficulty is that only small voltage drops can be tolerated, and with low precision op am ps , this greatly limits the overall resolution. the single - supply current monitor of figure 32 has a resolution of 10 a and is capable of monitoring 30 ma of current. this range can be adjusted by changing the current sense resi stor , r1. when measuring total system current, it may be necessary to include the supply current of the current monitor, which bypasses the current sense resistor, in the final result. this current can be measured and calibrated (together with the residual offset) by adjustment of the offset trim potentiometer, r2. this produces a deliberate temperature dependent offset. however, the supply current of the op193 is also proportional to temperature, and the two effects tend to track. voltage devel - oped at the noninverting input and amplified by (1 + r4/r5) appears at v out . to circuit under test v+ op193 3 2 1 5 6 4 7 + ? v out = 100mv/ma(i test ) r4 9.9k ? r2 100k? i test r1 1 ? r5 100? r3 100k? 00295-032 figure 32 . single - supply current monitor
op193/op293 rev. c | page 16 of 20 a single - supply instrumentati on amplifier designing a true single - supply instrumentation amplifier with zero - input and zer o- output operation requires special care. the traditional configuration, shown in figure 33 , depends upon amplifier a1s output being at 0 v when the applied common - mode input voltage is at 0 v. any error at the output is multipli ed by the gain of a2. in addition, current flows through resistor r3 as a2s output voltage increases. a1s output must remain at 0 v while sinking the current through r3, or a gain error result s . with a maximum output voltage of 4 v, the current through r3 is only 2 a, but this still produce s an appreciable error. 5v v+ v? 5v + ? + ? v+ v? r1 20k? r2 1.98m ? ?in +in v out r4 1.98m ? r3 20k? i sink a1 1/2 op293 a2 1/2 op293 00295-033 figure 33 . a conventional instrumentation amplifier one solution to this problem is to use a pull - down resistor. for example, if r3 = 20 k , then the pull - down resist or must be less than 400 . however, the pull - down resistor appears as a fixed load when a common - mode voltage is applied. with a 4 v common - mode voltage, the additional load current is 10 ma, which is unacceptable in a low power application. figure 34 shows a better solution. a1s sink current is provided by a pair of n - channel fet transistors, configured as a current mirror. with the values shown, the sink current of q2 is about 340 a . thus, with a common - mode voltage of 4 v, th e addi - tional load current is limited to 340 a vs . 10 ma with a 400 resistor. 5v v+ v? 5v q1 q2 5v + ? + ? v+ v? r1 20k? r2 1.98m ? a1 1/2 op293 a2 1/2 op293 ?in +in v out r3 20k? 10k? r4 1.98m ? vn2222 00295-034 figure 34 . an improved single - supply, 0 v in , 0 v out instrumentation amplifier a low power, temperature t o 4 m a to 20 ma transmitter a simple tempera ture to 4 ma to 20 ma transmitter is shown in figure 35 . after calibration, this transmitter is accurate to 0.5c over the ? 50c to +150c temperature range. the transmit ter operates from 8 v to 40 v with supply rejection better than 3 ppm/v. one half of the op293 is used to buffer the temp pin, and the other half regulates the output current to satisfy the current summ ation at its noninverting input. ( ) ? ? ? ? ? ? ? ? ++ ? + + 102 762 102 76 rr rrr v rr rrv i set temp out the change in output current with temperature is the der ivative of the following transfer function: ( ) 102 76 rr rr t v t i temp out + ? ? = ? ? notes 1. all resistors 1/4 w, 5% unless otherwise noted. span trim 8 4 v temp 2n1711 1 2 3 ref43gpz 6 5 7 1n4002 r load i out v+ 8v to 40v r10 100? 1%, 1/2 w r8 1k ? r9 100k ? v set r4 20k? r6 3k? r7 5k? zero trim r5 5k? r2 1k? 1/2 op293 ? + 1/2 op293 ? + r3 100k? r1, 10k ? v in v out temp gnd 2 6 3 4 00295-035 figure 35 . temperature to 4 ma to 20 ma transmitter
op193/op293 rev. c | page 17 of 20 from the formulas, it can be seen that if the span trim is adjusted before the zero trim, the two trims are not interactive, which greatly simplifies the calibration procedure. calibration of the transmitter is simple. first, the slope of the output current vs . temperature is calibrated by adjusting the span trim, r7. a couple of iterations may be required t o be sure the slope is correct. when the span trim has been adjusted , the zero trim can be made. a djusting the zero trim does not affect the gain. the zero trim can be set at any known temperature by adjusting r5 until the output current equals: ( ) ma4 +? ? ? ? ? ? ? ? ? ? ? = min ambient operating fs out tt t i i table 7 shows the values of r6 required for various temperature ranges. table 7. r6 values vs. temperature temp range r6 0c to 70c 10 k ? 40c to +85c 6.2 k ? 55c to +150c 3 k a micropower voltage controlled oscillator the op293 cmos analog switch forms the precision vco of figure 36 . this circuit provides triangle and square wave outputs and draws only 50 a from a single 5 v supply. a1 acts as an i ntegrator; s1 switches the charging current symmetrically to yield positive and negative ramps. the integrator is bounded by a2 , which acts as a schmitt trigger with a precise hysteresis of 1.67 v , set by resistor r5, resistor r6, and resistor r7, and asso ciated cmos switches. the resulting output of a1 is a triangle wave with upper and lower levels of 3.33 v and 1.67 v. the output of a2 is a square wave with almost rail - to - rail swing. with the components shown, frequency of operation is given by the equati on: f out = v control v 10 hz/v however, the frequency can easily be changed by varying c1. the circuit operates well up to 500 hz. 8 4 1 2 3 6 5 7 5v s3 s4 s1 1 in/out 2 out/in cont 12 out/in 10 3 out/in s2 cont 13 4 in/out 6 cont 5 cont 7 in/out 8 in/out 11 out/in 9 14 5v 5v cd4066 5v ? + ? + 5v square out triangle out a1 1/2 op293 a2 1/2 op293 c1 75nf r5 200k? r1 200k? r7 200k? r6 200k? r8 200k? r4 200k? r3 100k? r2 200k? v control v dd v ss 00295-036 figure 36 . micropower voltage controlled oscillator
op193/op293 rev. c | page 18 of 20 outline dimensions controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equi v alents for reference on ly and are not appropri a te for use in design. compliant t o jedec s t andards ms-012-a a 012407- a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) sea ting plane 0.25 (0.0098) 0.10 (0.0040) 4 1 8 5 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarit y 0.10 figure 37 . 8 - lead standard small outline package [soic_n] narrow body (r - 8) dimensions shown in millimeters and (inches) ordering guide model temperature range package description package option op193fs ?40c to +125c 8- lead soic _n s- suffix (r -8) op193fs- reel ?40c to +125c 8- lead soic _n s- suffix (r -8) op193fs- reel7 ?40c to +125c 8- lead soic _n s- suffix (r -8) OP193FSZ 1 ?40c to +125c 8- lead soic _n s- suffix (r -8) OP193FSZ- reel 1 ?40c to +125c 8- lead soic _n s- suffix (r -8) OP193FSZ- reel7 1 ?40c to +125c 8- lead soic _n s- suffix (r -8) op293es ?40c to +125c 8- lead soic _n s- suffix (r -8) op293es- reel ?40c to +125c 8- lead soic _n s- suffix (r -8) op293es- reel7 ?40c to +125c 8- lead soic _n s- suffix (r -8) op293esz 1 ?40c to +125c 8- lead soic _n s- suffix (r -8) op293esz- reel 1 ?40c to +125c 8- lead soic _n s- suffix (r -8) op293esz- re el7 1 ?40c to +125c 8- lead soic _n s- suffix (r -8) op293fs ?40c to +125c 8- lead soic _n s- suffix (r -8) op293fs- reel ?40c to +125c 8- lead soic _n s- suffix (r -8) op293fs- reel7 ?40c to +125c 8- lead soic _n s-suff ix (r -8) op293fsz 1 ?40c to +125c 8- lead soic _n s- suffix (r -8) op293fsz- reel 1 ?40c to +125c 8- lead soic _n s- suffix (r -8) op293fsz- reel7 1 ?40c to +125c 8- lead soic _n s- suffix (r -8) 1 z = rohs compliant part.
op193/op293 rev. c | page 19 of 20 notes
op193/op293 rev. c | page 20 of 20 notes ? 1995 C 2009 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d00295 -0- 9/09(c)

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