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micropower microprocessor reset circuit with manual reset copyright ? anpec electronics corp. rev. a.2 - oct., 2003 apr3101/2/3 www.anpec.com.tw 1 anpec reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. features general description applications ? ? ? ? ? 1.2v to 6v input voltage range ? ? ? ? ? low quiescent current : less than 1.5 a ? ? ? ? ? high accuracy detection threshold : 1.5% ? ? ? ? ? fixed trimmed reset thresholds for 1.5v, 1.75v, 2.32v, 2.63v, 2.93v, 3.08v, 3.9v, 4.38v. ? ? ? ? ? manual reset input ? ? ? ? ? reset timeout period 250ms ? ? ? ? ? available output configurations - open-drain output - cmos active high output - cmos active low output ? ? ? ? ? sot-23-5 package ? ? ? ? ? no external components pin configuration the apr3101/2/3 are designed to monitor voltage supplies in p and digital systems. the quiescent current is extremely low, typically 1.5 a, making it ideal for portable battery operated equipment. the apr3101/2/3 operate by monitoring the system power supply voltage. when the input voltage drops below a fixed threshold or whenever manual reset is asserted, the device asserts a reset signal for a fixed time pe- riod after vcc rises above the fixed threshold or manual reset is deasserted. the apr3101/2/3 series is avail- able with three output stage versions:apr3101 push- pull active low output, apr3102 push-pull active high output and apr3103 open drain active low output. the apr3101/2/3 also have a debounced manual reset input that is provided to override the reset monitor. they are also designed to reject fast line transient glitches on vcc. the apr3101/2/3 are come in a miniature sot-23-5 package. nc gnd mr v cc 123 4 5 (3101/3) (3102) reset reset sot-23-5 (top view) ? computers ? cell phones ? portable electronics ? p power supply monitoring
copyright ? anpec electronics corp. rev. a.2 - oct., 2003 apr3101/2/3 www.anpec.com.tw 2 ordering and marking information package code b : sot-23-5 temp. range c : 0 to 70 c i : -40 to 85 c handling code tr : tape & reel voltage code : 15 : 1.5v ~ 50 : 5.0v apr3101/2/3 - handling code temp. range package code voltage code date code x x voltage code a1/2/3 apr3101/2/3 b : a:1.5v b:1.75v c:2.32v d:2.63v e:2.93v f:3.08v g:3.9v h:4.38v absolute maximum ratings symbol parameter value unit v cc v cc to gnd -0.3 to 6 v reset to gnd (push-pull output) -0.3 to v cc +0.3 v reset reset to gnd (open drain output) -0.3 to 6 v i cc , i mr maximum continuous input current 20 ma i reset reset/reset current 20 ma dvcc/dt rate of rise of v cc 100 v/ s t j junction temperature range -40 to 150 c t l lead temperature (soldering, 10 second) 260 c r th,ja thermal resistance ? junction to ambient 357 c/w p d power dissipation internally limited w tstg storage temperature range -65 to +150 c pin function descrpition pin no. name description 1 gnd ground connection 2 nc no internal connection reset (apr3101/3) reset output remains low while v cc is below the reset threshold and remains so for a fixed time period after v cc raises above the reset threshold. 3 reset (apr3102) reset output remains high while v cc is below the reset threshold and remains so for a fixed time period after v cc raises above the reset threshold. 4 mr manual reset active low input. a logic low signal on mr asserts a reset condition. asserted reset continues as long as mr is low and for a fixed time period after mr returns high. 5 v cc supply voltage (+1.2v to +6v) note: the pin sequence here might not be correct for all different package types, and please refer pin configuration in page1 for correct pin assignment.
copyright ? anpec electronics corp. rev. a.2 - oct., 2003 apr3101/2/3 www.anpec.com.tw 3 block diagram v c c mr gnd v ref res et generator + timer oscillator reset apr3102 v c c mr gnd v ref res et generator + timer oscillator reset apr3101 v c c mr gnd v ref res et generator + timer oscillator reset apr3103
copyright ? anpec electronics corp. rev. a.2 - oct., 2003 apr3101/2/3 www.anpec.com.tw 4 part number part description apr3101 reset output push pull active low with delay apr3102 reset output push pull active high with delay apr3103 reset output open drain active low with delay apr3101/2/3 symbol parameter test conditions min. typ. max. unit v cc supply voltage 1.2 6 v i cc supply current v cc =1.5v~6v 1.5 4 a t a =-40 to 85c 3 5 t a =25c 1.5% v th reset threshold t a =-40 to 85c 2% v hyst hysteresis range 20 mv t rtp reset timeout period 150 250 350 ms v ol reset output low i sink =1.2ma 0.5 v v oh reset output high i source =0.6ma 0.8*v cc t d v cc to reset delay v cc =v th to (v th -100mv) 25 s i le reset output leakage 0.5 a t mpw mr minimum pulse width 10 s t mrd mr to reset delay 0.5 s v mil mr input low threshold 0.4* v cc v v mih mr input high threshold 0.5* v cc r mr mr pull-up resistance 30 47 70 k ? application circuit v cc v cc gnd 100k apr3103 reset reset input p v cc gnd part number description electrical characteristics v in = 5v, t a = -40 to 85 c unless otherwise noted. typical values are at t a =25 c, v cc = 5v for 4.38v versions, v cc = 3.3v for 3.08/2.93v versions, v cc = 3.0v for 2.63v. versions and v cc = 2.5v for 2.32v versions, v cc = 2.0v for 1.75v versions , v cc = 1.8v for 1.5v versions. v cc v cc gnd reset (reset) reset input p v cc gnd apr3101 apr3102
copyright ? anpec electronics corp. rev. a.2 - oct., 2003 apr3101/2/3 www.anpec.com.tw 5 vcc mr reset reset timeout period 250ms mr to reset delay 0.5us vcc to reset delay 25us reset threshold reset threshold reset timeout period 250ms reset (apr3102) (apr3101/3) timing chart
copyright ? anpec electronics corp. rev. a.2 - oct., 2003 apr3101/2/3 www.anpec.com.tw 6 0 5 10 15 20 25 30 35 40 45 50 0123456 vcc=2.9v vcc=2v vcc=2.5v vcc=1.5 0 10 20 30 40 50 60 70 0123456 vcc=4v vcc=3v vcc=5v 0 0.4 0.8 1.2 1.6 2 0123456 0 20 40 60 80 100 120 10 100 1000 typical characteristics supply current vs. supply voltage supply current (ua) supply voltage (v) maximum transient duration vs. reset threshold overdrive vth - vcc reset threshold overdrive vth - vcc (mv) maximum transient duration (us) output source current vs. reset high output voltage reset high output voltage (v) output source current (ma) output sink current vs. reset low output voltage reset low output voltage (v) output sink current (ma) generate a reset signal never generate a reset signal
copyright ? anpec electronics corp. rev. a.2 - oct., 2003 apr3101/2/3 www.anpec.com.tw 7 0 0.5 1 1.5 2 2.5 3 3.5 -40-200 20406080100120 vcc =3v vcc =5v 0 100 200 300 400 500 600 -40-200 20406080100120 0.994 0.996 0.998 1 1.002 1.004 1.006 1.008 -40 -20 0 20 40 60 80 100 120 0 10 20 30 40 50 60 -40-20 0 20406080100120 vod=100mv typical characteristics normalized reset threshold vs. temperature temperature ( c) normalized reset threshold (%) supply current vs. temperature reset timeout period vs. temperature reset propagation delay vs. temperature reset propagation delay (us) temperature ( c) temperature ( c) reset timeout period (ms) temperature ( c) supply current (ua)
copyright ? anpec electronics corp. rev. a.2 - oct., 2003 apr3101/2/3 www.anpec.com.tw 8 typical characteristics power up vcc(2v/div) reset(2v/div) mr(2v/div) reset(2v/div) mr(2v/div) vcc(2v/div) time (50ms/div) time (500ms/div) power down vcc(2v/div) reset(2v/div) mr(2v/div) time (0.2us/div) mr to reset delay time (10us/div) vcc to reset delay vcc(0.5v/div) vcc=v th to (v th -100mv) reset(2v/div)
copyright ? anpec electronics corp. rev. a.2 - oct., 2003 apr3101/2/3 www.anpec.com.tw 9 time (100ms/div) typical characteristics manual reset vcc(2v/div) reset(2v/div) mr(2v/div)
copyright ? anpec electronics corp. rev. a.2 - oct., 2003 apr3101/2/3 www.anpec.com.tw 10 reset v cc gnd v cc 100k application information v cc transient rejection the apr3101/2/3 have the function to reject the tran- sient glitches from the power line. the maximum tran- sient duration vs. reset threshold overdrive shows at typical characteristics. the transient voltage with the duration under the curve will not generate a reset signal, e.g. a transient of 100mv below the reset threshold voltage have the duration more than 35us, it will generate a reset signal. connect a 0.1uf bypass capacitor to the v cc pin can improve the transient immunity. manual reset input the apr3101/2/3 have 3 output stage versions: apr3101 is an active low push-pull output,when the v cc drops below the reset threshold or mr goes low, the reset output generates a low signal. apr3102 is an active high push-pull output, when the v cc drops below the reset threshold or mr goes low; the re- set output generates a high signal (see timing chart). apr3103 is an active low open drain output, the re- set output must be connected a pull-up resistor to a supply voltage that is lower than 6v, it suits to use in multiple voltage systems (see figure 2). the apr3101 reset output is valid until the v cc =1.2v, below 1.2v the ic is shutdown, and the output becomes a floating state. if it is a trouble, a resistor should be connected from reset output to ground to keep the reset output low (see figure 1). for the apr3102, a pull-up resis- tor to v cc is required to keep the valid reset output for v cc below 1.2v. figure 1. ensuring reset valid to v cc = 0 v reset output v cc apr3103 reset gnd mr +3.3v +5.0v v cc gnd reset input 5v system 100k figure 2. apr3103 open drain output with multiple supplies force the mr low asserts the reset signal, asserted reset continues as long as mr is low and after the mr goes high the reset signal is maintained for a fixed timeout period. the mr is internally connected a 47k ? resistor to v cc , so it can be floating if mr is not used. the mr input also has a debounce time 500ns to avoid the glitches. it allows use of a mechanical switch or a ttl, and cmos logic signal.
copyright ? anpec electronics corp. rev. a.2 - oct., 2003 apr3101/2/3 www.anpec.com.tw 11 packaging information sot-23-5 e1 e1 e b 12 3 4 5 e d a2 a a1 l 2 l l 1 a millimeters inches dim min. max. min. max. a 0.95 1.45 0.037 0.057 a1 0.05 0.15 0.002 0.006 a2 0.90 1.30 0.035 0.051 d2.83.00 0.110 0.118 e2.63.00 0.102 0.118 e1 1.5 1.70 0.059 0.067 l 0.35 0.55 0.014 0.022 l1 0.20 bsc 0.008 bsc l2 0.5 0.7 0.020 0.028 n5 5 0 10 0 10
copyright ? anpec electronics corp. rev. a.2 - oct., 2003 apr3101/2/3 www.anpec.com.tw 12 physical specifications reference jedec standard j-std-020a april 1999 reflow condition (ir/convection or vpr reflow) pre-heat temperature 183 c peak temperature time temperature classification reflow profiles convection or ir/ convection vpr average ramp-up rate(183 c to peak) 3 c/second max. 10 c /second max. preheat temperature 125 25 c) 120 seconds max temperature maintained above 183 c 60 ? 150 seconds time within 5 c of actual peak temperature 10 ?20 seconds 60 seconds peak temperature range 220 +5/-0 c or 235 +5/-0 c 215-219 c or 235 +5/-0 c ramp-down rate 6 c /second max. 10 c /second max. time 25 c to peak temperature 6 minutes max. package reflow conditions pkg. thickness 2.5mm and all bgas pkg. thickness < 2.5mm and pkg. volume 350 mm3 pkg. thickness < 2.5mm and pkg. volume < 350mm3 convection 220 +5/-0 c convection 235 +5/-0 c vpr 215-219 c vpr 235 +5/-0 c ir/convection 220 +5/-0 c ir/convection 235 +5/-0 c terminal material solder-plated copper (solder material : 90/10 or 63/37 snpb) lead solderability meets eia specification rsi86-91, ansi/j-std-002 category 3.
copyright ? anpec electronics corp. rev. a.2 - oct., 2003 apr3101/2/3 www.anpec.com.tw 13 r eliability test program test item method description solderability mil-std-883d-2003 245 c , 5 sec holt mil-std-883d-1005.7 1000 hrs bias @ 125 c pct jesd-22-b, a102 168 hrs, 100 % rh , 121 c tst mil-std-883d-1011.9 -65 c ~ 150 c, 200 cycles esd mil-std-883d-3015.7 vhbm > 2kv, vmm > 200v latch-u p jesd 78 10m s , i tr > 100ma carrier tape a j b t2 t1 c t ao e w po p ko bo d1 d f p1 a pp lication a b c j t1 t2 w p e 178 172 1.0 13.0 + 0.2 2.5 0.15 8.4 2 1.5 0.3 8.0+ 0.3 - 0.3 4 0.1 1.75 0.1 f d d1 po p1 ao bo ko t sot-23-5 3.5 0.05 1.5 +0.1 1.5 +0.1 4.0 0.1 2.0 0.1 3.15 0.1 3.2 0.1 1.4 0.1 0.2 0.03
copyright ? anpec electronics corp. rev. a.2 - oct., 2003 apr3101/2/3 www.anpec.com.tw 14 application carrier width cover tape width devices per reel sot- 23 8 5.3 3000 cover tape dimensions anpec electronics corp. head office : 5f, no. 2 li-hsin road, sbip, hsin-chu, taiwan, r.o.c. tel : 886-3-5642000 fax : 886-3-5642050 taipei branch : 7f, no. 137, lane 235, pac chiao rd., hsin tien city, taipei hsien, taiwan, r. o. c. tel : 886-2-89191368 fax : 886-2-89191369 customer service

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