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november 2012 doc id 1703 rev 3 1/15 AN280 application note controlling voltage transients in full-bridge driver applications by thomas hopkins introduction in applications that involve fast switching of inductive loads, designers must consider the voltage transients that are generated in such applications.to insure a reliable design, the voltage transients must be limited to a level that is within the safe operating conditions of the switching device. this application note discusses the sources of voltage transients in full- bridge applications and techniques that can be used to limit these overvoltage conditions to safe levels. special attention is given to applications using monolithic implementations of full-bridge circuits like the stmicroelectronics l6201, l6202 and l6203. in this note the example circuits generally show the l6203, but the same circuit can be used with the l6201 and the l6202. www.st.com
contents AN280 2/15 doc id 1703 rev 3 contents 1 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 source of voltage transients . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 power supply filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1 operating voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 snubber design considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.1 current in the snubber circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5 conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
AN280 list of figures doc id 1703 rev 3 3/15 list of figures figure 1. dc motor drive circuit using the l6203. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 figure 2. output switching waveform for the l6203 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 3. parasitic wiring inductances in dc motor drive circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 4. enable input and motor current for examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 5. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 6. v 01 - v 02 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 7. supply voltage with 0.2 f bypass capacitor on supply pin . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 8. v 01 - v 02 with 0.2 f bypass capacitor on supply pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 9. rc snubber circuit on output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 10. supply voltage with snubber . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 11. v 01 - v 02 with snubber . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 12. turn-on 2.0 a/div . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 13. turn-off 2.0 a/div . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
maximum ratings AN280 4/15 doc id 1703 rev 3 1 maximum ratings the maximum voltage rating for the bridge driver can be derived from the maximum ratings of the devices used in the output stage and are generally the bv ceo or bv dss of the power devices. in addition to the maximum allowable voltage across the output device, additional limits may be needed on the maximum output voltage above supply or below ground, depending on the implementation of the output stage. as an example of a full-bridge circuit, consider the stmicroelectronics l6201, l6202 and l6203. these devices are full-bridge drivers implemented with dmos transistors on a monolithic structure. using these devices full-bridge drive circuits, like shown in figure 1 , are easily implemented. the device has a maximum rating for the supply voltage of 60 v, which implies a maximum bv dss for the output devices of 60 v. in addition, due to the monolithic implementation, the voltage between the two output terminals must not exceed 60 v. therefore, the maximum ratings that must be considered for the application are: v supply : 60 v v ds any output: 60 v v 01 - v 02 : 60 v similar maximum ratings exists for any full-bridge application, with the exception of the differential output voltage limit, which doesn?t exist for discrete implementations. figure 1. dc motor drive circuit using the l6203 am1516 8 v1
AN280 source of voltage transients doc id 1703 rev 3 5/15 2 source of voltage transients to protect against the overvoltage that may occur as a result of the inductive property of the load, voltage clamps are normally employed to limit the voltage across the output devices. in bridge applications these clamps are normally a diode bridge that clamps the voltage to one diode drop above supply and one diode drop below ground. however, if the diode switches slower than the transistor, there is a short time where neither the transistor nor the diode is conducting and the voltage rise is limited only by the capacitance on the node. the result is that a voltage overshoot occurs during the time before the diode turns-on. when the bridge is built with dmos power transistors, the intrinsic body diode is often used as the clamp. this is true for the l6201, l6202 and l6203. as can be seen in the figure 2 , the turn-off time of the dmos device in the l6203 is in the range of 25 to 50 ns while the turn-on time of the intrinsic drain to source diode is in the range of 150 ns. this difference in switching time is characteristic of many dmos devices. figure 2. output switching waveform for the l6203 the second main factor contributing to the transients is the parasitic inductance in the wiring or printed circuit board layout. figure 3 shows the parasitic inductances in the dc motor application. when the current flowing in these parasitic inductances is rapidly switched, the inductive property of the wire causes a voltage transient. when large currents are rapidly switched, as with dmos transistors, large voltage transients can be induced across even small parasitic inductances. for an inductive load driven by an h-bridge the change of current in the power supply lead is equal to twice the load current when the bridge is switched off or the bridge is switched from one diagonal pair of transistors being on the other pair. the time that it takes to switch the current is essentially the turn-off time of the output device. in this case the resulting voltage across the inductance is given by the equation: equation 1 am15169v1 vl di dt ---- - l2 il toff ---------- - ?? = ? =
source of voltage transients AN280 6/15 doc id 1703 rev 3 figure 3. parasitic wiring inductances in dc motor drive circuit in fast switching applications, using the l6202, where the switching time is as short as 25 ns, the induced voltage spike can become quite large. for example if the dc motor in figure 3 was driven with 4 a and the bridge was switched off, a parasitic inductance of only 15 nh produces a 5 v spike. since the current is reversed in both the supply and ground leads the device can see a 10 v spike between the power supply pin and chip ground, if the inductance of both wires are the same. as a design example, consider a dc motor driver shown in figure 1 with the following system characteristics: supply voltage: max 46 v, min 38 v peak motor current: 5 a chopping frequency: 50 khz figure 4. enable input and motor current for examples for evaluation, the motor is driven with a peak current of 4 a. figure 4 shows the input signal for the l6202 on the enable pin and the motor current used in the evaluation. here the bridge is energized and the load current is allowed to build up to 4 a. when the 4 a peak is reached, the bridge is disabled and the current decays through the intrinsic diodes in the dmos power stage. all figures in the remainder of this note are taken under these operating conditions. am15170v1 am15171v1
AN280 power supply filtering doc id 1703 rev 3 7/15 3 power supply filtering to reduce the effect of the wiring inductance a good high frequency capacitor can be placed on the board near the bridge circuit to absorb the small amount of inductive energy in the leads. it should be noted that this capacitor is usually required in addition to an electrolytic capacitor, which has poor performance at high frequencies. 3.1 operating voltages figure 5. supply voltage figure 5 and figure 6 show the spike on the power supply pin of the l6203 and the output pins when the bridge was disabled. these waveforms were present when the device was mounted on a printed circuit board where reasonable care was taken in the layout. when a 0.2 f polyester capacitor was connected between the supply and ground pin of the l6203 the voltage spike on the power supply was significantly reduced, as shown in figure 7 . figure 6. v 01 - v 02 am15172v1 am1517 3 v1
power supply filtering AN280 8/15 doc id 1703 rev 3 figure 7. supply voltage with 0.2 f bypass capacitor on supply pin figure 8. v 01 - v 02 with 0.2 f bypass capacitor on supply pin looking at the voltage waveform at the output terminals of the l6202, shown in figure 8 , a large spike is still present. the worst case spike is measured between the output terminals of the device (v out1 - v out2 ) since the spikes above the supply and below ground are both present. after the voltage spike on the power supply was eliminated, the transients on the output must be related to the mismatch of switching times between the diodes and power transistors. to control these spikes two possible alternatives are present 1. use faster diodes 2. use an external circuit to slow the voltage rise time across the output when the transistors are turned off schottky diodes externally connected to the l6203 would more closely match the switching time of the dmos power transistors, but they are expensive and require additional board space. slowing down the output voltage rise time can be accomplished by connecting a snubber network across the output terminals of the device. figure 9 shows the connection for a rc snubbing circuit used with the l6203. with properly selected values the slope of the voltage waveform can be limited to where the diodes have sufficient time to turn on and clamp the remaining inductive energy. am15174v1 am15175v1
AN280 snubber design considerations doc id 1703 rev 3 9/15 4 snubber design considerations the function of the snubber network is to limit the rate of change of the voltage across the motor (output terminals of the l6203) when one of the dmos devices is turned off. using the rc snubbing circuit shown in figure 9 , the rate of change of the voltage on the output is dominated by the capacitor while the resistor is used primarily to limit the peak current flowing through the power transistor when it turns on. figure 9. rc snubber circuit on output the time constant of the motor current is much longer than the switching time, due to the inductance of the motor. at the time of switching the dc motor can be assumed to be a constant current generator equal to the peak current at switching. if this current is switched into the snubber, the voltage across the snubber network jumps to a value equal to the snubber resistance times the motor current. after the initial step, the rate of change is limited by the motor current charging the snubber capacitor. to properly size the snubber network the resistor is selected such that the maximum motor current produces a voltage less than the minimum power supply voltage. if the resistor is larger than this value, the snubber is ineffective since the capacitor doesn?t limit the voltage rise until the voltage has become greater than the power supply. for the design example, the maximum resistance for the snubber is given by the equation: equation 2 the snubber capacitor is calculated from the peak current and the target rise time. the capacitance is given by the equation: equation 3 am15176v1 r max v smin i peak -------------- - 38v 5a ---------- - 7.6 ohm === c ipeak dt dv ------ 5a 150ns 50v ---------------- - 0.015 f == =
snubber design considerations AN280 10/15 doc id 1703 rev 3 when the snubber network is installed in the application the voltage transients on the terminals of the l6203 are greatly reduced, as shown in figure 11 . the drawback of a snubber network of this type is that a current spike flows into the transistor when it is switched on as the capacitor is discharged. the theoretical peak value of this spike is given by the equation: equation 4 figure 10. supply voltage with snubber figure 11. v 01 - v 02 with snubber this peak current flowing in the snubber is added to the load current when the device is turned on and the total peak current in the transistor is the sum of the snubber circuit current plus the load current. in practice, the peak current measured is usually much less than the calculated peak, due to the capacitors internal resistance and the resistor inductance. figure 12 and figure 13 show the peak current in the snubber network in the design example. i v smax r --------------- - 42v 7.5ohm -------------------- - 5.6 a == = am15177v1 am1517 8 v1
AN280 snubber design considerations doc id 1703 rev 3 11/15 4.1 current in the snubber circuit figure 12. turn-on 2.0 a/div the power dissipated in the snubber resistor is the sum of the dissipation during the turn-on and turn-off of the bridge. the resistor dissipation is: equation 5 where i1 = current at turn-on i2 = current at turn-off r = snubber resistor dc = duty cycle of current flow for the design example the power dissipation, not considering the duty cycle is: equation 6 if the device is chopping for only a portion of the time the dissipation in the resistor is reduced. am15179v1 pd i1 2 rdc ?? () i2 2 rdc ?? () + = pd 2.5 () 2 7.5 0.01 ?? () 5 () 2 7.5 0.01 ?? () 0.469 1.875 2.344w = + = + =
snubber design considerations AN280 12/15 doc id 1703 rev 3 figure 13. turn-off 2.0 a/div am151 8 0v1
AN280 conclusion doc id 1703 rev 3 13/15 5 conclusion with the 0.2 f bypass capacitor and the snubber circuit in place the voltage transients measured in the application have been limited to within safe values for the l6202. as shown in figure 10 and figure 11 , the power supply voltage, the voltage across each of the dmos transistors and the voltage across the output of the bridge (v out1 - v out2 ) are all within the maximum rating of the device with some margin. to insure reliable performance of an h-bridge drive circuit, the designer must insure that the device operates within the maximum ratings of the device(s) used in the circuit. one of the critical parameters to consider is the maximum voltage capability of the devices. to maintain the reliability, the voltage transients due to switching inductive loads must be maintained within the ratings of the device. two techniques used to control the voltage transients in fast switching applications are proper bypass filtering of the power supply and snubbing the outputs to control voltage rise times. using these two techniques the voltage transients in a dmos bridge application can be controlled to within safe levels.
revision history AN280 14/15 doc id 1703 rev 3 6 revision history table 1. document revision history date revision changes 24-jan-2004 1 initial release. 13-jul-2004 2 changed title in cover page. 07-nov-2012 3 minor text changes. added references to the l6201 and l6202 devices. revised equation 1 .
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