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? semiconductor components industries, llc, 2008 december, 2008 ? rev. 8 1 publication order number: NB6L16/d NB6L16 2.5v / 3.3v multilevel input to differential lvpecl/lvnecl clock or data receiver/ driver/translator buffer the NB6L16 is a high precision, low power ecl differential clock or data receiver/driver/translator buffer. the device is functionally equivalent to the el16, ep16, lvel16 and nbsg16 devices. with output transition times of 70 ps, it is ideally suited for high frequency, low power systems. the device is targeted for backplane buffering, gbe clock/data distribution, fibre channel distribution and sonet clock/data distribution applications. input accept lvnecl (negative ecl), lvpecl (positive ecl), lvttl, lvcmos, cml, or lvds. outputs are 800 mv ecl signals. the v bb pin, an internally generated voltage supply, is available to this device only. for single ? ended input conditions, the unused differential input is connected to v bb as a switching reference voltage. v bb may also rebias ac coupled inputs. when used, decouple v bb and v cc via a 0.01 f capacitor and limit current sourcing or sinking to 0.5 ma. when not used, v bb should be left open. features ? input clock frequency 6 ghz ? input data rate frequency 6 gb/s ? low 12 ma typical power supply current ? 70 ps typical rise/fall times ? 130 ps input propagation delay ? on ? chip reference for ecl single ? ended input ? v bb output ? pecl mode operating range: v cc = 2.375 v to 3.465 v with v ee = 0 v ? necl mode operating range: v cc = 0 v with v ee = ? 2.375 v to ? 3.465 v ? open input default state ? lvds, lvpecl, lvnecl, lvcmos, lvttl and cml input compatible ? pb ? free packages are available a = assembly location l = wafer lot y = year w = work week = pb ? free package marking diagrams* 6l16 alyw soic ? 8 d suffix case 751 1 8 tssop ? 8 dt suffix case 948r 1 8 1 8 *for additional marking information, refer to application note and8002/d. 1 8 see detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet. ordering information http://onsemi.com http://onsemi.com 6l16 alyw (note: microdot may be in either location)
NB6L16 http://onsemi.com 2 1 2 3 45 6 7 8 q d nc figure 1. pinout (top view) and logic diagram v bb r2 r2 r1 r1 v ee q d v cc table 1. pin description pin name i/o default state description 1 nc ? ? no connect. the nc pin is electrically connected to the die and must be left open. 2 d lvds, cml, lvpecl, lvnecl, lvttl, lvcmos input low non ? inverted differential clock/data input. internal 75 k to v cc and 37.5 k to v ee . 3 d lvds, cml, lvpecl, lvnecl, lvttl, lvcmos input high inverted differential clock/data input. internal 37.5 k to v cc and 75 k to v ee . 4 v bb ? ? internally generated ecl reference voltage supply. 5 v ee ? ? negative power supply voltage. 6 q ecl output inverted differential ecl output. typically terminated with 50 resistor to v cc ? 2.0 v. 7 q ecl output non ? inverted differential ecl output. typically terminated with 50 resistor to v cc ? 2.0 v. 8 v cc ? ? positive power supply voltage. table 2. attributes characteristics value internal input default state resistor (r1) 37.5 k internal input default state resistor (r2) 75 k esd protection human body model machine model charged device model > 2 kv > 100 v > 1 kv moisture sensitivity, indefinite time out of drypack (note 1) level 1 flammability rating oxygen index: 28 to 34 ul 94 v ? 0 @ 1.125 in transistor count 167 meets or exceeds jedec spec eia/jesd78 ic latchup test 1. for additional information, see application note and8003/d.
NB6L16 http://onsemi.com 3 table 3. maximum ratings symbol parameter condition 1 condition 2 rating un- its v cc pecl mode power supply v ee = 0 v 3.6 v v ee necl mode power supply v cc = 0 v ? 3.6 v v i pecl mode input voltage necl mode input voltage v ee = 0 v v cc = 0 v v i v cc v i v ee 3.6 ? 3.6 v v i out output current continuous surge 25 50 ma ma v inpp differential input voltage |d ? d | v cc ? v ee 2.8 v v cc ? v ee 2.8 v 2.8 |v cc ? v ee | v i bb v bb sink/source 0.5 ma t a operating temperature range ? 40 to +85 c t stg storage temperature range ? 65 to +150 c ja thermal resistance (junction ? to ? ambient) 0 lfpm 500 lfpm soic ? 8 soic ? 8 190 130 c/w c/w jc thermal resistance (junction ? to ? case) standard board soic ? 8 41 to 44 c/w ja thermal resistance (junction ? to ? ambient) 0 lfpm 500 lfpm tssop ? 8 tssop ? 8 185 140 c/w c/w jc thermal resistance (junction ? to ? case) standard board tssop ? 8 41 to 44 c/w t sol wave solder standard pb ? free 3 sec @ 248 c 3 sec @ 260 c 265 265 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability.
NB6L16 http://onsemi.com 4 table 4. dc characteristics, pecl v cc = 2.5 v, v ee = 0 v (note 4) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max i ee negative power supply current (note 5) 10 12 18 10 12 18 10 12 18 ma v oh output high voltage (note 6) 1350 1450 1550 1400 1500 1600 1450 1550 1650 mv v ol output low voltage (note 6) 565 725 870 630 765 920 690 825 970 mv differential input driven single ? ended (figures 10, 12) (note 8) v th input threshold reference voltage range (notes 2, 7) 1125 v cc ? 75 1125 v cc ? 75 1125 v cc ? 75 mv v ih single ? ended input high voltage v th +75 v cc v th +75 v cc v th +75 v cc mv v il single ? ended input low voltage v ee v th ? 75 v ee v th ? 75 v ee v th ? 75 mv differential inputs driven differentially (figures 11, 13) (note 9) v ihd differential input high voltage 1200 v cc 1200 v cc 1200 v cc mv v ild differential input low voltage v ee v cc ? 75 v ee v cc ? 75 v ee v cc ? 75 mv v cmr input common mode range (differential cross ? point voltage) (note 3) 950 v cc ? 38 950 v cc ? 38 950 v cc ? 38 mv v id differential input voltage (v ihd ? v ild ) 75 2500 75 2500 75 2500 mv i ih input high current d d 50 10 150 150 50 10 150 150 50 10 150 150 a i il input low current d d ? 150 ? 150 ? 5 ? 30 ? 150 ? 150 ? 5 ? 30 ? 150 ? 150 ? 5 ? 30 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. v th is applied to the complementary input when operating in single ? ended mode. 3. v cmr minimum varies 1:1 with v ee , v cmr maximum varies 1:1 with v cc . 4. input and output parameters vary 1:1 with v cc . v ee can vary +0.125 v to ? 1.3 v. 5. all input and output pins left open. 6. all loading with 50 to v cc ? 2.0 v. 7. do not use v bb as a reference voltage for single ? ended pecl signals when operating device at v cc ? v ee < 3.0 v. 8. v th , v ih , and v il parameters must be complied with simultaneously. 9. v ihd , v ild, v id and v cmr parameters must be complied with simultaneously.
NB6L16 http://onsemi.com 5 table 5. dc characteristics, pecl v cc = 3.3 v, v ee = 0 v (note 12) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max i ee negative power supply current (note 13) 10 12 18 10 12 18 10 12 18 ma v oh output high voltage (note 14) 2150 2250 2350 2200 2300 2400 2250 2350 2450 mv v ol output low voltage (note 14) 1365 1525 1670 1430 1565 1720 1490 1625 1770 mv differential input driven single ? ended (figures 10, 12) (note 15) v th input threshold reference voltage range (note 10) 1125 v cc ? 75 1125 v cc ? 75 1125 v cc ? 75 mv v ih single ? ended input high voltage v th +75 v cc v th +75 v cc v th +75 v cc mv v il single ? ended input low voltage v ee v th ? 75 v ee v th ? 75 v ee v th ? 75 mv v bb output voltage reference 1880 1980 2070 1880 1980 2070 1880 1980 2070 mv differential inputs driven differentially (figures 11, 13) (note 16) v ihd differential input high voltage 1200 v cc 1200 v cc 1200 v cc mv v ild differential input low voltage v ee v cc ? 75 v ee v cc ? 75 v ee v cc ? 75 mv v cmr input common mode range (differential cross ? point voltage) (note 11) 950 v cc ? 38 950 v cc ? 38 950 v cc ? 38 mv v id differential input voltage (v ihd ? v ild ) 75 2500 75 2500 75 2500 mv i ih input high current d d 50 10 150 150 50 10 150 150 50 10 150 150 a i il input low current d d ? 150 ? 150 ? 5 ? 30 ? 150 ? 150 ? 5 ? 30 ? 150 ? 150 ? 5 ? 30 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 10. v th is applied to the complementary input when operating in single ? ended mode. 11. v cmr minimum varies 1:1 with v ee , v cmr maximum varies 1:1 with v cc . 12. input and output parameters vary 1:1 with v cc . v ee can vary +0.925 v to ? 0.5 v. 13. all input and output pins left open. 14. all loading with 50 to v cc ? 2.0 v. 15. v th , v ih , and v il parameters must be complied with simultaneously. 16. v ihd , v ild, v id and v cmr parameters must be complied with simultaneously.
NB6L16 http://onsemi.com 6 table 6. dc characteristics, necl v cc = 0 v, v ee = ? 3.465 v to ? 2.375 v (note 19) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max i ee negative power supply current (note 21) 10 12 18 10 12 18 10 12 18 ma v oh output high voltage (note 20) ? 1150 ? 1050 ? 950 ? 1100 ? 1000 ? 900 ? 1050 ? 950 ? 850 mv v ol output low voltage (note 20) ? 1935 ? 1775 ? 1630 ? 1870 ? 1735 ? 1580 ? 1810 ? 1675 ? 1530 mv differential input driven single ? ended (figures 10, 12) (note 22) v th input threshold reference voltage range (note 10) v ee +1125 v cc ? 75 v ee +1125 v cc ? 75 v ee +1125 v cc ? 75 mv v ih single ? ended input high voltage v th +75 v cc v th +75 v cc v th +75 v cc mv v il single ? ended input low voltage v ee v th ? 75 v ee v th ? 75 v ee v th ? 75 mv v bb output voltage reference ? 1420 ? 1320 ? 1230 ? 1420 ? 1320 ? 1230 ? 1420 ? 1320 ? 1230 mv differential inputs driven differentially (figures 11, 13) (note 23) v ihd differential input high voltage v ee + 1200 v cc v ee + 1200 v cc v ee + 1200 v cc mv v ild differential input low voltage v ee v cc ? 75 v ee v cc ? 75 v ee v cc ? 75 mv v cmr input common mode range (differential cross ? point voltage) (note 11) v ee + 950 v cc ? 38 v ee + 950 v cc ? 38 v ee + 950 v cc ? 38 mv v id differential input voltage (v ihd ? v ild ) 75 2500 75 2500 75 2500 mv i ih input high current d d 50 10 150 150 50 10 150 150 50 10 150 150 a i il input low current d d ? 150 ? 150 ? 5 ? 30 ? 150 ? 150 ? 5 ? 30 ? 150 ? 150 ? 5 ? 30 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 17. v th is applied to the complementary input when operating in single ? ended mode. 18. v cmr minimum varies 1:1 with v ee , v cmr maximum varies 1:1 with v cc . 19. input and output parameters vary 1:1 with v cc . 20. all loading with 50 to v cc ? 2.0 v. 21. all input and output pins left open. 22. v th , v ih , and v il parameters must be complied with simultaneously. 23. v ihd , v ild, v id and v cmr parameters must be complied with simultaneously.
NB6L16 http://onsemi.com 7 table 7. ac characteristics v cc = 0 v; v ee = ? 3.465 v to ? 2.375 v or v cc = 2.375 v to 3.465 v; v ee = 0 v (note 24) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max v outpp output voltage amplitude f in < 3 ghz (see figures 2 & 3) f in < 6 ghz 500 270 700 350 500 270 700 350 500 270 700 300 mv f data maximum operating data rate 6 gb/s t plh , t phl propagation delay to output differential @ 1 ghz 80 130 180 80 130 180 85 135 185 ps t skew duty cycle skew (note 25) device ? to ? device skew 3 30 25 60 3 30 25 60 3 30 25 60 ps t jitter rms random clock jitter (note 26) f in < 6 ghz peak ? to ? peak data dependent jitter (note 27) f in < 6 gb/s 0.2 2 1 12 0.2 2 1 12 0.2 2 1 12 ps v inpp input voltage swing / sensitivity (differential configuration) (note 28) 75 700 2500 75 700 2500 75 700 2500 mv t r t f output rise/fall times q, q (20% ? 80%) 30 70 120 30 70 120 30 70 120 ps note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 24. measured using a 800 mv source, 50% duty cycle clock source. all loading with 50 to v cc . input edge rates 40 ps (20% ? 80%). 25. see figure 9 t skew = |t plh ? t phl | for a nominal 50% differential clock input waveform. skew is measured between outputs under identical transitions and conditions @ 1 ghz. 26. additive rms jitter with 50% duty cycle clock signal at 6 ghz. 27. additive peak ? to ? peak data dependent jitter with nrz prbs 2 23 ? 1 data rate at 6 gb/s. 28. v inpp(max) cannot exceed v cc ? v ee . (applicable only when v cc ? v ee < 2500 mv). input voltage swing is a single ? ended measurement operating in the differential mode. 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 12345678 output voltage amplitude (v) input clock frequency (ghz) figure 2. output voltage amplitude (v outpp ) versus input clock frequency (f in ) and temperature at v cc ? v ee = 3.3 v 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 12345678 input clock frequency (ghz) figure 3. output voltage amplitude (v outpp ) versus input clock frequency (f in ) and temperature at v cc ? v ee = 2.5 v output voltage amplitude (v) 85 c ? 40 c 25 c ? 40 c 25 c 85 c
NB6L16 http://onsemi.com 8 output voltage amplitude (100 mv/div) time (62 ps/div) figure 4. typical output waveform at 2.488 gb/s with prbs 2 23 ? 1 (total system pk ? pk jitter is 16 ps. device pk ? pk jitter contribution is 3 ps) output voltage amplitude (100 mv/div) time (32 ps/div) figure 5. typical output waveform at 6.125 gb/s with prbs 2 23 ? 1 (total system pk ? pk jitter is 17 ps. device pk ? pk jitter contribution is 4 ps) note: v cc ? v ee = 3.3 v; v in = 700 mv; t a = 25 c. 80 90 100 110 120 130 140 150 160 170 180 190 2.375 2.5 3.3 3.465 propagation delays (ps) power supply voltage (v) figure 6. propagation delay versus power supply voltage and temperature 30 40 50 60 70 80 90 100 110 120 2.375 2.5 3.3 3.465 rise/fall time (ps) power supply voltage (v) figure 7. rise/fall time versus power supply voltage and temperature 10 11 12 13 14 15 16 17 18 ? 40 25 85 figure 8. i ee current versus temperature and power supply voltage temperature ( c) i ee current (ma) 85 c ? 40 c 25 c ? 40 c 25 c 85 c v cc ? v ee = ? 3.465 v v cc ? v ee = ? 2.375 v
NB6L16 http://onsemi.com 9 figure 9. ac reference measurement d d q q t phl t plh v inpp (d) = v ih (d) ? v il (d) v inpp (d ) = v ih (d ) ? v il (d ) v outpp (q) = v oh (q) ? v ol (q) v outpp (q ) = v oh (q ) ? v ol (q ) d v th d v th figure 10. differential input driven single ? ended d d figure 11. differential inputs driven differentially v ihmax v ilmax v ihtyp v thtyp v iltyp v ihmin v ilmin v cc v thmax v thmin gnd v th v ihdmax v ildmax v ihdmin v ildmin v ihdtyp v ildtyp v id = v ihd ? v ild v cmr v cc v cmmax v cmmax gnd figure 12. v th diagram figure 13. v cmr diagram figure 14. typical termination for output driver and device evaluation (see application note and8020/d ? termination of ecl logic devices.) driver device receiver device qd q d z o = 50 z o = 50 50 50 v tt v tt = v cc ? 2.0 v
NB6L16 http://onsemi.com 10 ordering information device package shipping ? NB6L16d soic ? 8 98 units / rail NB6L16dg soic ? 8 (pb ? free) 98 units / rail NB6L16dr2 soic ? 8 2500 / tape & reel NB6L16dr2g soic ? 8 (pb ? free) 2500 / tape & reel NB6L16dt tssop ? 8 100 units / rail NB6L16dtg tssop ? 8 (pb ? free) 100 units / rail NB6L16dtr2 tssop ? 8 2500 / tape & reel NB6L16dtr2g tssop ? 8 (pb ? free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. resource reference of application notes an1405/d ? ecl clock distribution techniques an1406/d ? designing with pecl (ecl at +5.0 v) an1503/d ? eclinps i/o spice modeling kit an1504/d ? metastability and the eclinps family an1568/d ? interfacing between lvds and ecl an1672/d ? the ecl translator guide and8001/d ? odd number counters design and8002/d ? marking and date codes and8020/d ? termination of ecl logic devices and8066/d ? interfacing with eclinps and8090/d ? ac characteristics of ecl devices
NB6L16 http://onsemi.com 11 package dimensions soic ? 8 nb case 751 ? 07 issue aj seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint*
NB6L16 http://onsemi.com 12 package dimensions tssop ? 8 dt suffix plastic tssop package case 948r ? 02 issue a dim min max min max inches millimeters a 2.90 3.10 0.114 0.122 b 2.90 3.10 0.114 0.122 c 0.80 1.10 0.031 0.043 d 0.05 0.15 0.002 0.006 f 0.40 0.70 0.016 0.028 g 0.65 bsc 0.026 bsc l 4.90 bsc 0.193 bsc m 0 6 0 6 seating plane pin 1 1 4 85 detail e b c d a g detail e f m l 2x l/2 ? u ? s u 0.15 (0.006) t s u 0.15 (0.006) t s u m 0.10 (0.004) v s t 0.10 (0.004) ? t ? ? v ? ? w ? 0.25 (0.010) 8x ref k ident k 0.25 0.40 0.010 0.016 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash. protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. terminal numbers are shown for reference only. 6. dimension a and b are to be determined at datum plane -w-. on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 NB6L16/d eclinps is a trademark of semiconductor components industries, llc. literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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