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  r08ds0014ej0100 rev.1.00 page 1 of 22 jun 22, 2012 the mark shows major revised points. the revised points can be easily searched by copying an "" in the pdf file and specifying it in the "find what:" field. preliminary data sheet ps9402 2.5 a output current, high cmr, igbt, power mos fet gate drive, 16-pin ssop photocoupler description the ps9402 is an optically coupled isolator containing a gaalas led on the input side and a photo diode, a signal processing circuit and a power output transistor on the output side on one chip. the ps9402 is designed specifically for high common mode transient immunity (cmr), high output current and high switching speed. the ps9402 includes desaturation detection and active miller clamping functions. the ps9402 is suitable for driving igbts and power mos fets. the ps9402 is in a 16-pin plastic ssop (s hrink s mall o utline p ackage). and the ps9402 is able to high-density (surface) mounting. features ? long creepage distance (8 mm min.) ? large peak output current (2.5 a max., 2.0 a min.) ? high speed switching (t plh , t phl = 200 ns max.) ? uvlo (u nder v oltage l ock o ut) protection with hysteresis ? desaturation detection ? miller clamping ? high common mode transient immunity (|cm h |, |cm l | = 25 kv/ s min.) ? embossed tape product: ps9402-e3: 850 pcs/reel ? pb-free product ? safety standards ? ul approved: no. e72422 ? csa approved: no. ca 101391 ( ca5a, can/csa-c22.2 60065, 60950 ) ? din en60747-5-2 (vde0884 part2) approved: no. 40024069 (option) applications ? igbt, power mos fet gate driver ? industrial inverter ? uninterruptible power supply (ups) r08ds0014ej0100 rev.1.00 jun 22, 2012 v s v cc 1 fault v s cathode anode anode cathode v e v led desat v cc 2 v ee v o v clamp v ee pin connection (top view) 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9
ps9402 chapter title r08ds0014ej0100 rev.1.00 page 2 of 22 jun 22, 2012 package dimensions (unit: mm) 0.20.15 10.360.4 0.64 min. 7.49 +0.5 ?0.1 3.50.2 0.710.3 10.310.5 1.27 0.46 0.1 0.25 m photocoupler construction parameter unit (min.) air distance 8 mm outer creepage distance 8 mm isolation distance 0.4 mm
ps9402 chapter title r08ds0014ej0100 rev.1.00 page 3 of 22 jun 22, 2012 block diagram (unit: mm) uvlo desat shield shield clamp v s v cc 1 fault v s cathode anode anode cathode v e v led desat v cc 2 v ee v o v clamp v ee i f uvlo (v cc 2 ? v ee ) desat (pin 14: desat pin input) fault (pin 3: fault pin output) v o off not active ( > v uvlo+ ) not active high low on not active ( > v uvlo+ ) low ( < v desatth ) high high on not active ( > v uvlo+ ) high ( > v desatth ) low (fault) low on active ( < v uvlo? ) not active high low off active ( < v uvlo? ) not active high low
ps9402 chapter title r08ds0014ej0100 rev.1.00 page 4 of 22 jun 22, 2012 marking example 9402 r nt231 no. 1 pin mark type number assembly lot year assembled (last 1 digit) 2 31 t n rank code in-house code (t: pb-free) week assembled company initial ordering information part number order number solder plating specification packing style safety standard approval application part number *1 ps9402 ps9402-ax pb-free 10 pcs (tape 10 pcs cut) standard products ps9402 ps9402-e3 ps9402-e3-ax (ni/pd/au) embossed tape 850 (ul and csa pcs/reel approved) ps9402-v ps9402-v-ax 10 pcs (tape 10 pcs cut) din en60747-5-2 ps9402-v-e3 ps9402-v-e3-ax embossed tape 850 (vde0884 part2) pcs/reel approved (option) note: *1. for the application of the safety standard, following part number should be used. < r > < r > < r >
ps9402 chapter title r08ds0014ej0100 rev.1.00 page 5 of 22 jun 22, 2012 absolute maximum ratings (t a = 25 c, unless otherwise specified) parameter symbol ratings unit forward current *1 i f 25 ma peak transient forward current (pulse width < 1 s) i f (tran) 1.0 a reverse voltage v r 5 v input supply voltage v cc 1 0 to 5.5 v input ic power dissipation *2 p i 80 mw high level peak output current *3 i oh (peak) 2.5 a low level peak output current *3 i ol (peak) 2.5 a fault output current i fault 8 ma fault pin voltage v fault 0 to v cc 1 v total output supply voltage (v cc 2 ? v ee ) 0 to 33 v negative output supply voltage (v e ? v ee ) 0 to 15 v output voltage v o 0 to v cc 2 v peak clamping sinking current i clamp 1.7 a miller clamping pin voltage v clamp 0 to v cc 2 v desat voltage v desat v e to v e + 10 v output ic power dissipation *4 p o 300 mw isolation voltage *5 bv 5 000 vr.m.s. operating ambient temperature t a ? 40 to +110 c storage temperature t stg ? 55 to +125 c notes: *1. reduced to 0.52 ma/ c at t a = 85 c or more. *2. reduced to 1.6 mw/ c at t a = 75 c or more. *3. maximum pulse width = 10 s, maximum duty cycle = 0.2% *4. reduced to 5.5 mw/ c at t a = 70 c or more. *5. ac voltage for 1 minute at t a = 25 c, rh = 60% between input and output. pins 1-8 shorted together, 9-16 shorted together. recommended operating conditions parameter symbol min. max. unit total output supply voltage (v cc 2 ? v ee ) 15 30 v negative output supply voltage (v e ? v ee ) 0 15 v positive output supply voltage (v cc 2 ? v e ) 15 30 ? (v e ? v ee )v forward current (on) i f (on) 8 12 ma forward voltage (off) v f (off) ? 2 0.8 v operating ambient temperature t a ? 40 110 c < r > < r > < r >
ps9402 chapter title r08ds0014ej0100 rev.1.00 page 6 of 22 jun 22, 2012 electrical characteristics (dc) (a t recommended operating conditions, v ee = v e = gnd, unless otherwise specified) parameter symbol conditions min. typ. *1 max. unit fault logic low output voltage v faultl i fault = 1.1 ma, v cc 1 = 5.5 v 0.1 v fault logic high output current i faulth v fault = 5.5 v, v cc 1 = 5.5 v, t a = 25 c 0.5 a high level output current i oh v o = (v cc 2 ? 4 v) *2 ? 0.5 ? 1.5 a v o = (v cc 2 ? 15 v) *3 ? 2.0 low level output current i ol v o = (v ee + 2.5 v) *2 0.5 1.5 a v o = (v ee + 15 v) *3 2.0 low level output current during fault condition i olf v o ? v ee = 14 v 90 140 230 ma high level output voltage v oh i o = 100 ma *4 v cc 2 ? 3.0 v cc 2 ? 1.3 v i o = ? 650 a *4 v cc 2 ? 2.5 v cc 2 ? 0.8 low level output voltage v ol i o = 100 ma 0.15 0.5 v clamp pin threshold voltage v tclamp 2.0 v clamp low level sinking current i cl v tclamp = v ee + 2.5 v 0.35 1.5 a high level supply current i cc 2 h i o = 0 ma 2 3 ma low level supply current i cc 2 l i o = 0 ma 2 3 ma blanking capacitor charging current i chg v desat = 2 v ? 0.13 ? 0.24 ? 0.33 ma blanking capacitor discharging current i dschg v desat = 7 v 10 30 ma desat threshold v desatth v cc 2 ? v e > v uvlo ? , v o < 5 v 6.0 6.9 7.5 v uvlo threshold v uvlo+ v o > 5 v 11.0 12.6 13.5 v v uvlo ? v o < 5 v 9.8 11.3 12.3 uvlo hysteresis uvlo hys (v uvlo + ) ? (v uvlo ? ) 0.4 1.3 v threshold input current (l h) i flh i o = 0 ma, v o > 5 v 1.5 5 ma threshold input voltage (h l) v fhl i o = 0 ma, v o < 5 v 0.8 v input forward voltage v f i f = 10 ma, t a = 25 c 1.2 1.56 1.8 v input reverse current i r v r = 3 v, t a = 25 c 10 a input capacitance c in f = 1 mhz, v f = 0 v 30 pf notes: *1. typical values at t a = 25 c. *2. maximum pulse width = 50 s, maximum duty cycle = 0.5% *3. maximum pulse width = 10 s, maximum duty cycle = 0.2% *4. v oh is measured with the dc load current in this test ing (maximum pulse width = 1 ms, maximum duty cycle = 20%). < r >
ps9402 chapter title r08ds0014ej0100 rev.1.00 page 7 of 22 jun 22, 2012 switching characteristics (ac) (at recommended operating conditions, v ee = v e = gnd, unless othe rwise specified) parameter symbol conditions min. typ. *1 max. unit propagation delay time (l h) t plh r g = 10 , c g = 10 nf, 50 90 200 ns propagation delay time (h l) t phl f = 10 khz, 50 110 200 ns pulse width distortion (pwd) |t phl ? t plh | duty cycle = 50% *2 , 20 100 ns propagation delay time (difference between any two products) t phl ? t plh i f = 10 ma, v cc 2 = 30 v ? 100 100 ns rise time t r 50 ns fall time t f 50 ns common mode transient immunity at high level output *3 cm h t a = 25 c, i f = 10 ma, v cc 2 = 30 v, v cm = 1.5 kv, c desat = 100 pf, r f = 2.1 k , v cc 1 = 5 v 25 kv/ s common mode transient immunity at low level output *4 cm l t a = 25 c, v f = 0 v, v cc 2 = 30 v, v cm = 1.5 kv, r f = 2.1 k , v cc 1 = 5 v ? 25 kv/ s desat sense to 90% v o delay t desat (90%) c desat = 100 pf, r f = 2.1 k , 250 500 ns desat sense to 10% v o delay t desat (10%) r g = 10 , c g = 10 nf v cc 2 = 30 v 1.5 2 3 s desat sense to low level fault signal delay t desat (fault) 400 800 ns desat sense to desat low propagation delay t desat (low) 250 ns desat input mute *5 t desat (mute) 5 s reset to high level fault v cc 1 = 5.5 v 0.3 1.2 3.0 s signal delay t reset (fault) v cc 1 = 3.3 v 0.5 1.5 4.0 s notes: *1. typical values at t a = 25 c. *2. this load condition is equivale nt to the igbt load at 1 200 v/150 a. *3. common mode transient immunity in the high state is the maximum tolerable dv cm /dt of the common mode pulse, v cm , to assure that the output will remain in the high state (i.e., v o > 15 v or fault > 2 v). a 100 pf and a 2.1 k ? pull-up resistor is needed in fault detection mode. *4. common mode transient immunity in the low state is the maximum tolerable dv cm /dt of the common mode pulse, v cm , to assure that the output will remain in a low state (i.e., v o < 1.0 v or fault < 0.8 v). *5. during muting desat, even if led (if) input occurs , igbt operates turn-off and vo state is kept to low. after unmuting this desat, when led is turned on, vo /fault becomes high state (with automatic reset). < r >
ps9402 chapter title r08ds0014ej0100 rev.1.00 page 8 of 22 jun 22, 2012 test circuit 1 v s v cc 1 fault v s cathode anode anode cathode v e v led desat v cc 2 v ee v o v clamp v ee 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 v s v cc 1 fault v s cathode anode anode cathode v e v led desat v cc 2 v ee v o v clamp v ee 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 v s v cc 1 fault v s cathode anode anode cathode v e v led desat v cc 2 v ee v o v clamp v ee 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 v faultl i f i f v oh v cc 2 i oh v cc 2 v ol v cc 2 v s v cc 1 fault v s cathode anode anode cathode v e v led desat v cc 2 v ee v o v clamp v ee 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 v s v cc 1 fault v s cathode anode anode cathode v e v led desat v cc 2 v ee v o v clamp v ee 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 v s v cc 1 fault v s cathode anode anode cathode v e v led desat v cc 2 v ee v o v clamp v ee 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 i faulth i ol v cc 2 v cc 1 i f 2 v cc 1 v o 0.1 f v o i o i o 0.1 f 0.1 f 0.1 f fig. 1 v faultl test circuit fig. 3 i oh test circuit fig. 5 v oh test circuit fig. 6 v ol test circuit fig. 4 i ol test circuit fig. 2 i faulth test circuit < r >
ps9402 chapter title r08ds0014ej0100 rev.1.00 page 9 of 22 jun 22, 2012 test circuit 2 v s v cc 1 fault v s cathode anode anode cathode v e v led desat v cc 2 v ee v o v clamp v ee 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 v s v cc 1 fault v s cathode anode anode cathode v e v led desat v cc 2 v ee v o v clamp v ee 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 i f i f i cl v s v cc 1 fault v s cathode anode anode cathode v e v led desat v cc 2 v ee v o v clamp v ee 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 i f i cc2h i cc2l i chg 2 v v s v cc 1 fault v s cathode anode anode cathode v e v led desat v cc 2 v ee v o v clamp v ee 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 v s v cc 1 fault v s cathode anode anode cathode v e v led desat v cc 2 v ee v o v clamp v ee 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 v s v cc 1 fault v s cathode anode anode cathode v e v led desat v cc 2 v ee v o v clamp v ee 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 i dschg 7 v 2.5 v v desat v cc 2 v cc 2 v cc 2 v cc 2 v cc 2v cc 2 0.1 f 0.1 f 0.1 f 0.1 f 0.1 f 0.1 f fig. 7 i cc2h test circuit fig. 9 i chg test circuit fig. 11 i cl test circuit fig. 12 v desat test circuit fig. 10 i dschg test circuit fig. 8 i cc2l test circuit  < r >
ps9402 chapter title r08ds0014ej0100 rev.1.00 page 10 of 22 jun 22, 2012 test circuit 3 v s v cc 1 fault v s cathode anode anode cathode v e v led desat v cc 2 v ee v o v clamp v ee 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 i f v s v cc 1 fault v s cathode anode anode cathode v e v led desat v cc 2 v ee v o v clamp v ee 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 i f v s v cc 1 fault v s cathode anode anode cathode v e v led desat v cc 2 v ee v o v clamp v ee 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 i f 10 10 nf i f v out fault v deset 90% 10% 50% 50% 50% t deset (low) t deset (mute) t deset (10%) t deset (90%) t reset (fault) t deset (fault) v s v cc 1 fault v s cathode anode anode cathode v e v led desat v cc 2 v ee v o v clamp v ee 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 i f 2.1 k 10 10 nf 100 pf t phl t plh i f v out 90% 50% 10% t r t f v cc 2 v cc 2 v cc 2 v cc 2 v desat ? + v cc 1 = 5 v 0.1 f 0.1 f 0.1 f 0.1 f fig. 13 v uvlo test circuit fig. 15 t plh/ t phl test circuit fig. 17 t plh /t phl test wave forms fig. 18 t desat test wave forms fig. 14 i flh test circuit fig. 17 t desat test circuit < r >
ps9402 chapter title r08ds0014ej0100 rev.1.00 page 11 of 22 jun 22, 2012 test circuit 4 v s v cc 1 fault v s cathode anode anode cathode v e v led desat v cc 2 v ee v o v clamp v ee 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 10 10 nf + ? scope v s v cc 1 fault v s cathode anode anode cathode v e v led desat v cc 2 v ee v o v clamp v ee 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 10 10 nf + ? scope 2.1 k scope v s v cc 1 fault v s cathode anode anode cathode v e v led desat v cc 2 v ee v o v clamp v ee 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 10 10 nf ? + 2.1 k scope v s v cc 1 fault v s cathode anode anode cathode v e v led desat v cc 2 v ee v o v clamp v ee 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 10 10 nf ? + v oh v ol 1 v 15 v 1 500 v v cm 0 v v o (cm h : i f = 10 ma) v o (cm l : i f = 0 ma) t r t f 90% 10% gnd open 0.8 v 2 v 1 500 v v cm 0 v v fault (cm h : i f = 10 ma, desat) v fault (cm l : i f = 0 ma, desat) t r t f 90% 10% v cc 2 v cc 2 v cc 1 v cc 2 100 pf v cc 1 v cc 2 0.1 f 0.1 f 0.1 f 0.1 f 0.1 f 0.1 f fig. 19 cm h test circuit (led1 on) fig. 21 cm h test circuit (led2 on) fig. 23 cm h , cm l test wave forms (led1 on, off) fig. 24 cm h , cm l test wave forms (led2 on, off) fig. 22 cm l test circuit (led2 off) fig. 20 cm l test circuit (led1 off) < r >
ps9402 chapter title r08ds0014ej0100 rev.1.00 page 12 of 22 jun 22, 2012 typical characteristics (t a = 25 c, unless otherwise specified) ambient temperature t a ( c) output ic power dissipation p o (mw) output ic power dissipation vs. ambient temperature 0 50 100 150 200 250 300 350 400 ambient temperature t a ( c) threshold input current i flh (ma) threshold input current vs. ambient temperature 5 4 3 2 1 0 v cc 2 = 30 v, v ee = gnd, v o > 5 v ? 40 ? 200 20406080 100 forward current i f (ma) output voltage v o (v) output voltage vs. forward current v cc = 30 v, v ee = gnd 1 024 35 35 30 25 20 15 10 5 ambient temperature t a ( c) input ic power dissipation p i (mw) input ic power dissipation vs. ambient temperature 25 0 50 75 100 125 0 120 100 80 60 40 20 25 0 50 75 100 125 high level output voltage ? output supply voltage v oh ? v cc 2 (v) high level output current i oh (a) high level output voltage ? output supply voltage vs. high level output current ? 2.5 ? 2.0 ? 1.5 ? 1.0 0.0 ? 0.5 0.0 ? 5 .0 ? 4 .0 ? 3.0 ? 2 .0 ? 1 .0 v cc = 30 v, v ee = gnd, i f = 10 ma ? 40 c t a = 110 c 25 c forward voltage v f (v) forward current i f (ma) forward current vs. forward voltage 1.0 0.01 0.1 1.0 10 100 1.2 1.4 1.6 1.8 2.0 2.2 2.4 t a = +100 c +85 c +50 c +25 c 0 c ? 40 c remark the graphs indicate nominal characteristics.
ps9402 chapter title r08ds0014ej0100 rev.1.00 page 13 of 22 jun 22, 2012 output supply voltage v cc 2 (v) propagation delay time, pulse width distortion vs. output supply voltage propagation delay time t phl , t plh (ns), pulse width distortion (pwd) t phl ? t plh (ns) propagation delay time t phl , t plh (ns), pulse width distortion (pwd) t phl ? t plh (ns) 15 20 25 30 v ee = gnd, i f = 10 ma, r g = 10 , c g = 10 nf, f = 10 khz, duty cycle = 50% 200 150 100 50 0 t phl pwd t plh propagation delay time, pulse width distortion vs. load capacitance load capacitance c g (nf) 01020 30 40 50 v cc 2 = 30 v, v ee = gnd, i f = 10 ma, r g = 10 , f = 10 khz, duty cycle = 50% t phl t plh pwd propagation delay time, pulse width distortion vs. load resistance v cc 2 = 30 v, v ee = gnd, i f = 10 ma, c g = 10 nf, f = 10 khz, duty cycle = 50% t phl pwd t plh load resistance r g ( ) propagation delay time t phl , t plh (ns), pulse width distortion (pwd) t phl ? t plh (ns) propagation delay time t phl , t plh (ns), pulse width distortion (pwd) t phl ? t plh (ns) propagation delay time, pulse width distortion vs. ambient temperature ambient temperature t a ( c) 0 ? 40 ? 20 20 40 60 80 v cc 2 = 30 v, v ee = gnd, i f = 10 ma, r g = 10 , c g = 10 nf, f = 10 khz, duty cycle = 50% t phl t plh 100 pwd 200 150 100 50 0 01020 30 40 50 200 150 100 50 0 200 150 100 50 0 low level output current i ol (a) low level output voltage v ol (v) low level output voltage vs. low level output current 0.0 5.0 4.0 3.0 2.0 1.0 0 0.5 1.0 1.5 2.5 2.0 v cc = 30 v, v ee = gnd, i f = 0 ma ? 40 c 25 c t a = 110 c forward current i f (ma) propagation delay time, pulse width distortion vs. forward current propagation delay time t phl , t plh (ns), pulse width distortion (pwd) t phl ? t plh (ns) 7101316 v cc 2 = 30 v, v ee = gnd, r g = 10 , c g = 10 nf, f = 10 khz, duty cycle = 50% 200 150 100 50 0 t phl pwd t plh remark the graphs indicate nominal characteristics.
ps9402 chapter title r08ds0014ej0100 rev.1.00 page 14 of 22 jun 22, 2012 ambient temperature t a ( c) high level output voltage ? output supply voltage v oh ? v cc 2 (v) high level output voltage ? output supply voltage vs. ambient temperature ? 20 0 20 40 80 60 ? 40 0.0 ? 3.0 ? 2.5 ? 2.0 ? 1.5 ? 1.0 ? 0.5 100 ? 20 0 20 40 80 60 ? 40 100 v cc 2 = 30 v, v ee = gnd, i f = 10 ma ambient temperature t a ( c) high level output current i oh (a) high level output current vs. ambient temperature ambient temperature t a ( c) low level output voltage v ol (v) low level output voltage vs. ambient temperature 0.5 0 0.1 0.2 0.3 0.4 v cc 2 = 30 v, v ee = gnd, i f = 10 ma, i o = 100 ma ambient temperature t a ( c) low level output current i ol (a) low level output current vs. ambient temperature ? 20 0 20 40 80 60 ? 40 100 0 ? 1 ? 7 ? 6 ? 5 ? 4 ? 3 ? 2 v cc 2 = 30 v, v ee = gnd, i f = 10 ma ? 20 0 20 40 80 60 ? 40 100 5 0 1 2 3 4 v cc 2 = 30 v, v ee = gnd, i f = 10 ma ?100 ma i o = ?650 a v o = v cc 2 ? 4 v v o = v ee +15 v v ee +2.5 v v cc 2 ? 15 v ambient temperature t a ( c) high level supply current, low level supply current vs. ambient temperature high level supply current i cch (ma), low level supply current i ccl (ma) ? 20 0 20 40 80 60 ? 40 3.0 2.5 2.0 1.5 1.0 0.5 100 v cc 2 = 30 v, v ee = gnd, v o = open i cc2h (i f = 10 ma) i cc2l (i f = 0 ma) output supply voltage v cc 2 (v) high level supply current, low level supply current vs. output supply voltage high level supply current i cch (ma), low level supply current i ccl (ma) 15 20 30 25 v ee = gnd, v o = open i cc2h (i f = 10 ma) i cc2l (i f = 0 ma) 3.0 2.5 2.0 1.5 1.0 0.5 remark the graphs indicate nominal characteristics.
ps9402 chapter title r08ds0014ej0100 rev.1.00 page 15 of 22 jun 22, 2012 ambient temperature t a ( c) blanking capacitor discharging current i dschg (ma) blanking capacitor discharging current vs. ambient temperature ? 20 0 20 40 80 60 ? 40 100 60 20 30 40 50 v cc 2 = 30 v, v ee = v e = gnd, i f = 0 ma, v desat = 7 v ambient temperature t a ( c) desat threshold v desatth (v) desat threshold vs. ambient temperature ? 20 0 20 40 80 60 ? 40 100 7.5 6.0 6.3 6.9 6.6 7.2 v ee = v e = gnd, v cc 2 > v uvlo ? , v o < 5 v, i f = 10 ma ambient temperature t a ( c) desat sense to 90% v o delay t desat (90%) (ns) ? 20 0 20 40 80 60 ? 40 100 500 0 100 300 200 400 desat sense to 90% v o delay vs. ambient temperature v ee = v e = gnd, r g = 10 , c g = 10 nf, r f = 2.1 k , c desat = 100 pf, v cc 1 = 5 v v cc 2 = 30 v 15 v ambient temperature t a ( c) desat sense to 10% v o delay t desat (10%) ( s) ? 20 0 20 40 80 60 ? 40 100 3.0 0.0 1.0 0.5 2.0 1.5 2.5 desat sense to 10% v o delay vs. ambient temperature v cc 1 = 5 v , v ee = v e = gnd , r g = 10 , c g = 10 nf, r f = 2.1 k , c desat = 100 pf v cc 2 = 30 v 15 v ambient temperature t a ( c) clamp low level sinking current i cl (a) clamp low level sinking current vs. ambient temperature ? 20 0 20 40 80 60 ? 40 100 4 0 1 2 3 v cc 2 = 30 v, v ee = v e = gnd, v t clamp = 2.5 v ambient temperature t a ( c) blanking capacitor charging current i chg (ma) blanking capacitor charging current vs. ambient temperature ? 20 0 20 40 80 60 ? 40 100 ? 0.10 ? 0.35 ? 0.30 ? 0.20 ? 0.25 ? 0.15 v cc 2 = 30 v, v ee = v e = gnd, i f = 10 ma, v desat = 2 v remark the graphs indicate nominal characteristics.
ps9402 chapter title r08ds0014ej0100 rev.1.00 page 16 of 22 jun 22, 2012 i f = 10 ma, v ee = gnd output voltage vs. supply voltage supply voltage v cc 2 ? v ee (v) output voltage v o (v) 0 5 10 15 20 14 12 10 8 6 4 2 0 uvlo hys v uvlo+ v uvlo ? (12.6 v) (11.3 v) load resistance r g ( ) power consumption per cycle e sw ( j) 20 40 30 010 50 8 7 0 1 3 2 5 4 6 power consumption per cycle vs. load resistance q g = 1 000 nc q g = 100 nc q g = 500 nc load resistance r g ( ) desat sense to 10% v o delay t desat (10%) ( s) 20 40 30 10 50 3.0 0.0 1.0 0.5 2.0 1.5 2.5 desat sense to 10% v o delay vs. load resistance v cc 1 = 5 v , v ee = v e = gnd , c g = 10 nf, r f = 2.1 k , c desat = 100 pf v cc 2 = 30 v 15 v load capacitance c g (nf) desat sense to 10% v o delay t desat (10%) ( s) 20 40 30 10 50 12.0 0.0 6.0 3.0 9.0 desat sense to 10% v o delay vs. load capacitance v cc 1 = 5 v , v ee = v e = gnd , r f = 2.1 k , r g = 10 , c desat = 100 pf v cc 2 = 30 v 15 v 0 remark the graphs indicate nominal characteristics.
ps9402 chapter title r08ds0014ej0100 rev.1.00 page 17 of 22 jun 22, 2012 taping specifications (unit: mm) packing: 850 pcs/reel 2.00.5 r 1.0 13.00.2 3.5 21.00.8 3302.0 1001.0 4.5 0.1 3.8 0.1 0.35 10.8 0.1 4.0 0.1 2.0 0.1 11.5 0.1 1.75 0.1 1.55 0.1 24 0.3 16 0.1 10.9 0.1 2.0 0.5 23.9 to 27.4 outer edge of flange 29.51.0 25.51.0 1.5 +0.1 ?0 ps9402-e3 tape direction outline and dimensions (tape) outline and dimensions (reel)
ps9402 chapter title r08ds0014ej0100 rev.1.00 page 18 of 22 jun 22, 2012 recommended mount pad dimensions (unit: mm) part number ps9402 lead bending a lead bending type (gull-wing) for surface mount 9.85 b 1.27 c 0.96 d 1.65 d c b a < r >
ps9402 chapter title r08ds0014ej0100 rev.1.00 page 19 of 22 jun 22, 2012 notes on handling 1. recommended soldering conditions (1) infrared reflow soldering ? peak reflow temperature 260 c or below (package surface temperature) ? time of peak reflow temp erature 10 seconds or less ? time of temperature higher than 220 c 60 seconds or less ? time to preheat temperature from 120 to 180 c 120 30 s ? number of reflows three ? flux rosin flux containing small amount of chlorine (the flux with a maximum chlorine content of 0.2 wt% is recommended.) 12030 s (preheating) 220 c 180 c package surface temperature t ( c) time (s) recommended temperature profile of infrared reflow (heating) to 10 s to 60 s 260 c max. 120 c (2) wave soldering ? temperature 260 c or below (molten solder temperature) ? time 10 seconds or less ? preheating conditions 120 c or below (package surface temperature) ? number of times one (allowed to be dipped in solder including plastic mold portion.) ? flux rosin flux containing small amount of chlorine (the flux with a maximum chlorine content of 0.2 wt% is recommended.) (3) soldering by soldering iron ? peak temperature (lead part temperature) 350 c or below ? time (each pins) 3 seconds or less ? flux rosin flux containing small amount of chlorine (the flux with a maximum chlorine content of 0.2 wt% is recommended.) (a) soldering of leads should be made at the point 1.5 to 2.0 mm from the root of the lead (4) cautions ? fluxes avoid removing the residual flux with freon-based and chlorine-based cleaning solvent. 2. cautions regarding noise be aware that when voltage is applied suddenly between the photocoupler?s input and output at startup, the output transistor may enter the on state, even if the voltage is within the absolute maximum ratings.
ps9402 chapter title r08ds0014ej0100 rev.1.00 page 20 of 22 jun 22, 2012 usage cautions 1. this product is weak for static electricity by designed w ith high-speed integrated circuit so protect against static electricity when handling. 2. board designing (1) by-pass capacitor of more than 0.1 f is used between v cc and gnd near device. also, ensure that the distance between the leads of the photocoupler and capacitor is no more than 10 mm. (2) when designing the printed wiring board, ensure that the pattern of the igbt collectors/emitters is not too close to the input block pattern of the photocoupler. if the pattern is too close to the input block and coupling occurs, a sudden fluctuation in the voltage on the igbt output side might affect the photocoupler?s led input, leading to malfunction or degradation of characteristics. (if the pattern needs to be close to the input block, to prevent the led from lighting during the off state due to the abovementioned coupling, design the input-side circuit so that the bias of the led is reversed, within the range of the recommended operating conditions, and be sure to thoroughly evaluate operation.) 3. make sure the rise/fall time of the forward current is 0.5 s or less. 4. in order to avoid malfunctions, make sure the rise/fall slope of the v cc 2 is 3 v/ s or less. 5. avoid storage at a high te mperature and high humidity. < r > < r >
ps9402 chapter title r08ds0014ej0100 rev.1.00 page 21 of 22 jun 22, 2012 specification of vde marks license document parameter symbol spec. unit climatic test class (iec 60068- 1/din en 60068-1) 40/110/21 dielectric strength maximum operating isolation voltage test voltage (partial discharge test, procedure a for type test and random test) u pr = 1.6 u iorm. , p d < 5 pc u iorm u pr 1 130 1 808 v peak v peak test voltage (partial discharge test, procedure b for all devices) u pr = 1.875 u iorm. , p d < 5 pc u pr 2 119 v peak highest permissible overvoltage u tr 8 000 v peak degree of pollution (din en 60664-1 vde0110 part 1) 2 comparative tracking index (iec 60112/di n en 60112 (vde 0303 part 11)) cti 175 material group (din en 60664 -1 vde0110 part 1) iii a storage temperature range t stg ?55 to +125 c operating temperature range t a ?40 to +110 c isolation resistance, minimum value v io = 500 v dc at t a = 25c v io = 500 v dc at t a max. at least 100c ris min. ris min. 10 12 10 11 safety maximum ratings (ma ximum permissible in case of fault, see thermal derating curve) package temperature current (input current i f , psi = 0) power (output or total power dissipation) isolation resistance v io = 500 v dc at t a = tsi tsi isi psi ris min. 175 400 700 10 9 c ma mw < r >
ps9402 chapter title r08ds0014ej0100 rev.1.00 page 22 of 22 jun 22, 2012 caution gaas products this product uses gallium arsenide (gaas). gaas vapor and powder are hazardous to human health if inhaled or ingested, so please observe the following points. ? follow related laws and ordinances when disposi ng of the product. if there are no applicable laws and/or ordinances, dispose of the product as recommended below. 1. commission a disposal company able to (with a license to) collect, tran sport and dispose of materials that contain arsenic and ot her such industrial waste materials. 2. exclude the product from general industrial waste and household garbage, and ensure that the product is controlled (as industrial waste subjec t to special control) up until final disposal. ? do not burn, destroy, cut, crush, or chemically dissolve the product. ? do not lick the product or in any way allow it to enter the mouth.
all trademarks and registered trademarks are t he property of their respective owners. c - 1 revision history ps9402 data sheet description rev. date page summary 0.01 may 09, 2011 ? first edition issued 1.00 jun 22, 2012 throughout prelimi nary data sheet - > data sheet throughout safety standards approved p.3 modification of block diagram p.4 modification of marking example p.5 modification of absolute maximum ratings p.6 modification of electrical characteristics (dc) p.7 modification of switching characteristics (ac) pp.8 to 11 modification of test circuit pp.12 to 16 addition of typical characteristics p.18 addition of recommended mount pad dimensions p.20 modification of usage cautions p.21 addition of specification of vde marks license document
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