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TB67S145FTG toshiba bicd process integrated circuit silicon monolithic tb6 7 s145f t g serial controlled unipolar stepping motor driver the tb67 s145 is a serial controlled pwm chopping type, 2 phase unipolar stepping motor driver. using the bicd process, the tb67s 145 can be operated with vm voltage of 45v, output voltage of 84v, and output current of 3.0a at max (absolute maximum ratings). features ? bicd process monolithic integrated circuit. ? capable of op erating one unipolar stepping motor ? pwm controlled constant current drive ? full, half step resolution ? low on resistance ( 0.25 (t yp . ) ) output mosfet ? high voltage and current (for specification, p lease refer to the absolute maximum ratings and operation ranges). ? brake mode function ? standby (low power) mode function ? 4 bit - 16 setting torque adjust function ? serial to parallel convert circuit (8bit shift register) built in. ? capable of 3 line logic (data/clock/latch signal) output function ( controllable by cascade connection) ? error detect feedback signal output function (over current/thermal shutdown ). ? error detect function (thermal shutdown(tsd), over current(isd), and low voltage(por). ? built - in vcc regulator for internal circuit use. ? fixed off time can be adjusted by external components. note) please be careful about the thermal conditions during use. p - wqfn48 - 0707 - 0.50 - 003 f t g weight: 0.1 g (typ.) ? 2014 toshiba corporation 1 2 014- 10 - 30
TB67S145FTG pin assignment (tb67 s145 ftg) (*) please mount the four corner pins of the qfn package and the exposed pad to the gnd area of the pcb. (top view) 1 2 3 4 5 6 7 8 9 10 11 12 36 35 3 4 33 32 31 30 29 28 27 26 13 14 15 16 17 18 19 20 21 22 23 24 25 48 47 46 45 44 43 42 41 40 39 38 37 tb67s145 f t g nc ou ta+ nc oscm nc clr nc gate standby brake gnd nc nc nc nc ou ta+ ou ta - ou ta - rsgnda rsgnda outb - outb - outb+ outb+ rsgndb rsgndb vcom vcom nc gnd nc vm nc vcc vcc vref nc err al m nc lout cout dout nc data clock latch nc 2 2 014- 10 - 30
TB67S145FTG tb67s145 block diagram functional blocks/circuits/constants in the block chart etc. may be omitted or simplified for explanatory purposes . d ata clock l at c h clr g ate external brake error detect (tsd/isd) pre tsd serial - parallel converter brake alm ach pre drv bch pre drv ach out nch 3 2 014- 10 - 30
TB67S145FTG application notes all the grounding wires of the device must run on the solder mask on the pcb and be externally terminated at only one point. also, a grounding method should be considered for efficient heat dissipation. careful attentio n should be paid to the layout of the output, vm and gnd traces, to avoid short circuits across output pins or to the power supply or ground. if such a short circuit occurs, the device may be permanently damaged. also, the utmost care should be taken for p attern designing and implementation of the device since it has power supply pins ( vm , rsgnd , out, gnd) through which a particularly large current may run. if these pins are wired incorrectly, an operation error may occur or the device may be destroyed. the logic input pins must also be wired correctly. otherwise, the device may be damaged owing to a current running through the ic that is larger than the specified current. 4 2 014- 10 - 30
TB67S145FTG pin explanations tb67 s145 ftg ( w qfn48) pin no.1 to 28 pin no. pin name function 1 nc non connection 2 nc non connection 3 clr serial register clear pin 4 nc non connection 5 gate register gate pin 6 standby standby control pin 7 brake brake control pin 8 gnd ground pin 9 nc non connection 10 nc non connection 11 nc non con nection 12 nc non connection 13 ou ta+ motor output a+ pin 14 ou ta+ motor output a+ pin 15 rsgnda ach current sense ground pin 16 rsgnda ach current sense ground pin 17 ou ta - motor output a - pin 18 ou ta - motor output a - pin 19 outb - motor output b- pin 20 outb - motor output b - pin 21 rsgndb bch current sense ground pin 22 rsgndb bch current sense ground pin 23 outb+ motor output b+ pin 24 outb+ motor output b+ pin 25 nc non connection 26 vcom common pin 27 vcom common pin 28 nc non conne ction 5 2 014- 10 - 30
TB67S145FTG pin no.29 to 48 pin no. pin name function 29 gnd ground pin 30 nc non connection 31 vm vm power supply pin 32 nc non connection 33 vcc internal vcc regulator monitor pin 34 vcc internal vcc regulator monitor pin 35 vref constant c urrent threshold set pin 36 nc non connection 37 oscm fixed off time set pin 38 err error detect feedback signal output pin 39 alm thermal alarm output pin 40 nc non connection 41 lout serial latch output pin 42 cout serial clock output pin 43 dout shift register data output pin 44 nc non connection 45 data serial data input pin 46 clock serial clock input pin 47 latch serial latch input pin 48 nc non connection note: ? please do not run patterns under nc pins. ? please connect the pins with the same pin name, while using the device. 6 2 014- 10 - 30
TB67S145FTG input/output equivalent circuit pin name input / output equivalent circuit clock data latch clr st andby brake logic input (vih/v il) vih: 3.0v(min) to 5.5v(max) vil : 0v(min) to 2.0v(max) gate logic input (vih/vil) vih: 3.0v(min) to 5.5v(max) vil : 0v(min) to 2.0v(max) err alm logic output (voh/vol) (pullup resistance :10k to 100k ) dout cout lout logic output h igh level : vcc- 0.3v(t yp.) low level : gnd+0.3v( t yp. ) the equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. 100k 1 k gnd logic input 100k gnd logic output vcc logic output gnd logic output gnd vcc 7 2 014- 10 - 30
TB67S145FTG pin name input / output equiv alent circuit vcc vref vcc voltage range 4.75v(m in) to 5.0v(t yp.) to 5.25v(max) vref input voltage range 0v to 4.0v (constant current con trol ) vcc short ( constant current control : off ) oscm oscm frequency setup (reference) 0.8 2 mhz(min ) to 3.2mhz( t yp.) to 8.2mhz(max) (r_oscm=3.9k to 10k to 39k ) outa+ outa - outb+ outb - rs gnd a rs gnd b vcom vm volt age range 10v(min) to 40v(max) out pin voltage range 10v(min) to 80v( max) the equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. 1k vcc gnd vref 500
TB67S145FTG tb67 s145 function explanation serial input (8 bit shift register + 8bit storage register) lsb - msb settings phasea enablea phaseb enableb trq1 trq2 trq3 trq4 functional blocks/circuits/constants in the block chart etc. may be omitted or simplified for explanatory purposes. r d sck q r d sck q r d sck q r d sck q r d sck q r d sck q r d sck q r d sck q r d n sck q r d r ck q r d r ck q r d r ck q r d r ck q r d r ck q r d r ck q r d r ck q r d r ck q clr data clock latch gate dout cout lout phasea enablea phaseb enableb trq 1 trq 2 trq 3 trq 4 9 2 014- 10 - 30
TB67S145FTG serial logic input/output timi ng chart example timing charts may be simplified for explanatory purpose. ic1: serial data (data) is imported to the shift register with the up - edge of serial clock signal. finally, when t he serial latch signal( latch) is asserted , the data in the shift register is exported to the storage register to be reflected to the motor control. cout(clock - out) and lout(latch - out) signal will be output through a buffer. ic2: the motor can be controll ed by using ic1 dout signal as ic2 data , i c1 cout signal as ic2 clock , and i c1 lout signal as ic2 latch. note that the dout(data - out) will be output by down - edge of clock signal; to assure the setup - hold time with cout. (delayed by half cycle of clock.) therefore make sure that the clock signal is set to low after the serial transfer. clock data trq 4 trq 3 trq 1 trq 2 enb phb ena pha latch (clock) (register data) trq 4 trq 3 trq 1 trq 2 enb phb ena pha dout cout (register data) lout ic1 ic2 1 0 0 0 1 1 1 1 1 0 0 0 1 1 1 1 1 0 0 0 1 1 1 1 1 0 0 0 1 1 1 1 10 2 014- 10- 30
TB67S145FTG ? input function data clock clr latch gate x x x x h phasea,phaseb,enablea,enableb,trq1,trq2,trq3,trq4 data = disable. x x x x l phasea,phaseb,enablea,enableb,trq1,trq2,trq3,trq4 data = enable x x l x x shift register and storage registe r is initialized l h x x the first data of the shift register is l, and the other register will be stored with the data before. h h x x the first data of the shift register is h, and the other register will be stored with the data before. x h x x the shift register data will maintain its status. t he data after the shift register(qh) will be output from d_out pin. x x h x shift register data will be stored to the storage register. x x h b? x the storage register data will maintain its status . x : don ? t care ? logic signal explanation internal signal h igh l ow notes enable output: on output: off high: the corresponding channels output will be on low: the corresponding channels output will be off(hi - z) phase out : on outx : off(hi - z) outx : off (hi - z) outx : on h igh: current flows through vm - out ( + ) coil during charge status. l ow: current flows through v m - out ( - ) coil during charge status. standby motor operational ic all functions off the internal oscillator as well as motor output will stop when standby is set to l ow. (the motor cannot be operated.) trq function current ratio trq1 trq2 trq3 trq4 (msb) current ratio (%) l l l l 0 l l l h 5 l l h l 10 l l h h 15 l h l l 25 l h l h 29 l h h l 38 l h h h 43 h l l l 52 h l l h 60 h l h l 67 h l h h 74 h h l l 80 h h l h 86 h h h l 94 h h h h 100 11 2 014- 10- 30
TB67S145FTG brake mode function equivalent circuit(s) may be omitted for explanatory purpose. brake function h brake mode: on l brake mode off (normal operation) ( during constant current control; vref 4.0v ) phase status when brake is set to ? h igh ? iout phase=l - 100% phase=h +100% note) when the phase signal is switched during brake=h, the current flow will also be switched, as shown in the graph above. (for example, when phase is switched from ? low ? to ? high ? , the current control will be switched from out( - ) side to out(+) side.) note) when brake is set to high, the current se tting will be set to 100%; regardless of in1 and in2 input. note) current polarity in the graph is defined as ?plus? when the current flows from vm to out+ during charge status (out+ sid e mosfet is turned on), and is defined as ?minus? when the current flo ws from vm to out - during charge status (out - side mosfet is turned on). ( during constant current control ? off? ; vref - vcc direct connected ) when brake is set to ? high ? ; all four output mosfets (outa+,outa - ,outb+,outb-) will turn on. outa+ outa - outb - outb+ vcom rsgnda rsgndb 12 2 014- 10- 30
TB67S145FTG standby mo de function setting the standby pin will enable the device to be set to standby mode (=low power mode) which will cut all unneccesary internal bais current to reduce power consumption. the isd(over current)/tsd(thermal shutdown) status can also be reset ed by standby. standby function h standby mode: off(normal operation) l standby mode: on(low power mode) the isd(over current)/tsd(thermal shutdown) status will be reseted when standby is set to low or reasserting the vm power source . note) after sta ndby is set to high, the internal circuit will restart from low power mode. therefore it is preferable not to input any logic signal for 10 s, after the standby is set to high. (if the logic signal is input to the device during wake - up period, the device may not be able to receive the signal correctly.) 13 2 014- 10- 30
TB67S145FTG monitor pin functions (err feedback) err fun ction h i - () normal operation l ow error detected (tsd or sd) () the err pin is an open drain logic output. to use the function correctly please make sure the err pin is connected to 3.3v or 5.0v with a pull - up resistance. during normal operation the pin leel will be hi - (internal msfet:ff) (it will show high leel when pulled up) and once an error (tsd or sd) has been detected the pin leel will be low (internal msfet: n). reasserting the vm power supply or using the stb function the err pin will return to the initial status (internal msfet: ff). err pin should be left open when not using the err feedback function. equivalent circuit(s) may be omitted for explanatory purpose. err pin 3.3v or 5v pull - up resistance (10 k to 100k ) err logic [err mosfet] on: tsd or isd detected off: normal operation 14 2 014- 10- 30
TB67S145FTG monitor pin functions (thermal alm feedback) alm function h i - z (*) normal operation l ow thermal alarm detected (*) the alm pin is an open drain logic output. to use the function correctly, please make sure the alm pin is connected to 3.3v o r 5.0v with a pull - up resistance. during normal operation, the pin level will be hi - z (internal mosfet: off) (it will show high level when pulled up), and once the device detects a temperature rise, the pin level will be low (internal mosfet: on). the al m is an auto recovery type output. once the device reaches the alm detect threshold(120 c 15 c ), the pin level will show low (internal mosfet: on), and after the device reaches the alm release threshold (? detect threshold ? -30 c ), the pin level will show hi - z (internal mosfet: off) (it will show high level when pulled up) alm pin should be left open; when not using the thermal alm feedback function. timing charts may be simplifie d for explanatory purpose. equivalent circuit(s) may be omitted for explanatory purpose. pull - up voltage (3.3v or 5v) 120 c (15 c ) 90 c (15 c ) gnd alm pin alm pin 3.3v or 5v pull - up resistance (1 0k to 100k ) alm logic [alm mos fet ] on: alm detect threshold off: normal operation or alm release threshold 15 2 014- 10- 30
TB67S145FTG tb67 s145 setup constant - current threshold setting the constant - current threshold can be set by vref voltage. iout (max)=vref 3/4 example: current setting 100% , vref=2.0v: the constant current thredhold(peak current) will be as shown below. iout = 2.03/4=1.5a to set the constant - current function ?off?, connect the vcc and vref pin directly (do not use any external power supply). also, please be careful abou t the thermal conditions during use. fixed off time setting to set the fixed off time for constant - current pwm control, please connect a pull - down resistance to the oscm pin. the relation between the pull - down resistance(roscm) and fixed off time is a s shown below. (for reference) pull - down resistance (roscm) fixed off time (toff) 3.9k 16 2 014- 10- 30
TB67S145FTG off time for phase switching timing charts may be simplified for explanatory purpose. when the internal phase signal is switched from low to high or high to low (the above timing chart is one example), there is an off time, to avoid both out+ and out - mosf et to turn on at the same time. using the internal system oscillator (foscs=6.4mhz), the switching time is about 3clk (including the synchronous time difference; 1+3clk=4clk at the most): the off time is about 4 70 to 625ns. l1 (out+ mosfet) on out+ out - vcom rsgnd l1 l2 l2 (out - mosfe t) on on off off off off on on off off on constant - current control with l1 side mosfet l1, l2 both off time constant - current control with l2 side mosfet 17 2 014- 10- 30
TB67S145FTG absolute maxim um ratings ( ta=25 c ) characteristics symbol rating unit motor power supply vm(max) 45 v vm - vcom voltage differential vdiff(max) 45 v motor output voltage vout(max) 84 v motor output current (per channel) iout(max) 3.0 a internal logic power supply vcc (max) 6.0 v logic input voltage vin(h)(max) 6.0 v vin(l)(min) - 0.4 v vref input voltage vref(max) 6.0 v open drain output pin (err,alm) voltage vod(max) 6.0 v open drain output pin (err,alm) inflow current iod(max) 20 ma power dissipation (wqfn48; d evice alone) pd 1.3 w operating temperature topr -20 to 85 c storage temperature ts t g -55 to 150 c junction temperature tj(max) 150 c caution the absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. do not exceed any of these ratings. exceeding the rating (s) may cause device breakdown, damage or deterior ation, and may result in injury by explosion or combustion. the value of even one parameter of the absolute maximum ratings should not be exceeded under any circumstances. the device does not have overvoltage detection circuit. therefore, the device is damaged if a voltage exceeding its rated maximum is applied. all voltage ratings, including supply voltages, must always be followed. the other notes and considerations described later should also be referred to. note : about the power dissipation if the ambient temperature is above 25c , the power dissipation must be de - rated by 10.4mw/ c . 18 2 014- 10- 30
TB67S145FTG operation ranges characteristics symbol test condition min typ. max unit motor power supply vm - 10 - 40 v motor output voltage vout - 10 - 80 v motor output current (per channel) iout ta=25 c - 1.5 3.0 a internal logic power supply vcc - 4.75 5.0 5.25 v logic input voltage vin(h) logic input hi gh level 3.0 - 5.5 v vin(l) logic input low level 0 - 2.0 v vref input voltage range vref(range) - gnd - 5.5 v open drain pin voltage range vod(range) err,alm pin 3.0 - 5.5 v open drain pin inflow current range iod(range) err,alm pin - - 10 ma internal oscillator frequency range foscm(range) - 820 3200 8200 khz fixed off time range toff(range) - 5 10 40 s note) please use the device with extra margin regarding the absolute maximum ratings. note) please be careful about the thermal conditions during use. 19 2 014- 10- 30
TB67S145FTG electrical specifications 1 (ta = 25 c, vm = 24 v , unless specif ied otherwise ) characteristics symbol test condition min typ. max unit logic input voltage vih logic input pin (* ) high level 3.0 - 5.5 v vil logic input pin (* ) low level gnd - 2.0 v logic input hysteresis voltage vin(hys) logic input pin (* ) 300 - 500 mv logic input current high iin(h) logic input voltage high level (vin=vih) - 33 55 a low iin(l) logic input voltage low level (vin=vil) - - 1 a power consumption im1 output pins=open vin=vil standby mode - - 1.0 ma im2 output pins=open normal operation mode, full step resolution - 3.0 5.0 ma open drain output pin voltage vod (l) iod=10ma 0 - 0.5 v motor current channel differential S iout1 current differential between channels (iout=1.0a) - 5 0 +5 % motor current setting accuracy S iout2 iout=1.0a - 6 0 +6 % source - drain diode forward voltage vfn iout=2.0a 1.0 - 1.6 v motor output off leak current ileak vout=80v, output mosfet:off - - 1 a motor output on - resistance (low side) ron ( d - s ) iout=2.0a - 0.25 0.35 (*) : vin (h) is defined as the vin voltage that causes the outputs (outa, outb) to change when a pin under test is gradually raised from 0 v. vin (l) is defined as the vin voltage that causes the outputs (outa, outb) to change when the pin is then gradually lowered. the difference between vin (l) and vin (h) is defined as the input hysteresis (vin(hys)). 20 2 014- 10- 30
TB67S145FTG electrical specifications 2 (ta = 25c, v m = 24 v , unless specified otherwise ) characteristics symbol test condition min typ. max unit vcc regulator voltage vcc icc=5.0ma 4.75 5 5.25 v vcc regulator current icc 4.75v vcc 5.25v - 2.5 5.0 ma vref input current iref vref=2.0v - 0 1.0 a thermal shutdown(tsd h threshold ( note1 ) tjtsd - 140 155 170 c vcc recovery voltage vccr - 3.5 4.0 4.5 v vm recovery voltage vmr - 7.0 8.0 9.0 v over - current detection(isd) threshold (note2) isd - 3.1 4.0 5.0 a note 1 ) about thermal shutdown (tsd) when the junction temperature of the device reached the tsd threshold, the tsd circuit is triggered; the internal reset circuit then turns off the output transistors. noise rejection blank ing time is built - in to avoid misdetection. once the tsd circuit is triggered; the detect latch signal can be cleared by reasserting the vm power source, or setting the device to standby mode. the tsd circuit is a backup function to detect a thermal erro r, therefore is not recommended to be used aggressively. note 2 ) about over - current detection (isd) when the output current reaches the threshold, the isd circuit is triggered; the internal reset circuit then turns off the output transistors. once the isd circuit is triggered, the detect latch signal can be cleared by reasserting the vm power source, or setting the device to standby mode. for fail - safe, please insert a fuse to avoid secondary trouble. cautions on overcurrent shutdown (isd) and thermal shutdown (tsd) the isd and tsd circuits are only intended to provide temporary protection against irregular conditions such as an output short - circuit; they do not necessarily guarantee the complete ic safety. if the device is used beyond the specified ope rating ranges, these circuits may not operate properly: then the device may be damaged due to an output short - circuit. the isd circuit is only intended to provide a temporary protection against an output short - circuit. if such condition persists for a lon g time, the device may be damaged due to overstress. overcurrent conditions must be removed immediately by external hardware. back - emf while a motor is rotating, there is a timing at which power is fed back to the power supply. at that timing, the motor c urrent recirculates back to the power supply due to the effect of the motor back - emf. if the power supply does not have enough sink capability, the power supply and output pins of the device might rise above the rated voltages. the magnitude of the motor b ack - emf varies with usage conditions and motor characteristics. it must be fully verified that there is no risk that the device or other components will be damaged or fail due to the motor back - emf. ic mounting do not insert devices incorrectly or in the wrong orientation. otherwise, it may cause breakdown, damage and/or deterioration of the device. 21 2 014- 10- 30
TB67S145FTG ac electrical specifications 2 (ta = 25c, v m = 24 v , unless specified otherwise ) characteristics symbol test condition min typ. max unit minimum ser ial signal pulse width tlogic(twp) data,clock,latch 50 - - ns tlogic(twn) data,clock,latch 50 - - ns minimum serial signal cycle tcyc data,clock,latch 100 - - ns minimum setup time tset1 clr clock 50 - - ns tset2 data clock 50 - - ns tset3 clock la tch 50 - - ns minimum hold time thold1 clock data 50 - - ns thold2 clr internal serial register 50 - - ns output mosfet switching specific (rise time, fall time) tr - 50 100 150 ns tf - 50 100 150 ns analog noise blanking time atblk analog tblank t ime 250 400 550 ns oscm frequency foscm rosc=10k 2720 3200 3680 khz oscs frequency foscs - 5120 6400 7680 khz fixed off time toff foscm=3.2mhz 8.5 10 11.5 s over current (isd) detect masking time tisd(mask) foscs(=6.4mhz)*8clk 1.0 1.25 1.5 s therm al shutdown (tsd) detect masking time ttsd(mask) foscs(=6.4mhz)*32clk 4.0 5.0 6.0 s thermal alarm(alm) detect masking time talm(mask) foscs(=6.4mhz)*16clk 2.0 2.5 3.0 s 22 2 014- 10- 30
TB67S145FTG application circuit example please mount the four corner pins of the qfn package and the exposed pad to the gnd area of the pcb. the application circuit above is an example; therefore, mass - production design is not guaranteed. 100 10k 23 2 014- 10- 30
TB67S145FTG ( for reference ) pd - ta graph (1) ? device alone (2) ? when mounted to a 4 layer glass epoxy board ( p ower dissipation example of rth(j - a)=25 c /w (when mounted); d ependent of board and mount condition . ) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0 25 50 75 100 125 150 power dissipation pd [w] ambient temperature t a [ ] pd - ta graph of TB67S145FTG (2) (1) 24 2 014- 10- 30
TB67S145FTG package dimensions: p - wqfn48 - 0707 - 0.50 - 003 (unit: mm) weight: 0.1 g (typ.) 25 2 014- 10- 30
TB67S145FTG notes on contents block diagrams some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purposes. equivalent circuits the equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. timing charts timing charts may be simplified for explanatory purposes. applicatio n circuits the application circuits shown in this document are provided for reference purposes only. thorough evaluation is required, especially at the mass - production design stage. toshiba does not grant any license to any industrial property rights by pr oviding these examples of application circuits. test circuits components in the test circuits are used only to obtain and confirm the device characteristics. these components and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment. ic usage considerations notes on handling of ics (1) the absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. do not exceed any of these ratings.exceeding the rating(s) may cause device breakdown, damage or deterioration, and may result in injury by explosion or combustion. (2) use an appropriate power supply fuse to ensure that a large current does not continuously flow in the case of overcurrent and/or ic failure. the ic will fully break down when used under conditions that exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring or load, causing a large current to continuously flow and the breakdown can lead to smoke or ignition. to minimize the effects of the flow of a large current in the case of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit location, are required. (3) if your design inc ludes an inductive load such as a motor coil, incorporate a protection circuit into the design to prevent device malfunction or breakdown caused by the current resulting from the inrush current at power on or the negative current resulting from the back el ectromotive force at power off. ic breakdown may cause injury, smoke or ignition. use a stable power supply with ics with built - in protection functions. if the power supply is unstable, the protection function may not operate, causing ic breakdown. ic brea kdown may cause injury, smoke or ignition. (4) do not insert devices in the wrong orientation or incorrectly. make sure that the positive and negative terminals of power supplies are connected properly. otherwise, the current or power consumption may ex ceed the absolute maximum rating, and exceeding the rating(s) may cause device breakdown, damage or deterioration, and may result in injury by explosion or combustion. in addition, do not use any device inserted in the wrong orientation or incorrectly to w hich current is applied even just once. (5) carefully select external components (such as inputs and negative feedback capacitors) and load components (such as speakers), for example, power amp and regulator. if there is a large amount of leakage current such as from input or negative feedback condenser, the ic output dc voltage will increase. if this output voltage is connected to a speaker with low input withstand voltage, overcurrent or ic failure may cause smoke or ignition. (the overcurrent may cause smok e or ignition from the ic itself.) in particular, please pay attention when using a bridge tied load (btl) connection - type ic that inputs output dc voltage to a speaker directly. 26 2 014- 10- 30
TB67S145FTG points to remember on handling of ic s overcurrent detection circuit overc urrent detection circuits (referred to as current limiter circuits) do not necessarily protect ics under all circumstances. if the overcurrent detection circuits operate against the overcurrent, clear the overcurrent status immediately. depending on the me thod of use and usage conditions, exceeding absolute maximum ratings may cause the overcurrent detection circuit to operate improperly or ic breakdown may occur before operation. in addition, depending on the method of use and usage conditions, if overcurr ent continues to flow for a long time after operation, the ic may generate heat resulting in breakdown. thermal shutdown circuit thermal shutdown circuits do not necessarily protect ics under all circumstances. if the thermal shutdown circuits operate aga inst the over - temperature, clear the heat generation status immediately. depending on the method of use and usage conditions, exceeding absolute maximum ratings may cause the thermal shutdown circuit to operate improperly or ic breakdown to occur before op eration. heat radiation design when using an ic with large current flow such as power amp, regulator or driver, design the device so that heat is appropriately radiated, in order not to exceed the sp ecified junction temperature (t j ) at any time or under a ny condition. these ics generate heat even during normal use. an inadequate ic heat radiation design can lead to decrease in ic life, deterioration of ic characteristics or ic breakdown. in addition, when designing the device, take into consideration the e ffect of ic heat radiation with peripheral components. back - emf when a motor rotates in the reverse direction, stops or slows abruptly, current flows back to the motors power supply owing to the effect of back - emf. if the current sink capability of the p ower supply is small, the devices motor power supply and output pins might be exposed to conditions beyond the absolute maximum ratings. to avoid this problem, take the effect of back - emf into consideration in system design. 27 2 014- 10- 30
TB67S145FTG restrictions on product use ? toshiba corporation, and its subsidiaries and affiliates (collectively "toshiba"), reserve the right to make changes to the i nformation in this document, and related hardware, software and systems (collectively "product") without notice. ? this document a nd any information herein may not be reproduced without prior written permission from toshiba. even with toshiba's written permission, reproduction is permissible only if reproduction is without alteration/omission. ? though toshiba works continually to im prove product's quality and reliability, product can malfunction or fail. customers are responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, softwar e and systems which minimize risk and avoid situations in which a malfunction or failure of product could cause loss of human life, bodily injury or damage to property, including data loss or corruption. before customers use the product, create designs including t he product, or incorporate the prod uct into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant toshiba information, including without limitation, this document, the specifications, the data sheets and applicatio n notes for product an d the precautions and conditions set forth in the "toshiba semiconductor reliability handbook" and (b) the instructions for the application with which the product will be used with or for. customers are solely responsible for all aspects of their ow n produ ct design or applications, including but not limited to (a) determining the appropriateness of the use of this product in such d esign or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating parame ters for such designs and applications. toshiba assumes no liability for customers' product design or applicat ions. ? product is neither intended nor warranted for use in equipments or systems that require extraordinarily high levels of quality and/or reliability, and/or a malfunction or failure of which may cause loss of human life, bodily injury, serious propert y damage and/or serious public impact ( " unintended use " ). except for specific applications as expressly stated in this document, unintended use includes, without limitation, equipment used in nuclear facilities, equipment used in the aerospace industry, me dical equipment, equipment used for automobiles, trains, ships and other transportation, traffic signaling equipment, equipment used to control combustions or ex plosions, safety devices, elevators and escalators, devices related to electric power, and equi pment used in finance - related fields. if you use product for unintended use, toshiba assumes no liability for product. for details, please contact your toshiba sales representative. ? do not disassemble, analyze, reverse - engineer, alter, modify, translate or copy product, whether in whole or in part. ? product shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited unde r any applicable laws or regulations. ? the information contained herein is present ed only as guidance for product use. no responsibility is assumed by toshiba for any infringement of patents or any other intellectual property rights of third parties that may result from the use of product. n o license to any intellectual property right i s granted by this document, whether express or implied, by estoppel or otherwise. ? absent a written signed agreement, except as provided in the relevant terms and conditions of sale for product, and to the maximum extent allowable by law, toshiba (1) assu mes no liability whatsoever, including without limitation, indirect, consequential, special, or incidental damages or loss, including without limitation, loss of profits, loss of opportunities, business interruption and loss of data, and (2) disclaims any and all express or implied warranties and conditions related to sale, use of product, or information, including warranties or conditions of merchantability, fitness for a particular purpose, accuracy of information, or noninfringement. ? do not use or othe rwise make available product or related software or technology for any military purposes, including without limitation, for the design, development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapons or missile technol ogy product s (mass destruction weapons). product and related software and technology may be controlled under the applicable export laws and regulations including, without limitation, the japanese foreign exchange and foreign trade law and the u.s. export administrati on regulations. export and re - export of product or related software or technology are strictly prohibited except in compliance with all applicable export laws and regulations. ? please contact your toshiba sales representative for details as to environment al matters such as the rohs compatibility of product. please use product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled su bstances, including without limitation, the eu rohs directive. toshiba assume s no liability for d amages or losses occurring as a resul t of noncompliance w ith applicable laws and regulations. 28 2 014- 10- 30

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