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hdsp-253x series eight character 5 mm smart alphanumeric display data sheet esd warning: normal cmos handling precautions should be observed to avoid static discharge. device selection guide algaas red her orange yellow green hdsp-2534f hdsp-2532f hdsp-2530f hdsp-2531f HDSP-2533 description the f hdsp-253x f isf idealf for f applications f where f displaying f eight f orf more f characters f off dotf matrix f information f inf anf aestheticallyf pleasingf mannerf isf required. f these f devices f are f eight-digit, f 5f xf 7f dotf matrix, f alphanu mericf displays. f the f 5.0f mmf (0.2f inch)f highf characters f are f packaged f inf af 0.300f inchf (7.62f mm)f 30f pinf dip. f the f on-board f cmosf icf hasf thef ability f to f decode f 128f asciif characters, f whichf are f perm a nentlyf stored f inf rom. f in f addition,f 16f pr o grammablef symbolsf may f bef stored f inf on-board f ram. f seven f brightness f levels f provide f vers a tility f inf adjustingf thef display f intensity f andf power f consum ption.f the f hdsp-253x f isf designed f for f stan dardf micr o processorf inte r face f tec h niques.f the f display f andf specialf features f are f accessed f through f af bidire c tionalf eight-bit f dataf bus. features ? f xy fstack able ? f 128 f characterfasciif decoder ? f programmable f functions ? f 16 fuserfdefnablef characters ? f multi-level fdimmingfandfblank ing ? f ttl f compatiblefcmosfic ? f wave f solderable applications ? f avionics ? f computer f peripherals ? f industrial f instrumentation ? f medical f equipment ? f portable f dataf entryf devices ? f telecommunications ? f test f equipment
2 package dimensions absolute maximum ratings supplyf voltage, f v dd f tof ground [1] ff -0.3f vf tof7.0f v operating f voltage, f v dd f tof ground [2] ff 5.5f v input f voltage, f anyf pinf tof groundf -0.3f vf tof v dd f+0.3f v free f airf operatingf temperature f range,f t a [3f]fff ff -40cf tof+f85c relative f humidityf (noncondensing)f 85% storage f temperature f range,f t s ff -55cf tof100c soldering f temperature f[1.59fmmf(0.063fin.)f belowf body] f f solder fdippingf 260cf forf5fsecs f f wave f solderingf 250cf forf3fsecs esdf protectionf@f1.5fk ,f100fpff 4fkvf(eachfpin) notes: 1.f fmaximum f voltagefisfwithfnofledsf illuminated. 2.f f20 fdotsfonfinfallf locationsf atffullf brightness. 3.f fsee f thermal f considerations f section f for f information f aboutf operation f inf highf temperature f ambients. notes: 1.f dimensions f arefinfmmf(inches). 2.f unless f otherwisef specifed,f tolerancefonfdimensionsfisf0.25fmmf(0.010finch). 3.f for f yellowfandf greenf displaysf only. 4.f mar k ingfisfonfsidef oppositefpinf1. pin # 15 sym . typ . date code (year, week) luminous intensity categor y color bin (3) 3.81 (0.150) pin # 16 1.52 (0.060) 5.31 (0.209) 2.2 9 (0.090) 4.57 (0.180) [4] 4.01 (0.158) sym. 5.08 (0.200) 10.16 (0.400) typ . 0.46 0.13 (0.018 0.005 ) typ. pin #1 part number 2.54 0.13 (0.100 0.005) (tol. non accum.) 7.62 (0.300) ref. 0.2 5 (0.010) pin # function pin # function 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 rst fl a0 a1 a2 a3 no pi n no pi n no pi n a4 cls clk wr ce v dd 16 17 18 19 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 30 gnd (supply) thermal test gnd (logic) rd d0 d1 no pi n no pi n no pi n d2 d3 d4 d5 d6 d7 pin function assignment table 3 4 5 6 7 typ. sym . 11.43 (0.450) max. typ. 2.54 (0.100) sym. 2.68 (0.105) 42.93 (1.690) max. typ. 5.36 (0.211) pin #15 pin #1 identifier hdsp-253x x z yyww 2 1 0
3 ascii character set optical characteristics at 25c [1] v dd f=f5.0f vf atf fullf brightness luminous intensity peak dominant character average (#) wavelength wavelength [2] i v (mcd) l peak (nm) l d (nm) led color part number min. typ. typ. typ. algaas f redf hdsp-2534f 5.1f 25f 645f 637 high f efciencyf redf hdsp-2532f 2.5f 7.5f 635f 626 orangef hdsp-2530f 2.5f 7.5f 600f 602 yellowf hdsp-2531f 2.5f 7.5f 583f 585 greenf HDSP-2533f 2.5f 7.5f 568f 574 notes: 1.f refers f tofthefinitialfcasef temperaturefoffthef devicef immediatelyf priorf tof measurement. 2.f fdominant f wavelength, l d ,f isf derived f from f thef cief chromaticity f diagram, f andf represents f thef singlef wavelength f whichf defnesf thef color f off thef device. d7 d6 d5 d4 bit s d3 d0 d2 d1 row column 0000 0 0001 1 0010 2 0011 3 0100 4 0101 5 0110 6 0111 7 1000 8 1001 9 1010 a 1011 b 1100 c 1101 d 1110 e 1111 f 0 0 0 0 0 0 0 0 1 1 0 0 1 0 2 0 0 1 1 3 0 1 0 0 4 0 1 0 1 5 0 1 1 0 6 0 1 1 1 7 1 x x x 8Cf 16 u s e r d e f i n e d c h a r a c t e r s
4 recommended operating conditions parameter symbol minimum nominal maximum units supplyf voltagef v dd f 4.5f 5.0f 5.5f v electrical characteristics over operating temperature range 4.5f 5 symbol description 25c typical minimum [1] units f osc f oscillator f frequencyf 57f 28f k hz f rf [5] f display f refreshf ratef 256f 128f hz f fl [6] f character f flashf ratef 2f 1f hz t st [7] f self f test f cyclef timef 4.6f 9.2f sec notes: 5.f ff rf f=ff osc /224. 6.f ff fl f=ff osc /28,672. 7.f ft st f=f262,144/f osc . ac timing characteristics over temperature range v dd f=f4.5f tof5.5f vfunlessf otherwisef specifed. reference number symbol description min. [1] units 1f t acc f display f accessf time f f f f writef 210 f f f f readf 230f ns 2f t acs f address f setupf time f tofchipfenablef 10f ns 3f t ce f chip fenablef activef time [2,f3] f f f f writef 140 f f f f readf 160f ns 4f t ach f address fholdf time f tofchipfenablef 20f ns 5f t cer f chip fenablef recoveryf timef 60f ns 6f t ces f chip fenablef activef priorf tof risingf edgefof [2,f3] f f f f writef 140 f f f f readf 160f ns 7f t ceh f chip fenablefholdf time f tof risingf edgefoff read/writef signal [2,3] f 0f ns 8f t w f write f activef timef 100f ns 9f t wd f data f valid f priorf tof risingf edgefoff write f signalf 50f ns 10f t dh f data f write fholdf timef 20f ns 11f t r f chip fenablef activef priorf tof valid f dataf 160f ns 12f t rd f read f activef priorf tof valid f dataf 75f ns 13f t df f read f dataf floatf delayf 10f ns f t rc f reset f activef time [4] f 300f ns notes: 1.f fworst fcasef valuesf occurf atfanficf junctionf temperaturefoff125c. 2.f ffor f designers f whof dof notf needf to f read f from f thef display, f thef read f linef canf bef tiedf to f v dd f andf thef write f andf chipf enablef linesf canf bef tiedf together. 3.f fchanging f thef logic f levels f off thef address f linesf whenf cef =f 0 f may f causef erroneous f data f to f bef entered f into f thef character f ram, f regardless f off thef logic f levelsfoffthef wrfandfrdf lines. 4.f fthe f displayfmustfnotfbef accessedf untilf afterf3fclockfpulsesf(110f sfmin.fusingfthef internalf refreshfclock)f afterfthef risingfedgefoffthef resetf line.
6 write cycle timing diagram read cycle timing diagram input f pulsef levels:f0.6f vf tof2.4f v input f pulsef levels:f0.6f vf tof2.4f v output f referencef levels:f0.6f vf tof2.2f v output f loadingf=f1f ttl f loadfandf100fpf 1 9 8 6 3 2 ce 7 10 4 2 5 a 0 -a 4 fl d 0 -d 7 wr 1 12 11 6 3 2 ce 7 13 4 2 5 a 0 -a 4 fl d 0 -d 7 rd
7 electrical description pin function description reset f (rst,ffpinf1)f reset f initializesfthef display. flashf(fl,fpinf2)f flf low f indicates f anf access f to f thef flash f ram f andf isf unafected f by f thef state f off address f linesfa 3 -a 4 . addressf inputsf eachf location f inf memory f hasf af distinct f address. f address f inputsf (a 0 -a 2 )f select f af specifc (a 0 -a 4 ,fpinsf3-6,f10)f f locationf inf thef character f ram, f thef flash f ram f orf af particular f row f inf thef udcf (user- f defned f character) f ram. f a 3 -a 4 f are f usedf to f select f whichf section f off memory f isf accessed. f table f1f showsfthef logicf levelsfneededf tof accessfeachf sectionfoff memory. table 1. logic levels to access memory f flf a 4 f a 3 f section foff memoryf a 2 fa 1 fa 0 f 0f xf xf flash f ramf character f address f 1f 0f 0f udc f addressf registerf dontf care f 1f 0f 1f udc f ramf row f address f 1f 1f 0f control f word f registerf dontf care f 1f 1f 1f character f ramf character f address clock f selectf (cls,fpinf 11)f thisfinputfisfusedf tof selectfeitherfanf internalf (clsf=f1)forf externalf (clsf=f0)fclockf source. clock f input/outputf outputsfthef masterfclockf (clsf=f1)forfinputsfafclockf (clsf=f0)f forf slavef displays. (clk, fpinf12)f writef (wr,fpinf 13)f datafisf writtenf intofthef displayfwhenfthef wrfinputfisf lowfandfthefcefinputfisf low. chipfenablef (ce,fpinf 14)f thisf inputf mustf bef at f af logic f low f to f read f orf write f data f to f thef display f andf mustf gof high f f between feachf readfandf writef cycle. readf (rd,fpinf19)f data fisf readf fromfthef displayfwhenfthefrdfinputfisf lowfandfthefcefinputfisf low. data fbusf the f datafbusfisfusedf tof readf fromforf writef tofthef display. (d 0 -d 7 ,fpinsf20,f21,f25-30) gndf (supply)f(pinf 16)f thisfisfthefanalogf groundf forfthefledf drivers. gndf (logic)f(pinf 18)f thisfisfthef digitalf groundf forf internalf logic. v dd f(power)f(pinf 15)f thisfisfthef positivef powerfsupplyf input. thermal f test f(pinf 17)f thisfpinfisfusedf tof measureftheficf junctionf temperature.f dofnotf connect.
8 figure 1. hdsp-253x internal block diagram. a 3 a 4 fl en udc addr register udc addr rd wr d 0 -d 7 clr pre set ce a 3 a 4 a 0 -a 2 d 0 -d 7 fl ce wr rd a 3 a 4 fl ce fl ce a 3 a 4 fl ce a 3 a 4 fl ce en 8 x 8 characte r ra m d 0 -d 6 rd wr d 0 -d 7 a 0 -a 2 reset char addr d 7 en flash ra m flash dat a rd wr d 0 a 0 -a 2 reset char addr en udc ra m do t dat a rd wr d 0 -d 4 d 0 -d 4 a 0 -a 2 udc addr row set en en row sel sel f test decoder(* ) do t dat a d 0 -d 6 timing timing do t driver s do t dat a en flash control word register 0 1 rd wr rst clk ocs cls clr1 clr2 d 0 -d 7 reset self test result 2 3 4 6 7 self test in self test self test self test start 8 5x7 le d character s row driver s visual test rom test clr test ok test ok intensity intensity flash flash blink blink reset reset clock timing and control cha r addr row set timing
9 character f ramf this f ramf storesfeitherfasciif characterf dataforfafudcf ramf address. flash f ramf this fisfaf1fxf8f ramfwhichf storesf flashf data. user-defned f characterf ramf thisf ramf storesfthefdotf patternf forf customf characters. f (udcf ram) user-defned f characterf this f registerfisfusedf tof providefthef addressf tofthefudcf ramfwhen f address f registerf thefuserfisf writingforf readingfaf customf character. f (udcf addressf register) control f word f registerf this f registerf allowsfthefuserf tofadjustfthef displayf brightness,ffashf f f individualf characters,fblink ,fselff testforfclearfthef display. word f register f andf thef refresh f circuitry f necessary f to f syn - chronize f thef decoding f andf driving f off eight f 5f xf 7f dotf matrix f characters. f the f majorf userf accessible f portions f off thef displayf aref listedf below: display internal block diagram figure f 1f shows f thef internal f blockf diagram f off thef hdsp- 253xf display. f the f cmosf icf consists f off anf 8f byte f chara c ter f ram, f anf 8f bitf flash f ram, f af 128f character f asciif decoder, f af 16f character f udcf ram, f af udcf address f register, f af control f figure 2. logic levels to access the character ram. character ram figure f 2f shows f thef logic f levels f neededf to f access f thef hdsp- 253xf character f ram. f during f af normal f access f thef cef =f 0 f andf eitherf rdf =f 0 f orf wrf =f 0. f however, f err oneousf data f may f bef written f into f thef character f ram f iff thef address f linesf are f unstablef whenf cef =f 0 f regardless f off thef logic f levels f off thef rdf orf wrf lines. f address f linesf a 0 -a 2 f are f usedf to f select f thef location f inf thef char ac ter f ram. f two f types f off data f canf bef stored f inf eachf character f ram f location: f anf asciif code f orf af udcf ram f address. f data f bitf d 7 f isf usedf to f diferenti - ate f between f thef asciif character f andf af udcf ram f address. f d 7 f =f 0f enablesf thef asciif decoder f andf d 7 f =f 1f enablesf thef udcf ram. f d 0 -d 6 f are f usedf to f inputf asciif data f andf d 0 -d 3 f are fusedf tofinputfafudcf address. ce fl a 4 a 3 a 2 a 1 a 0 rst wr rd character address symbol is accessed in location specified by the character address above 0 1 0 0 0 1 1 1 1 1 0 1 1 undefine d control signals character ram address character ram data format write to display read from display undefine d 000 = left most 111 = right most d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 0 128 ascii code x x x udc code 1 display 0 = logic 0; 1 = logic 1; x = do not car e dig 0 dig 1 dig 2 dig 3 dig 4 di g 5 di g 6 di g 7 001 010 011 100 101 110 111 000
10 udc ram and udc address register figure f 3f shows f thef logic f levels f neededf to f access f thef udcf ram f andf thef udcf address f register. f the f udcf address f register f isf eight f bitsf wide. f the f lower f four f bitsf (d 0 -d 3 )f are f usedf to f select f onef off thef 16f udcf locations. f the f upperf four f bitsf (d 4 -d 7 )f are f notf used. f once f thef udcf address f hasf beenf stored f inf thef udcf address f register, f thef udcf ram f canf bef accessed. to f completely f specifyf af 5f xf 7f character f requires f eight f write f cycles. f onef cycle f isf usedf to f store f thef udcf ram f address f inf thef udcf address f register. f seven f cycles f are f usedf to f store f dotf data f inf thef udcf ram. f data f isf entered f by f rows. f onef cycle f isf neededf to f access f eachf row. f figure f 4f shows f thef organization f off af udcf character f assumingf thef symbolf to f bef stored f isf anf f. f a 0 -a 2 f are f usedf to f select f thef row f to f bef accessed f andf d 0 -d 4 f are f usedf to f transmit f thef row f dotf data. f the f upperf three f bitsf (d 5 -d 7 )f are f ignored. f d 0 f (leastf signi f- cant f bit)f corresponds f to f thef right f mostf column f off thef 5f xf 7f matrix f andf d 4 f (mostf signifcant f bit)f corresponds f to f thef left f mostf columnfoffthef5fxf7f matrix. flash ram figure f 5f shows f thef logic f levels f neededf to f access f thef flash f ram. f the f flash f ram f hasf onef bitf associated f withf eachf location f off thef character f ram. f the f flash f inputf isf usedf to f select f thef flash f ram. f address f linesf a 3 -a 4 f are f ignored. f address f linesf a 0 -a 2 f are f usedf to f select f thef location f inf thef flash f ram f to f store f thef attr i bute.f d 0 f isf usedf to f store f orf remove f thef fashf attribute. f d 0 f =f 1 f stores f thef attribute f andfd 0 f=f 0 f removesfthef attribute. when f thef attribute f isf enabledf through f bitf 3f off thef control f word f andf af 1 f isf stored f inf thef flash f ram, f thef correspond - ingf character f willf fashf at f approximately f 2f hz. f the f actual f rate f isf dependent f onf thef clockf fr e quency.f for f anf external f clockf thef fashf rate f canf bef calculated f by f dividingf thef clockf frequency f byf28,672. figure 3. logic levels to access a udc character. figure 4. data to load f into the udc ram. ce fl a 4 a 3 a 2 a 1 a 0 rst wr rd 0 1 0 0 0 1 1 0 0 1 x x x 0 1 1 undefined control signals udc address register address udc address register data forma t write to displa y read from display undefined 000 = row 1 110 = row 7 d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 x udc code x x x fl a 4 a 3 a 2 a 1 a 0 0 1 1 r ow select udc ram address udc ram c c data format o o l l 1 5 0 = logic 0; 1 = logic 1; x = do not car e d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 x dot data x x ce rst wr rd 0 1 0 0 0 1 1 0 1 1 undefined control signals write to displa y read from display undefined c c c c c o o o o o l l l l l 1 2 3 4 5 d 4 d 3 d 2 d 1 d 0 udc character hex code 1 1 1 1 1 row 1 ? ? ? ? ? 1f 1 0 0 0 0 row 2 ? 10 1 0 0 0 0 row 3 ? 10 1 1 1 1 0 row 4 ? ? ? ? 1e 1 0 0 0 0 row 5 ? 10 1 0 0 0 0 row 6 ? 10 1 0 0 0 0 row 7 ? 10 ignored 0 = logic 0; 1 = logic 1; * = illuminated led figure 5. logic levels to access the flash ram. ce fl a 4 a 3 a 2 a 1 a 0 rst wr rd 0 1 0 0 0 1 1 x x 0 0 1 1 undefined remove flash at specified digit location store flash at specified digit location control signals flash ram address flash ram data format 0 = logic 0; 1 = logic 1; x = do not care write to display read from display undefined d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 x x x x x x x 0 1 character address 000 = left most 111 = right most
11 table 2. current requirements at diferent brightness levels for all colors except algaas % v dd = 5.0 v symbol d 2 d 1 d 0 brightness 25c typ. units i dd f (v)f 0f 0f 0f 100f 200f ma f 0f 0f 1f 80f 160f ma f 0f 1f 0f 53f 106f ma f 0f 1f 1f 40f 80f ma f 1f 0f 0f 27f 54f ma f 1f 0f 1f 20f 40f ma f 1f 1f 0f 13f 26f ma control word register figure f 6f shows f how f to f access f thef control f word f register. f this f isf anf eight f bitf register f whichf performs f fve f functions. f they f are f brightness f control, f flash f ram f control, f blink ing, f self f test f andf clear. f eachf function f isf independent f off thef others. f ho w ever, f allf bitsf are f updated f during f eachf control f word f writef cycle. brightness (bits 0-2) bitsf 0-2f off thef control f word f adjustf thef brightness f off thef display. f bitsf 0-2f are f interpreted f asf af three f bitf binary f code f withf code f (000)f corresponding f to f maximumf brightness f andf code f (111)f corresponding f to f af blankedf display. f in f additionf to f varying f thef display f brightness, f bitsf 0-2f alsof vary f thef average f value f off i dd .f i dd f canf bef calcu latedf at f any f brightness f level f by f multiplyingf thef percent f bright - nessf level f by f thef value f off i dd f at f thef 100%f brightness f level. f these f valuesfoffi dd f aref shownfinf table f2. flash function (bit 3) bitf 3f determines f whetherf thef fashingf character f attribute f isf onf orf of. f when f bitf 3f isf af 1, f thef outputf off thef flash f ram f isf check ed.f if f thef content f off af loca tionf inf thef flash f ram f isf af 1, f thef associated f digit f willf fashf at f approximately f 2f hz. f for f anf external f clock ,f thef blinkf rate f canf bef calculated f by f dividingf thef clockf frequency f by f 28,672.f if f thef fashf enablef bitf off thef control f word f isf af 0, f thef content f off thef flash f ram f isf ignored. f to f usef thisf function f withf multiplef dis playf systems fseefthef resetf section. blink function (bit 4) bitf 4f off thef control f word f isf usedf to f synchronize f blink ingf off allf eight f digits f off thef display. f when f thisf bitf isf af 1 f allf eight f digits f off thef display f willf blinkf at f approx i matelyf 2f hz. f the f actual f rate f isf dependent f onf thef clockf frequency. f for f anf external f clock ,f thef blinkf rate f canf bef calculated f by f dividingf thef clockf frequency f by f 28,672.f this f function f willf override f thef flash f function f whenf itf isf active. f to f usef thisf function f withfmultiplef displayf systemsfseefthef resetf section. figure 6. logic levels to access the control word register. ce fl a 4 a 3 a 2 a 1 a 0 rst wr rd 0 1 0 0 0 1 1 1 0 x x x 1 0 1 1 undefined control signals control word address control word data format 0 = logic 0; 1 = logic 1; x = do not car e 0 disable flash 1 enable flash brightness control levels 0 disable blinkin g 1 enable blinking 0 normal operation 1 clear flash and character rams 0 x normal operation; x is ignored 1 x start self test; result given in x x = 0 failed x = 1 passed write to display read from display undefined d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 c s s bl f b 0 0 0 100% 0 0 1 80% 0 1 0 53% 0 1 1 40% 1 0 0 27 % 1 0 1 20% 1 1 0 13% 1 1 1 0% b b
12 self test function (bits 5, 6) bitf 6f off thef control f word f regi s terf isf usedf to f initiate f thef selff test f function. f results f off thef internal f selff test f are f stored f inf bitf 5f off thef control f word. f bitf 5f isf af read f onlyf bitf where f bitf 5f =f 1 f indicates f af passedf selff test f andf bitf 5f =f 0 f indicates f affailedfselff test. setting f bitf 6f to f af logic f 1f willf start f thef selff test f function. f the f built-in f selff test f function f off thef icf consists f off two f internal f ro utinesf whichf exercises f majorf portions f off thef icf andf illumin atesf allf off thef leds. f the f frstf routine f cycles f thef asciif decoder f rom f through f allf states f andf performs f af checksumf onf thef output. f if f thef checksumf agrees f withf thef correct f value, f bitf 5f isf setf to f 1. f the f second f ro utinef provides f af visualf test f off thef ledsf usingf thef drive f circuitry. f this f isf ac - complished f by f writing f check eredf andf inverse f check eredf patterns f to f thef display. f eachf pattern f isf displayed f for f approx i matelyf2f seconds. during f thef selff test f function f thef display f mustf notf bef accessed. f the f timef neededf to f execute f thef selff test f function f isf calculated f by f multiplyingf thef clockf period f by f 262,144.f for f example, f assumef af clockf frequency f off 58f khz, f thenf thef timef to f execute f thef selff test f function f frequency f isf equalf tof(262,144/58,000)f=f4.5f secondf duration. at f thef endf off thef selff test f func tion,f thef character f ram f isf loadedf withf blank s,f thef control f word f register f isf setf to f zeros f except f for f bitf 5,f andf thef flash f ram f isf cleared f andf thef udcf addressf registerfisfsetf tofallf ones. clear function (bit 7) bitf 7f off thef control f word f willf clearf thef character f ram f andf thef flash f ram. f setting f bitf 7f to f af 1 f willf start f thef clearf func tion.f three f clockf cycles f (110f msf min.f usingf thef internal f refresh f clock)f are f required f to f complete f thef clearf function. f the f display f mustf notf bef accessed f whilef thef display f isf beingf cleared. f when f thef clearf function f hasf beenf co m pleted,f bitf 7f willf bef reset f to f af 0. f the f asciif char acter f code f for f af space f (20h)f willf bef loadedf into f thef character f ram f to f blankf thef display f andf thef flash f ram f willf bef loadedf withf 1s. f the f udcf ram, f udcf address f register f andf thef re - mainderfoffthef controlf word f aref unafected. display reset figure f 7f shows f thef logic f levels f neededf to f reset f thef display. f the f display f shouldf bef reset f onf power-up. f the f external f reset f clearsf thef character f ram, f flash f ram, f control f word f andf resets f thef internal f counters. f after f thef rising f edgef off thef reset f signal, f three f clockf cycles f (110f msf min.f usingf thef internal f refresh f clock)f are f required f to f complete f thef reset f sequence. f the f display f mustf notf bef accessed f whilef thef display f isf beingf reset. f the f asciif character f code f for f af space f (20h)f willf bef loadedf into f thef character f ram f to f blankf thef display. f the f flash f ram f andf control f word f register f are f loadedf withf allf 0s. f the f udcf ram f andf udcf address f register f are f unafected. f all f displays f whichf operate f withf thef samef clockf source f mustf bef simultaneouslyf reset f to f synchronize fthef flashingfandfblink ingf functions. mechanical considerations the f hdsp-253x f isf assembledf by f dief attaching f andf wire f bondingf 280f ledf chipsf andf af cmosf icf to f af thermally f con - ductive f printed f circuit f board. f af polycarbonate f lensf placed f over f thef pcbf creates f anf airf gapf over f thef ledf wire f bonds. f af backfllf epoxyfsealsfthef displayfpack age. f figure f 8f shows f thef proper f methodf to f insert f thef display f by f hand. f to f prevent f damagef to f thef ledf wire f bonds, f applyf pressure f uniformly f withf fngersf located f at f bothf endsf off thef part. f using f af tool, f shown f inf figure f 9,f suchf asf af screw - driver f orf pliersf to f pushf thef display f into f thef printed f circuit f board f orf socketf may f damagef thef ledf wire f bonds. f the f force f exerted f by f af scre w driver f isf sufcient f to f pushf thef lensf into f thef ledf wire f bonds. f the f bent f wire f bondsf causef shorts f orfopensf thatf resultfinf catastrophicf failurefoffthef leds. figure 7. logic levels to reset the display. note: if f rst,f ce,fandf wrf aref low,funk ownf dataf mayfbef writtenf intofthef display. ce rst wr rd 0 = logic 0; 1 = logic 1; x = do not car e fl 0 1 x x x x x a 4 - a 0 d 7 -d 0
13 figure 9. improper method to manually insert a display. thermal considerations the f hdsp-253x f canf operate f from f -40cf to f +85c.f the f displays f low f thermal f resistance f allows f heat f to f fow f from f thef cmosf icf to f thef 24f pack agef pins. f typically, f thisf heat f isf conducted f through f thef printed f circuit f board f traces f to f free f air. f for f mostf applications, f nof additionalf heatsin k ingf isf needed. f illuminating f allf 280f ledsf simultaneouslyf at f fullf brightness f isf notf recommended f for f continu ousf operation. f ho w ever, f allf 280f ledsf canf bef illuminated f simultaneouslyf at ffullf brightnessf forf10f secondsf atf25cfasfaflampf test. the f icf hasf af maximumf allo w ablef junction f temperature f off 150c.f the f icf junction f temper a ture f canf bef calculated f withf thef followingf equation: t j max f=f t a f+f(p d fxfr q j-a ) t j max f isf thef maximumf allo w ablef icf junction f temperature. t a fisfthef ambientf temperaturef surroundingfthef display. p d fisfthef powerf dissipatedf byfthefic. r q j-a f isf thef thermal f resistance f from f thef icf through f thef display f pack agef andf printed f circuit f board f to f thef ambient. af typical f value f for f r q j-a f isf 39c/w. f this f value f isf typical f for f af display f mounted f inf af socketf andf covered f withf af plasticf flter. f the f socketf isf soldered f to f af 0.062f in.f thickf printed f circuit f board f withf 0.020f in.f widef one-ounce f copper f traces. f p d fcanfbef calculatedfasf follows: p d f=f v dd fxfi dd v dd fisfthefsupplyf voltagefandfi dd fisfthefsupplyf current. v dd fcanf varyf fromf4.5f vf tof5.5f v. i dd f changesf withf v dd ,f temperature, f brightness f level, f andf numberfoff on-pixels. for f algaas i dd f(#)f=f(83.8fxf v dd f-0.35fxf t j )fxfbfxfn/8 i dd (v) f=f(63fxf v dd f-0.79fxf t j )fxfbfxfn/8 for fthefotherf colors i dd f(#)f=f(75.4fxf v dd f-0.28fxf t j )fxfbfxfn/8 i dd (v) f=f(54fxf v dd f-0.6fxf t j )fxfbfxfn/8 i dd f (#)f isf thef supplyf current f usingf # f asf thef displayed f character. i dd (v) f isf thef supplyf current f usingf v f asf thef displayed f character. t j fisftheficf junctionf temperature. bfisfthef percentf brightnessf level. nfisfthefnumberfoff charactersf illuminated. operation f inf highf temperature f ambients f may f require f power f derating f orf heatsin k ing. f figure f10f shows f how f to f derate f thef power f for f anf hdsp-253x. f you f canf reduce f thef power f by f tighter f supplyf voltage f regulation f orf lowering f thef brightnessf level. figure 8. proper method to manually insert a display.
14 table f 3f shows f thef calculated f maximumf allowable f ambient f temperature f for f several f dife r ent f setsf off operating f condi - tions. f the f worst f casef alphanumeric f characters f (#,@,b)f have f 20f pixels. f displaying f eight f 20-pixel f characters f willf notf occur f inf normal f operation. f thus, f usingf eight f 20-pixel f characters f to f calculate f power f dissipation f willf over f estimate f thef power f andf thef icf junction f temperature. f the f average f numberf off pixels f perf character, f supplyf voltage, f brightness f level, f andf numberf off characters f are f neededf to f calcu latef thef power f dissipated f by f thef ic.f the f ambient f tempe r ature, f power f dissipated f by f thef ic,f andf thef thermal f resistance f are f thenf usedf to f calculate f icf junction f temper a ture. f the f typical f alpha numericf character f isf 15f pixels. f for f conditions f notf listed f inf table f 3,f you f canf calculate f thef power f dissipat - edf by f thef icf andf usef figure f 10f to f determine f thef maximumf ambient f temperature. table 3. maximum allowable ambient temperature for various operating conditions algaas red number of brightness v dd i dd p d r q j-a t a max character characters level v ma w c/w c #f(20f dots)f 8f 100%f 5.5f 408f 2.2f 39f 64 #f(20f dots)f 8f 100%f 5.25f 387f 2.0f 39f 72 #f(20f dots)f 8f 100%f 5.0f 366f 1.8f 39f 80 #f(20f dots)f 7f 100%f 5.5f 357f 2.0f 39f 72 #f(20f dots)f 6f 100%f 5.5f 306f 1.7f 39f 84 #f(20f dots)f 8f 80%f 5.5f 327f 1.8f 39f 80 #f(20f dots)f 8f 80%f 5.25f 310f 1.6f 39f 85 #f(20f dots)f 8f 53%f 5.5f 216f 1.2f 39f 85 vf(12f dots)f 8f 100%f 5.5f 228f 1.3f 39f 85 figure 10. maximum allowable power dissipation vs. ambient temperature. t j max = 150c or 120c. p d max. C maximum power dissipation C w 50 1.5 t a C ambient temperature C c 85 55 60 80 90 2.3 2.2 2.1 1.8 1.7 1.6 70 75 65 2.0 1.9 algaas r j- a = 39c/ w all other colors table 4. maximum allowable ambient temperature for various operating conditions (contd.) all colors except algaas red number of brightness v dd i dd p d r q j-a t a max character characters level v ma w c/w c #f(20f dots)f 8f 100%f 5.5f 373f 2.0f 39f 72 #f(20f dots)f 8f 100%f 5.25f 354f 1.9f 39f 77 #f(20f dots)f 8f 100%f 5.0f 335f 1.67f 39f 85 #f(20f dots)f 7f 100%f 5.5f 326f 1.8f 39f 80 #f(20f dots)f 6f 100%f 5.5f 280f 1.5f 39f 85 #f(20f dots)f 8f 80%f 5.5f 298f 1.6f 39f 85 vf(12f dots)f 8f 100%f 5.5f 207f 1.1f 39f 85 the f actual f icf temperature f isf easyf to f measure. f pin f 17f isf thermally f andf electrically f connected f to f thef icf substrate. f the f thermal f resistance f from f pinf 17f to f theficfisf 16c/w.f the f proceduref tof measureftheficf junctionf temperaturefisfasf follows: 1.f fmeasure f v dd fandfi dd f forfthef display.f measuref v dd f betweenfpinsf15fandf16.f measurefthef currentf enteringfpinf15. 2.f fmeasure fthef temperaturefoffpinf17f afterf45f minutes.f usefanf electricallyf isolatedf thermalf couplef probe. 3.f ft j (ic) f=f t pin f+f v dd fxfi dd fxf 16c/w.
for product information and a complete list of distributors, please go to our web site: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies in the united states and other countries. data subject to change. copyright ? 2005-2009 avago technologies. all rights reserved. obsoletes 5989-3184en av02-2018en - july 15, 2009 color bin limits color range (nm) color bin min. max. greenf 1f 576.0f 580.0 f 2f 573.0f 577.0 f 3f 570.0f 574.0 f 4f 567.0f 571.0 yellowf 3f 581.5f 585.0 f 4f 584.0f 587.5 f 5f 586.5f 590.0 f 6f 589.0f 592.5 f 7f 591.5f 595.0 note: test f conditionsfasfspecifedfinfopticalf characteristicf table. intensity bin limits for hdsp-253x intensity range (mcd) bin min. max. gf 2.50f 4.00 hf 3.41f 6.01 if 5.12f 9.01 jf 7.68f 13.52 kf 11.52f 20.28 note: test f conditionsfasfspecifedfinfopticalf characteristicf table. intensity bin limits for hdsp-2534 intensity range (mcd) bin min. max. if 5.12f 9.01 jf 7.68f 13.52 kf 11.52f 20.28 lf 17.27f 30.42 mf 25.91f 45.63 note: test f conditionsfasfspecifedfinfopticalf characteristicf table. ground connections two f ground f pinsf are f provided f to fk eepf thef internal f icf logic f ground f clean.f the f designer f can,f whenf necessary, f route f thef analogf ground f for f thef ledf drivers f separately f from f thef logic f ground f until f anf appropriate f ground f planef isf available. f onf longf inte r connections f between f thef display f andf thef hostf system, f thef designer f can fkeepf voltage f drops f onf thef analogf ground f from f afec tingf thef display f logic f levels f byf isolatingfthef twof grounds. the f logic f ground f should f be f co n nected f to f the f same f ground f pote n tial f as f the f logic f interface f circuitry. f the f analog f ground f and f the f logic f ground f should f be f connected f at f a f common f ground f which f can f withstand f the f cu r rent f induced f by f the f switc h ing f led f drivers. f when f separate f ground f connections f are f used, f thef analogf ground f canf vary f from f -0.3f vf to f +0.3f vf withf respect f to f thef logic f ground. f vol tagef below f -0.3f vf canf causef allf dotsf to f bef on.f voltage f above f +0.3f vf canf causef dimmingfandfdotf mismatch. solder and post solder cleaning note: f freon f vapors f canf causef thef blackf paint f to f peelf of f thef display. f see f application f note f 1027f for f information f onf soldering fandfpostfsolderf cleaning. contrast enhancement (filtering) see f application f note f 1015f for f information f onf contrast f f enhancement.

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