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february 2008 rev 1 1/30 AN2710 application note safe gpio port configuration in str7xx devices introduction the general purpose i/o (gpio) ports of str7xx devices are programmable by firmware in several modes: input, output, alternate function, output open drain, output push-pull, bidirectional weak push-pull and high impedance. it is possible to manage the analog input mode as well. this application note describes the best way of configuring the gpio ports. www.st.com
contents AN2710 2/30 contents 1 str71x & str73x i/o ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.2 general-purpose i/o (gpio) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.2.1 alternate function i/o (af) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.2.2 input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.2.3 input pull-up/pull-down configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1.2.4 output configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1.2.5 alternate function configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 1.2.6 high impedance-analog input configuration . . . . . . . . . . . . . . . . . . . . . 11 2 str75x general-purpose i/o ports (gpio) . . . . . . . . . . . . . . . . . . . . . . 12 2.1 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.1.1 general purpose i/o (gpio) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.1.2 alternate functions (af) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.1.3 input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.1.4 output configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2.1.5 alternate function configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.1.6 analog input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3 str7x atomic bit set or bi t reset (bit-wise write oper ations) . . . . . . . 19 4 recommended configur ation sequence . . . . . . . . . . . . . . . . . . . . . . . . 20 4.1 from alternate push-pull . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.2 from alternate function open drain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.3 from output push-pull . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.4 from output open drain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.5 from input/output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.6 from input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.7 from analog input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5 conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
AN2710 list of tables 3/30 list of tables table 1. str71x port bit configuration table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 2. str73x port bit configuration table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 3. str75x port bit configuration table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 table 4. alternate push-pull to analog input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 5. alternate push-pull to input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 6. alternate push-pull to input pull-up/pull-down. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 7. alternate push-pull to output open drain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 0 table 8. alternate push-pull to output push-pull . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 9. alternate push-pull to alternate function open drain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 10. alternate function open drain to analog input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 11. alternate function open drain to input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 12. alternate function open drain to input pull-up/pull-down. . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 13. alternate function open drain to output open drain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 14. alternate function open drain to output push-pull . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 15. alternate function open drain to alternate function push-pull . . . . . . . . . . . . . . . . . . . . . . . 22 table 16. output push-pull to analog input. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 17. output push-pull to input. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 18. output push pull to input pull-up/pull-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 19. output push-pull to output open drain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 20. output push-pull to alternate function open drain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 21. output push-pull to alternate function push-pull . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 22. output open drain to analog input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 23. output open drain to input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 24. output open drain to input pull-up/pull-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 25. output open drain to output push-pull . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 26. output open drain to alternate function open drain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 27. output open drain to alternate function push-pull . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 28. input pull-up/pull-down to analog input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 29. input pull-up/pull-down to input. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 30. input pull-up/pull-down to output open drain. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 31. alternate input pull-up/pull-down to output open drain sequence. . . . . . . . . . . . . . . . . . . . 24 table 32. input pull-up/pull-down to output push-pull . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 table 33. alternate sequence: input pull-up/pull-down to output push-pull . . . . . . . . . . . . . . . . . . . . 24 table 34. input pull-up/pull-down to alternate function open drain . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 35. alternate sequence: input pull-up/pull-down to alternate function open drain . . . . . . . . . . 24 table 36. input pull-up/pull-down to alternate function push-pull . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 37. input to analog input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 38. input to input pull-up/pull-down. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 39. input to output open drain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 40. alternate input to output open drain sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 41. input to output push-pull . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 42. input to alternate function open drain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 43. alternate sequence: input to alternate function open drain . . . . . . . . . . . . . . . . . . . . . . . . 26 table 44. input to alternate function push-pull . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 45. analog input to input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 46. analog input to input pull-up/pull-down. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 47. analog input to output push-pull . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 48. analog input to output open drain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
list of tables AN2710 4/30 table 49. analog input to alternate function open drain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 table 50. analog input to alternate function push-pull . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 table 51. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
AN2710 list of figures 5/30 list of figures figure 1. basic structure of an i/o port bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 3. input pull-up/pull-down configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 4. output configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 5. alternate function configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 6. high impedance-analog input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 7. basic structure of an i/o port bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 8. input floating/pull-up/pull-down configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 9. output configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 10. alternate function configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 11. high impedance-analog input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
str71x & str73x i/o ports AN2710 6/30 1 str71x & str73x i/o ports 1.1 functional description each of the general purpose i/o ports has three 16-bit configuration registers (pc0, pc1, pc2) and one 16-bit data register (pd). subject to the specific hardware characteristics of each i/o port listed in the ?pin description? table provided in the relevant str7x datasheet, each port bit can be individually configured as an input, output, alternate function, etc. each i/o port bit is freely programmable, however the i/o port registers have to be accessed as 16-bit words. 32-bit or byte access is not allowed. figure 1 shows the basic structure of an i/o port bit. figure 1. basic structure of an i/o port bit i/o pin i/o data register analog input alternate function (out) alternate function (in) push-pull tristate open drain weak push-p ull ttl cmos input latch output latch to on-chip peripheral read/write from on-chip peripheral ai14915
AN2710 str71x & str73x i/o ports 7/30 1.2 general-purpose i/o (gpio) at reset the i/o ports are configured as general-purpose (memory mapped i/o). when the user writes to the i/o data register, the data are always loaded into the output latch. the output latch holds the data to be output while the input latch captures the data present on the i/o pin. a read access to the i/o data register reads the input latch or the output latch depending on whether the port bit is configured as an input or an output. table 1. str71x port bit configuration table (1) 1. af = alternate function, ain = analog input, hiz = high impedance, in = input, ipupd = input pull-up/pull- down, od = open drain, out = output, pp = push-pull, tr i = tristate, ttl = ttl input levels, wp = weak push-pull. na = not applicable. in output mode, a read ac cess the port will get the output latch value). see figure 4 . port configuration registers (bit) values pc0(n) 01010101 pc1(n) 00110011 pc2(n) 00001111 configuration hiz/ain in in ipupd out out af af output tri tri tri wp od pp od pp input ain ttl cmos cmos na na cmos cmos table 2. str73x port bit configuration table (1) 1. af = alternate function, ain = analog input, hiz = high impedance, in = input, ipupd = input pull-up/pull- down, od = open drain, out = output, pp = push-pull, tri = tristate, ttl = ttl input levels, wp = weak push-pull. port configuration registers (bit) values pc0(n) 01 0 10101 pc1(n) 00 1 10011 pc2(n) 00 0 01111 configuration hiz/ain in reserved ipupd out out af af output tri tri wp (2) 2. depending on the pd(n) value, it behaves as weak pull-up (pd=1) or weak pull-down (pd=0) od pp od pp input - ttl ttl ttl ttl ttl ttl
str71x & str73x i/o ports AN2710 8/30 1.2.1 alternate function i/o (af) the alternate functions for each pin are listed in the datasheet. configuring a port bit as alternate function will disconnect the output latch and co nnect the pin to the output signal of an on-chip peripheral. for alternate function inputs, the port must be configured in input mode and the input pin must be driven externally. note: it is also possible to emulate the afi input pin by firmware by programming the gpio controller. in this case, the port should be configured in alternate function output mode. and obviously, the corres ponding port should not be driven externally as it will be driven by the firmware using the gpio controller. for af output or input-output, the port bit must be in af configuration. external interrupts/wakeup lines some ports have external interrupt capability (s ee datasheet). to use ex ternal interrupts, the port must be configured in input mode. for more information on interrupts and wakeup lines, refer to the reference manual. 1.2.2 input configuration when the i/o port is programmed as input: the output buffer is forced tristate the data present on the i/o pin are sampled into the input latch with every clock cycle a read access to the data register gets the value in the input latch. figure 2 shows the input configuration of the i/o port bit. figure 2. input configuration 1. for str73x only. i/o pin i/o data register analog input alternate function (out) alternate function (in) tristate ttl cmos (1) input latch output latch ai14916
AN2710 str71x & str73x i/o ports 9/30 1.2.3 input pull-up/pul l-down configuration when the i/o port is programmed as input pull-up/pull-down: the output buffer is turned on in weak push-pull configuration and the firmware can write the appropriate level into the output latch to activate the weak pull-up or pull-down as required. the data in the output latch drive the i/o pin (a logic zero activates a weak pull-down, a logic one activates a weak pull-up). a read access to the i/o data register gets the input latch value. figure 3 shows the input pull-up/pull-down configuration of the i/o port. figure 3. input pull-up/pull-down configuration 1.2.4 output configuration when the i/o port is programmed as output: the output buffer is turned on in open drain or push-pull configuration the data in the output latch drive the i/o pin a read access to the i/o data register gets the output latch value. figure 4 shows the output configuration of the i/o port bit. i/o pin weak push-pull analog input when aien = 1 pu pd alternate function (in) alternate function (out) i/o port data register output latch input latch ai14917
str71x & str73x i/o ports AN2710 10/30 figure 4. output configuration 1.2.5 alternate function configuration when the i/o port is programmed as alternate function: the output buffer is turned on in open drain or push-pull configuration the output buffer is driven by the signal coming from the peripheral (alternate function out) the data present on the i/o pin are sampled into the input latch with every clock cycle a read access to the data register gets the value in the input latch. figure 5 shows the alternate function configuration of the i/o port bit. figure 5. alternate function configuration i/o pin i/o data register analog input alternate function (out) alternate function (in) open drain push-pull input latch output latch ai14918 i/o pin i/o data register analog input alternate function (out) alternate function (in) open drain push-pull input latch output latch ai14919
AN2710 str71x & str73x i/o ports 11/30 1.2.6 high impedance-analog input configuration when the i/o port is programmed as high impedance-analog input configuration: the output buffer is forced tristate the input buffer is disabled (the alternate function input is forced to a constant value) the analog input can be input to an analog peripheral a read access to the i/o data register gets the output latch value figure 6 shows the high impedance-analog input configuration of the i/o port bit. figure 6. high impedance-analog input configuration refer to the str71x and str73x reference manuals for the i/o port register description. i/o pin i/o port data register alternate function (out) input latch output latch tristate analog input ai14920
str75x general-purpose i/o ports (gpio) AN2710 12/30 2 str75x general-purpose i/o ports (gpio) 2.1 functional description each of the general-purpose i/o ports has three 32-bit configuration registers (pc0, pc1, pc2), a 32-bit data register (pd) and a 32-bit mask register (pm). subject to the specific hardware characteristics of each i/o port listed in the datasheet, each port bit of the general-purpose i/o (gpio) ports, can be individually configured by firmware in several modes: input floating input pull-up input pull-down analog input output open-drain output push-pull alternate function each i/o port bit is freely programmable, however the i/o port registers have to be accessed as 32-bit words (half-word or byte accesses are not allowed). the purpose of the mask register is to allow atomic read/modify accesses (or bitwise write accesses) to any of the gpio registers. in this way, there is no risk of an irq occurring between a read access and a modify access. figure 7 shows the basic structure of an i/o port bit. figure 7. basic structure of an i/o port bit i/o data register alternate function output alternate function input push-pull, open-drain or disabled input data latch output data latch read/write from on-chip peripheral to on-chip peripheral output control analog input on/off pull pull on/off i/o pin v dd_io v dd_io v ss v ss ttl schmitt trigger v ss v dd_io protection diode protection diode on/off input driver output driver down up analog on/off switch afoen p-mos n-mos ai14922
AN2710 str75x general-purpose i/o ports (gpio) 13/30 2.1.1 general purpose i/o (gpio) during and just after reset the alternate functions are not active and the i/o ports are configured in input floating mode (pxc2=0, pxc1=0, pxc0=1). when configured as output, the value written to the i/o data register is loaded into the output latch. the output latch holds the data to be output. it is possible to use the output driver in push-pull or open-drain mode (only the n-mos is activated when outputting 0). the input latch captures the data present on the i/o pin at every apb clock cycle. a read access to the i/o data register reads the input latch or the output latch depending on whether the port bit is configured as input or output open-drain or push-pull. all gpio pins features weak internal pull-up and pull-down resistors which can or not be activated when configured as inputs. in all low-power modes, except for the standby mode, gpio states are preserved. in standby mode, all gpios are put in high impedance with the exception of the wkp_stdby pin which is kept in input mode. note: care must be taken when configuring an i/o port from one mode to another, because an unexpected intermediate state could disturb the application. program the registers using only intermediate states that do not disturb your application. for instance, it is important to know that in "analog input" mode, the schmitt trigger output is forced to '0'. 2.1.2 alternate functions (af) it is necessary to program the port bit configuration register before using a default alternate function. for alternate function inputs, the port must be configured in input mode (floating, pull- up or pull-down) and the input pin must be driven externally note: it is also possible to emulate the afi input pin by firmware by programming the gpio controller. in this case, the port should be configured in alternate function output mode. table 3. str75x port bit configuration table configuration mode input buffer pxd register pxc2 register pxc1 register pxc0 register read access write access input input floating (reset state) input floating i/o pin don?t care 0 0 1 input floating input floating i/o pin don?t care 0 1 0 input pull-down ttl pull-down i/o pin 0 0 1 1 input pull-up ttl pull-up i/o pin 1 0 1 1 analog input ain 0 don?t care 0 0 0 output output open-drain ttl floating i/o pin 0 or 1 1 0 0 output push-pull not used last value written 0 or 1 1 0 1 alternate function open-drain ttl floating i/o pin don?t care 1 1 0 alternate function push-pull ttl floating i/o pin don?t care 1 1 1
str75x general-purpose i/o ports (gpio) AN2710 14/30 and obviously, the corres ponding port should not be driven externally as it will be driven by the firmware using the gpio controller. for alternate function outputs, the port must be configured in alternate function output mode (push-pull or open-drain). for bidirectional alternate functions, the port bit must be configured in alternate function output mode (push-pull or open-drain). in this case the input driver is configured in input floating mode configuring a port bit as alternate functi on output will disconnec t the output latch and connect the pin to the output signal of an on-chip peripheral. if firmware configures a gpio pin as alternate function output, but no peripheral output alternate function exists for that pin (refer to the datasheet pin description table), its output is not specified. special case of ssp bidirect ional alternate functions when using the ssp, the miso, mosi, nss and sck alternate functions consist of bidirectional alternate functions. they must be configured as alternate function output through the port configuration register: when configuring the ssp in master mode, the miso pi n is automatically used as an alternate function input and t he output driver is automati cally disabled (even if still programmed as alternated function output in the port configuration registers). in addition, when configured in master mode, the mosi pin is always driven (never left hi-z) even if the ssp is in idle mode (no transmission) when configuring the ssp in slave mode, the mosi, sck and nss pins are automatically configured as alternate functions inputs and the output drivers are automatically disabled (even if still programme d as alternated function outputs in the port configuration registers). in addition, when configured in slave mode, the miso pin is left hi-z when the nss pin is high or when the sod control bi t (slave output disable) is set. configuring i 2 c alternate functions after reset release, the i 2 c is able to detect a start condition on the sda and scl lines even if the i 2 c is not configured. (refer to the sda/scl line control section in the str75x reference manual) consequently, care must be taken when configuring sda and scl as alternate function open-drain in order not to create parasitic falling edges. the states to avoid are: output 0 input pull-down analog input (because the output of the schmitt trigger goes to 0)
AN2710 str75x general-purpose i/o ports (gpio) 15/30 consequently, the configuration must be done in the following order: 1. reset state: pc2,1,0=001 pd=0: input floating -> sda=scl = '1' due to external pull-up 2. write pd=1: pc2,1,0=001 pd=1: input floating -> sda=scl = '1' due to external pull-up 3. write pc1=1: pc2,1,0=011 pd=1: input pull-up -> sda=scl = '1' due to internal and external pup 4. write pc0=0: pc2,1,0=010 pd=1: input floating -> sda=scl = '1' due to external pull-up 5. write pc2=1: pc2,1,0=110 pd=1: af open drain -> sda=scl = '1' because the i2c does not drive the line when disabled (i2c pe=0) 2.1.3 input configuration when the i/o port is programmed as an input: the output buffer is disabled the schmitt trigger input is activated the analog switch is disabled the weak pull-up and pull-down resistors are activated or not depending on the input configuration (pull-up, pull-down or floating): the data present on the i/o pin are sampled into the input latch with every apb clock cycle a read access to the data register gets the value in the input latch. figure 8 shows the input configuration of the i/o port bit. figure 8. input floating/pull- up/pull-down configurations output data latch i/o data register input data latch read/write on/off pull- pull- on/off i/o pin v dd_io v ss ttl schmitt trigger v ss v dd_io protection diode protection diode on input driver output driver down up ai14923
str75x general-purpose i/o ports (gpio) AN2710 16/30 2.1.4 output configuration when the i/o port is programmed as an output: the output buffer is enabled: ? open drain mode: a ?0? in the output latch activates the n-mos while a ?1? in the output latch leaves the port in hi-z (the p-mos is never activated) ? push-pull mode: a ?0? in the output latch activates the n-mos while a ?1? in the output latch activates the p-mos the schmitt trigger input is activated the analog switch is disabled the weak pull-up and pull-down resistors are disabled the data present on the i/o pin is sample d into the input latch with every apb clock cycle a read access to the i/o data register gets: ? the output latch value in push-pull mode (which corresponds to the last data written) ? the input latch value in open-drain mode figure 9 shows the output configuration of the i/o port bit. figure 9. output configuration push-pull or open-drain output control i/o pin v dd_io v ss ttl schmitt trigger v ss v dd_io protection diode protection diode on input driver output driver output data latch i/o data register input data latch read/write p-mos n-mos ai14924
AN2710 str75x general-purpose i/o ports (gpio) 17/30 2.1.5 alternate function configuration when the i/o port is programmed as an alternate function: the output buffer is turned on in open drain or push-pull configuration the output buffer is driven by the signal coming from the peripheral (alternate function out) the schmitt trigger input is activated the analog switch is disabled the weak pull-up and pull-down resistors are disabled the data present on the i/o pin are sampled into the input latch with every apb clock cycle a read access to the i/o data register gets: ? the output latch value in push-pull mode (which corresponds to the last data written) ? the input latch value in open-drain mode figure 10 shows the alternate function configuration of the i/o port bit. figure 10. alternate function configuration 2.1.6 analog input configuration when the i/o port is programmed as an analog input: the output buffer is disabled the schmitt trigger input is de-activated, providing zero consumption for every analog value of the i/o pin. the output of the schmitt trigger is forced to a constant value (0). the weak pull-up and pull-down resistors are disabled the analog switch is enabled by the adc each time a conversion is in progress read access to the i/o data register gets the input latch value (0) figure 11 shows the high impedance-analog input configuration of the i/o port bit. i/o data register alternate function output alternate function input push-pull or open-drain input data latch output data latch read/write from on-chip peripheral to on-chip peripheral output control i/o pin v dd_io v ss ttl schmitt trigger v ss v dd_io protection diode protection diode on input driver output driver p-mos n-mos ai14925
str75x general-purpose i/o ports (gpio) AN2710 18/30 figure 11. high impedance-analog input configuration refer to str75x reference manual for the i/o port registers description. i/o data register input data latch output data latch read/write from on-chip peripheral to on-chip peripheral analog input i/o pin ttl schmitt trigger v ss v dd_io protection diode protection diode off input driver analog on when converting switch 0 ai14926
AN2710 str7x atomic bit set or bit reset (bit-wise write operations) 19/30 3 str7x atomic bit set or bit reset (bit-wise write operations) the bitwise instructions proposed by the "arm7 instruction set" only apply to the internal arm7 ri registers. consequently, it is not possible to directly perform bitwise write operations (like a bit set or a bit clear) on an i/o port register. three operations are required: load the whole port data register into an ri register modify the ri register using the bitwise arm7 instruction store back the whole result from the ri register into the port data register since this is not an atomic operation, an interrupt subroutine (isr) may happen to be served between the load access and the store access. if the isr sets or clears some other port register bits, the port might be corrupted when the data are stored back into the port register. consequently, if the interrupt subroutine s are susceptible to modify the other bits of the i/o port being written, it is recommended to disable the interrupts during bitwise write operations. with the str75x, however, this is not needed because it features a port mask register. the purpose of the port mask register is to allow atomic read/modify accesses (or bitwise write operations) to any of the gpio registers. in this case, you simply need to: first program the port mask register (pxm) to mask the bits that you do not want modified then, program the port registers (pxc2, pxc1, pxc0 and pxd). the masked bits will not be modified. this mask applies to all the configuration and data registers (pxc3, pxc1, pxc0 and pxd). note: it is recommended that each interrupt subroutine that accesses the port registers stacks the port mask register. otherwise, an interrupt occurring between the modification of the pxm register and a bit manipulation on the pxd registers might lead to a corruption of the port bits.
recommended configuration sequence AN2710 20/30 4 recommended configuration sequence it appears that the safest sequence for writing the port configuration registers in most situations is: pc2 - pc1 - pc0. exceptions to this would be in the following transitions: 1. input/output to output open drain 2. input/output to output push-pull 3. input/output to alternate function open drain 4. input to output open drain 5. input to alternate function open drain in all of these cases the safest sequence for writing the pc registers is: pc0 - pc1 - pc2. note: it is possible to have a level change on a pin during transition between open drain and push- pull output modes. the resulting output level may be determined by the state of the gpio output, alternate function output and/or external pull-up/down (if any). the user needs to be aware of the output state when changing the pin configuration. 4.1 from alternate push-pull if the port is set to alternate push-pull, use the following sequences to change modes. table 4. alternate push-pull to analog input pc2 - 0 ipupd (1) 1. input pull-up/pull-down. pc1 - 0 input pc0 - 0 no change table 5. alternate push-pull to input pc2 - 0 ipupd (1) 1. input pull-up/pull-down. pc1 - 0 input pc0 - 1 no change table 6. alternate push-pull to input pull-up/pull-down pc2 - 0 ipupd (1) 1. input pull-up/pull-down. pc1 - 1 no change pc0 - 1 no change table 7. alternate push-pull to output open drain pc2 - 1 no change pc1 - 0 output push-pull pc0 - 0 output open drain
AN2710 recommended configuration sequence 21/30 4.2 from alternate function open drain if the port is set to alternate function open drain, use the following sequences to change modes. table 8. alternate push-pull to output push-pull pc2 - 1 no change pc1 - 0 output push-pull pc0 - 1 no change table 9. alternate push-pull to alternate function open drain pc2 - 1 no change pc1 - 1 no change pc0 - 0 alternate function open drain table 10. alternate function open drain to analog input pc2 - 0 reserved/input pc1 - 0 analog input pc0 - 0 no change table 11. alternate function open drain to input pc2 - 0 reserved/input pc1 - 0 analog input pc0 - 1 in table 12. alternate function open drain to input pull-up/pull-down pc2 - 0 reserved/input (1) 1. reserved for str73x only pc1 - 1 no change pc0 - 1 ipupd (2) 2. input pull-up/pull-down. table 13. alternate function open drain to output open drain pc2 - 1 no change pc1 - 0 output open drain pc0 - 0 no change table 14. alternate function open drain to output push-pull pc2 - 1 no change pc1 - 0 output open drain pc0 - 1 output push pull
recommended configuration sequence AN2710 22/30 4.3 from output push-pull if the port is set to output push-pull, use the following sequences to change modes. table 15. alternate function open drain to alternate function push-pull pc2 - 1 no change pc1 - 1 no change pc0 - 1 alternate function push-pull table 16. output push-pull to analog input pc2 - 0 input pc1 - 0 no change pc0 - 0 analog input table 17. output push-pull to input pc2 - 0 input pc1 - 0 no change pc0 - 1 no change table 18. output push pull to input pull-up/pull-down pc2 - 0 input pc1 - 1 ipupd (1) 1. input pull-up/pull-down. pc0 - 1 no change table 19. output push-pull to output open drain pc2 - 1 no change pc1 - 0 no change pc0 - 0 output open drain table 20. output push-pull to alternate function open drain pc2 - 1 no change pc1 - 1 alternate function push-pull pc0 - 0 alternate function open drain table 21. output push-pull to alternate function push-pull pc2 - 1 no change pc1 - 1 alternate function push-pull pc0 - 1 no change
AN2710 recommended configuration sequence 23/30 4.4 from output open drain if the port is set to output open drain, use the following sequences to change modes. 4.5 from input/output if the port is set to input/output, use the following sequences to change modes. table 22. output open drain to analog input pc2 - 0 analog input pc1 - 0 no change pc0 - 0 no change table 23. output open drain to input pc2 - 0 analog input pc1 - 0 no change pc0 - 1 input table 24. output open drain to input pull-up/pull-down pc2 - 0 analog input pc1 - 1 reserved/input (1) 1. reserved for str73x only pc0 - 1 input/output table 25. output open drain to output push-pull pc2 - 1 no change pc1 - 0 no change pc0 - 1 output push-pull table 26. output open drain to alternate function open drain pc2 - 1 no change pc1 - 1 alternate function push-pull pc0 - 0 no change table 27. output open drain to alternate function push-pull pc2 - 1 no change pc1 - 1 alternate function open drain pc0 - 1 alternate function push-pull table 28. input pull-up/pull-down to analog input pc2 - 0 no change pc1 - 0 input pc0 - 0 analog input
recommended configuration sequence AN2710 24/30 alternatively, the following sequence can be used: alternatively, the following sequence can be used: alternatively, the following sequence can be used: table 29. input pull-up/pull-down to input pc2 - 0 no change pc1 - 0 input pc0 - 1 no change table 30. input pull-up/pull-down to output open drain pc2 - 1 alternate function push-pull (1) 1. glitch possible if the alter nate function is a test function. pc1 - 0 output push-pull (2) 2. glitch possible if output=1 with no external pull-up. pc0 - 0 output open drain table 31. alternate input pull-up/pull-down to output open drain sequence pc0 - 0 reserved pc1 - 0 analog input pc2 - 1 output open drain table 32. input pull-up/pull-down to output push-pull pc2 - 1 alternate function push-pull (1) 1. glitch possible if alternate function is a test function. pc1 - 0 output push-pull pc0 - 1 no change table 33. alternate sequence: input pull-up/pull-down to output push-pull pc0 - 1 no change pc1 - 0 input pc2 - 1 output push-pull table 34. input pull-up/pull-down to alternate function open drain pc2 - 1 alternate function push-pull (1) 1. glitch possible if alternate function is a test function and if outpu=1 with no external pull-up. pc1 - 1 no change pc0 - 0 alternate function open drain table 35. alternate sequence: input pull-up/pull-down to alternate function open drain pc0 - 0 reserved/input pc1 - 1 no change pc2 - 1 alternate function open drain
AN2710 recommended configuration sequence 25/30 4.6 from input if the port is set to input, use the following sequences to change modes. alternatively, the following sequence can be used: table 36. input pull-up/pull-down to alternate function push-pull pc2 - 1 alternate function push-pull pc1 - 1 no change pc0 - 1 no change table 37. input to analog input pc2 - 0 no change pc1 - 0 no change pc0 - 0 analog input table 38. input to input pull-up/pull-down pc2 - 0 no change pc1 - 0 ipupd pc0 - 1 no change table 39. input to output open drain pc2 - 1 output push-pull (1) 1. glitch possible if output =1 with no external pull-up pc1 - 0 no change pc0 - 0 output open drain table 40. alternate input to output open drain sequence pc0 - 0 analog input pc1 - 0 no change pc2 - 1 output open drain table 41. input to output push-pull pc2 - 1 alternate function push-pull pc1 - 0 output push-pull pc0 - 1 no change
recommended configuration sequence AN2710 26/30 alternatively, the following sequence can be used: 4.7 from analog input if the port is set to analog input, use the following sequences to change modes. table 42. input to alternate function open drain pc2 - 1 output push-pull (1) 1. glitch possible if output differs from alt output value pc1 - 1 alternate function push-pull (2) 2. glitch possible if output = 1 with no external pull-up pc0 - 0 no change (3) 3. glitch possible if alternat e function is a test function table 43. alternate sequence: input to alternate function open drain pc0 - 0 analog input pc1 - 1 reserved pc2 - 1 alternate function open drain table 44. input to alternate function push-pull pc2 - 1 output push-pull pc1 - 1 alternate function push-pull pc0 - 1 no change table 45. analog input to input pc2 - 0 no change pc1 - 0 no change pc0 - 1 input table 46. analog input to input pull-up/pull-down pc2 - 0 no change pc1 - 1 reserved pc0 - 1 ipupd (1) 1. input pull-up/pull-down. table 47. analog input to output push-pull pc2 - 1 output open drain pc1 - 0 no change pc0 - 1 output push-pull
AN2710 recommended configuration sequence 27/30 table 48. analog input to output open drain pc2 - 1 output open drain pc1 - 0 no change pc0 - 0 no change table 49. analog input to alternate function open drain pc2 - 1 output open drain pc1 - 1 alternate function push-pull pc0 - 0 no change table 50. analog input to alternate function push-pull pc2 - 1 output push-pull pc1 - 1 alternate function open drain pc0 - 1 alternate function push-pull
conclusion AN2710 28/30 5 conclusion this application note gives practical information on how to configure the gpio ports in str7xx mcus. it also provide the safest sequences to change i/o port configurations while avoiding any unexpected intermediate state that might disturb an application.
AN2710 revision history 29/30 6 revision history table 51. document revision history date revision changes 14-feb-2008 1 initial release.
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