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| rev. 0.2 11/11 copyright ? 2011 by silicon laboratories an555 an555 si483 x -b/si4820/24 a ntenna , s chematic , l ayout , and d esign g uidelines 1. introduction this document provides general si483x-b/si4820/24 design and am/fm/sw antenna selection guidelines, including schematic, bom and pcb la yout. all users should follow the si 483x-b/si4820/24 design guidelines presented in section 2 and section 3 and choose the appropriate antennas based on the applications and device used according to sections 4 through 8. table 1. part selection guide ? part number ? general description function fm antenna am antenna sw antenna fm receiver fm receiver am receiver sw receiver headphone whip ferrite loop air loop whip si4831-b30 wheel-tuned am/fm receiver ? ? ? ? ? ? si4835-b30 wheel-tuned am/fm/sw receiver ? ? ? ? ? ? ? ? SI4835-B31 wheel-tuned am/fm/sw receiver, enhanced sw tuning feel ???????? si4820-a10 entry level wheel-tuned am/fm receiver, mono audio ?? ???? si4824-a10 entry level wheel-tuned am/fm/sw receiver, mono audio ????????
an555 2 rev. 0.2 2. frequency band d efinition and selection five fm bands and five am bands are defined for t he si4831-b/si4820. the si4835-b/si4824 has 16 sw bands available. in each fm band, the parts also offer tw o de-emphasis selections and two led stereo separation threshold selections, wh ich result in a total of 41 combinations. this section shows the detailed band definition and selection information. 2.1. band definition for the si483x-b/si4820/24, the fm band definition is a combination of frequency range, de-emphasis and led stereo separation threshold. customers should choose th e band according to not only frequency range, but also de-emphasis setting and led stereo separation requirements. for am and sw, simply choose the band according to the frequency range desired. table 2. band sequence definition band number band name band frequency range de-emphasis stereo led on threshold (only for si483x-b) total r to gnd (k ? , 1%) band1 fm1 87?108 mhz 50 s separation = 6 db, rssi = 20 47 band2 fm1 87?108 mhz 50 s separation = 12 db, rssi = 28 57 band3 fm1 87?108 mhz 75 s separation = 6 db, rssi = 20 67 band4 fm1 87?108 mhz 75 s separation = 12 db, rssi = 28 77 band5 fm2 86.5?109 mhz 50 s separation = 6 db, rssi = 20 87 band6 fm2 86.5?109 mhz 50 s separation = 12 db, rssi = 28 97 band7 fm2 86.5?109 mhz 75 s separation = 6 db, rssi = 20 107 band8 fm2 86.5?109 mhz 75 s separation = 12 db, rssi = 28 117 band9 fm3 87.3?108.25 mhz 50 s separation = 6 db, rssi = 20 127 band10 fm3 87.3?108.25 mhz 50 s separation = 12 db, rssi = 28 137 band11 fm3 87.3?108.25 mhz 75 s separation = 6 db, rssi = 20 147 band12 fm3 87.3?108.25 mhz 75 s separation = 12 db, rssi = 28 157 band13 fm4 76?90 mhz 50 s separation = 6 db, rssi = 20 167 band14 fm4 76?90 mhz 50 s separation = 12 db, rssi = 28 177 an555 rev. 0.2 3 band15 fm4 76?90 mhz 75 s separation = 6 db, rssi = 20 187 band16 fm4 76?90 mhz 75 s separation = 12 db, rssi = 28 197 band17 fm5 64?87 mhz 50 s separation = 6 db, rssi = 20 207 band18 fm5 64?87 mhz 50 s separation = 12 db, rssi = 28 217 band19 fm5 64?87 mhz 75 s separation = 6 db, rssi = 20 227 band20 fm5 64?87 mhz 75 s separation = 12 db, rssi = 28 237 band21 am1 520?1710 khz 247 band22 am2 522?1620 khz 257 band23 am3 504?1665 khz 267 band24 am4 520?1730 khz 277 band25 am5 510?1750 khz 287 band26 sw1 5.6?6.4 mhz 297 band27 sw2 5.95?6.2 mhz 307 band28 sw3 6.8?7.6 mhz 317 band29 sw4 7.1?7.6 mhz 327 band30 sw5 9.2?10 mhz 337 band31 sw6 9.2?9.9 mhz 347 band32 sw7 11.45?12.25 mhz 357 band33 sw8 11.6?12.2 mhz 367 band34 sw9 13.4?14.2 mhz 377 band35 sw10 13.57?13.87 mhz 387 band36 sw11 15?15.9 mhz 397 band37 sw12 15.1?15.8 mhz 407 band38 sw13 17.1?18 mhz 417 band39 sw14 17.48?17.9 mhz 427 band40 sw15 21.2?22 mhz 437 band41 sw16 21.45?21.85 mhz 447 table 2. band sequence definition (continued) band number band name band frequency range de-emphasis stereo led on threshold (only for si483x-b) total r to gnd (k ? , 1%) an555 4 rev. 0.2 2.2. si483x-b/si482 0/24 band selection refer to figure 1 below for the band selection circuits. selecting a band determines the resistance value from the band select pin to gnd. to select a specific band, you need to ensure two things: 1. total value of resistance from the band to gnd is equal to the value specified in table 2 2. total resistance from tune1 to gnd is 500 k ? in 1% tolerance the following sections describe some commonly used bands and their respective selection circuits. 2.2.1. typical 12-band application figure 1 and table 3 illustrate the band and resistor value details for a typical 12-band application. an555 rev. 0.2 5 figure 1. typical 12-band selection circuit fm1 (87mhz - 108mhz) fm5 (64mhz - 87mhz) am1 (520khz - 1710khz) fm4 (76mhz - 90mhz) sw1 (5.6mhz - 6.4mhz) sw3(6.8mhz - 7.6mhz) sw5(9.2mhz - 10.0mhz) sw7(11.45mhz - 12.25mhz) sw9 (13.4mhz - 14.2mhz) sw11 (15mhz - 15.9mhz) sw13 (17.1mhz - 18mhz) sw15 (21.2mhz - 22mhz) si4835/24 only 12 3 4 5 6 7 8 9 10 11 12 13 s2 r15 20k 1% r10 20k 1% r12 20k 1% r11 20k 1% r14 20k 1% r9 20k 1% r7 20k 1% r8 50k 1% r28 40k 1% r29 120k 1% r33 20k 1% r35 20k 1% r36 33k 1% r43 30k 1% r44 47k 1% ba nd tune1 an555 6 rev. 0.2 table 3. typical 12-band selection band number band name band frequency range de-emphasis stereo led on threshold (only for si483x-b) total r to gnd (k ? , 1%) band3 fm1 87?108 mhz 75 s separation = 6 db, rssi = 20 67 band15 fm4 76?90 mhz 75 s separation = 6 db, rssi = 20 187 band19 fm5 64?87 mhz 75 s separation = 6 db, rssi = 20 227 band21 am1 520?1710 khz 247 band26 sw1 5.6?6.4 mhz 297 band28 sw3 6.8?7.6 mhz 317 band30 sw5 9.2?10 mhz 337 band32 sw7 11.45?12.25 mhz 357 band34 sw9 13.4?14.2 mhz 377 band36 sw11 15?15.9 mhz 397 band38 sw13 17.1?18 mhz 417 band40 sw15 21.2?22 mhz 437 an555 rev. 0.2 7 2.2.2. typical 2-band application for europe table 4 and figure 2 show the band and resistor value details for a typical european 2-band application. figure 2. typical 2-band selection circuit for europe table 4. typical european 2-band selection band number band name band frequency range de-emphasis stereo led on threshold (only for si483x-b) total r to gnd (k ? , 1%) band2 fm1 87?108 mhz 50 s separation = 12 db, rssi = 28 57 band22 am2 522?1620 khz 257 an555 8 rev. 0.2 2.2.3. typical 2-band application for us table 5 and figure 3 show the band and resistor value details for a typical 2-band application for the u.s. figure 3. typical 2-band selection circuit for us table 5. typical u.s. 2-band selection band number band name band frequency range de-emphasis stereo led on threshold (only for si483x-b) total r to gnd (k ? , 1%) band4 fm1 87?108 mhz 75 s separation = 12 db, rssi = 28 77 band21 am1 520?1710 khz 247 an555 rev. 0.2 9 3. si483x-b/si4820/24 ss op schematic and layout this section shows the typical schematic and layout required for optimal si483x-b/si4820/24 performance. there are basically two working modes for the si483x-b : ?volume? and ?bass/treble? modes. adding a pull-up resistor of 10 k on pin2 station sets the chip in "volume" mode and removing the pull-up resistor sets the chip in "bass/treble" mode, as illustrated in figure 4. when working in bass/treble mode, the bass/treble can be controlled via two push buttons with eight levels or by a slide switch with two or three levels. when working in ?volume? mode, tuner audio output volume can be adju sted with 2 push buttons in 32 steps (2 db per step). additionally, the default power up volume level can be set with pull-up/down resistors. compared with the si483x- b, si4820/24 only works in ?volume? mode, not ?bass/treb le? mode. the following sect ions describe in detail the applications circuits for different working modes. figure 4. si483x-b mode selection an555 10 rev. 0.2 3.1. si483x-b/si4820/24 basic volume mode applications circuits figure 5 and figure 6 illustrate the basic applications circuits for typica l 4-band fm/am radios if using si4831-b/ si4820 or 12-band fm/am/sw radios if using si4835-b/si 4824. the chip works in "volume" mode without internal volume adjustment. volume control can be performed at audio amplifier circuit stage. for si483x-b, the pull-up resistor r42 of 10k for pin 2 station is a must for this application. c6 and c15 are required bypass capacitors for vdd1/v dd2 power supply pin 20/21. place c6/c15 as close as possible to the vdd1 /vdd2 pin 20/21 and dbyp pin 22. these recomm endations are made to reduce th e size of the current loop created by the bypass cap and routing, mi nimize bypass cap impedance and return all currents to the dbyp pin. pin 22 is the dedicated bypass capacitor pin. do not connect it to power supply gnd on pcb. pin 13 and pin 14 are the gnd of the chip, these pins must be well connected to the power supply gnd on pcb. pin 9 is the rfgnd of the chip , it must be well connected to the power supply gnd on pcb. when doing pcb layout, try to create a large gnd plane underneath and around the chip. route all gnd (including rfgnd) pins to the gnd plane. c4 and/or c7 (4.7uf) are ac coupling caps for receiver analog audio output from pin 23 and/or pin 24. the input resistance of the amplifier r, such as a headphone amplifier, and the capacitor c will set the high pass pole given by equation 1. placement location is not critical. equation 1. c2 and c3 (22 pf) are crystal loading ca ps required only when us ing the internal oscillato r feature. refer to the crystal data sheet for the proper load capacitance and be ce rtain to account for parasitic capacitance. place caps c2 and c3 such that they share a common gnd connection and the current loop area of the crystal and loading caps is minimized. y1 (32.768 khz) is an optional crystal required only when using the inter nal oscillator feature. place the crystal y1 as close to xtalo pin 18 and xtali pin 19 as possible to minimize current loops. if applying an external clock (32.768 khz) to xtali, leave xtalo floating. do not route digital signals or reference clock traces nea r pin 6 and 7. do not route pin 6 and 7. these pins must be left floating to guarantee proper operation. pin 16, 17 are volume control or bass/treble control pins fo r using tuner internal volume control function or bass/ treble control function. in this basic ap plication circuit, the tuner internal vo lume control function is not used, just connect the two pins to gnd. vr1 (100k / 10%), r27, c1, c13 constitute the tuning circuit. 10 k ? at 10% tolerance is recommended for vr1. 1p12t switch s2 together with resistor ladder constitute band select circui ts. si4831/si4820 includes all am and fm bands as defined in above section 2.1, si4835/si4824 includes all am, fm and sw bands. q1(2sc9018) together with it?s peripherals b6, c30,31,33,36, r31,32 ,34,41 is the lna circuit for all sw bands, the lna is switched off by lna_en signal in am and fm mode controlled by si4835/si4824. for si4820/24, do not route pin 23. this pin must be left floating to guarantee proper operation. f c 1 2 ? rc --------------- - = an555 rev. 0.2 11 figure 5. si483x-b basic volume mode applications circuit ! " # # $% & # % ' ()*)+",-.(+* % % # / % % % " % " # % ! " # " " $%&'% $%(' )%# ! )% # $ $ *+ % 0 ' 1#""2",-.(+* % % # % % # # # % & % & % & % & % & % & % & % & % & % & % & % & % & % & % & % $ $ $ $ $ $ 34 !5675 34 !5675 ,- 34 1057 34 5' 34 1057 an555 12 rev. 0.2 figure 6. si4820/24 basic volume mode applications circuit fm1 (87mhz - 108mhz) fm2 (76mhz - 90mhz) fm3 (64mhz - 87mhz) fm/sw si482x-a am1 (520khz - 1710khz) sw1 (5.6mhz - 6.4mhz) sw2(6.8mhz - 7.6mhz) sw3(9.2mhz - 10.0mhz) sw4(11.45mhz - 12.25mhz) sw5 (13.4mhz - 14.2mhz) sw6 (15mhz - 15.9mhz) sw7 (17.1mhz - 18mhz) sw8 (21.2mhz - 22mhz) for si4824 only for si4824 only optional 12 3 4 5 6 7 8 9 10 11 12 13 s2 r15 20k 1% r10 20k 1% r12 20k 1% r11 20k 1% r14 20k 1% r9 20k 1% r7 20k 1% r8 50k 1% r28 40k 1% r29 120k 1% y1 32.768khz c2 22p c3 22p l2 270nh c19 0.1u c15 4u7 vr1 50k 10% c6 0.1u r6 100k c5 0.47u q1 2sc9018 r31 1k r32 10r c30 33n c33 10p r41 120k c31 33n b6 2.5k/100m c36 0.47u ant1 mw ferrite antenna r34 100k c34 33p 1 lna_en 2 nc 3 tune1 4 tune2 5 ba nd 6 nc 7 nc 8 fmi 9 rfgnd 10 nc 11 nc 12 ami 13 gnd 14 gnd 15 rst 16 vol+ 17 vol- 18 xtal0 19 xtali 20 vdd1 21 vdd2 22 dbyp 23 nc 24 aout u1 c1 0.1u r27 100r r33 20k 1% r35 20k 1% r36 33k 1% c13 47u r43 30k 1% r44 47k 1% ant2 c4 4.7u vcc vcc vcc ba nd [1] lna_en [1] lna_en [1] ba nd [1] tune1 [1] tune1 [1] aout an555 rev. 0.2 13 3.2. si483x-b applications ci rcuits with 9-level bass/tre ble control via 2 push buttons figure 7 sets si483x-b in bass/treble mode by removing the pull-up resistor of pin 2 station. pushing button s3 once increases bass effect by one level, and pushing button s4 on ce increases treble effect by one level. by pressing and holding one of the buttons, the bass or treble effect will automat ically step through all levels until reaching their maximums. there are nine levels for bass/treble control. figure 7. si483x-b applications circuit with 9-level bass/treble control ! " # # $% & # % ' ()*)+",-.(+* % % # / % % % " % " # % ! " # " " $%&'% $%(' )%# ! )% # $ $ *+ % 0 ' 1#""2",-.(+* % % % % ,-- ,. # % % # # # % & % & % & % & % & % & % & % & % & % & % & % & % & % & % & $ $ $ $ $ $ $ 34 !5675 34 !5675 /0 34 1057 34 5' 34 1057 an555 14 rev. 0.2 3.3. si483x-b applications circuits with 3-level bass/t reble control via slide switch figure 8 sets si483x-b in bass/treble mode by removing the pull-up resistor of pin 2 station. slide switch s5 controls bass/treble effect in three levels, bass/normal/treble. figure 8. si483x-b 3-level bass/treble mode applications circuits ! " #"$ % % "& & & & "!&$ & &" $&$" ! & &$ " "&! & "$&$ $$ ' $& ( )$ $$* ) $$* +$ $ )! &, )" , -. % / ) &, . % 0 12 ." $ . )" &, 3 $)! . % . $ . ) ) * . $ % ) $&"% ) &, . % ) * ! " # " " $%&'% $%(' )%# ! )% # $ $ *+ % 4 0 5,6 12 .$ $ . $ " ) &, .$ . . " % . " % ) , ) &, ) &, $ " ! $ $ ." $ % / . $ % / .$ $ % / . $ % / . $ % / .! $ % / . $ % / . " % / .$ % / .$! $ % / . $ % / . " $ % / . % / . % / . % / $ $ -)) $ $ $ 78 +9#:;9 78 +9#:;9 ,- 78 549; 78 #90 78 549; an555 rev. 0.2 15 3.4. si48x-b/si4820/24 appli cation circuits with 32-level volume control via 2 push buttons figure 9 sets si483x-b in "volume" mode by adding the pull-up resistor r42 of 10k at pin 2 station. figure 10 illustrates the application circuit for si4820/24. pressing button s3 once decreases the volu me level by 2 db; pressing button s4 once increases the volume level by 2 db. a total of 32 steps (2 db per step) are available for the push button volume control. if pressing and holding s3 or s4, tuner vo lume will step through all levels until reaching the minimum or maximum, respectively. figure 9. si483x-b applications circuits with 32-level volume control ! " # # $% & # % ' ()*)+",-.(+* % % # / % % % " % " # % ! " # " " $%&'% $%(' )%# ! )% # $ $ *+ % 0 ' 1#""2",-.(+* % % % % ,-./0 ( ,-./0 & % % # % % % 3 % 3 % 3 % 3 % # # # % & % & % & % & % & % & % & % & % & % & % & % & % & % & % & $ $ $ $ $ $ $ $ $ $ 45 !3673 45 !3673 12 45 1037 45 3' 45 1037 an555 16 rev. 0.2 figure 10. si4820/24 applications circuit with 32-level volume control at the device power up, si483x-b/si4820/ 24 will put the output volume at some default levels acco rding to the push button configurations as shown in figure 11. there ar e four default volume level choices. adding pull-down resistors to both pin 16 and 17 sets the default volume to maximum, typically 80 mvrms for fm and 60 mvrms for am. different pin 16 and 17 pull-up/down resistor combinatio ns can set the default volume to either max, max-6db, max-12db or max-18db. for example, in figure 9, two pu ll-up resistors are connected to pin 16 and pin 17, which sets the default volume to max-18db. fm1 (87mhz - 108mhz) fm2 (76mhz - 90mhz) fm3 (64mhz - 87mhz) fm/sw si482x-a am1 (520khz - 1710khz) sw1 (5.6mhz - 6.4mhz) sw2(6.8mhz - 7.6mhz) sw3(9.2mhz - 10.0mhz) sw4(11.45mhz - 12.25mhz) sw5 (13.4mhz - 14.2mhz) sw6 (15mhz - 15.9mhz) sw7 (17.1mhz - 18mhz) sw8 (21.2mhz - 22mhz) for si4824 only for si4824 only optional 12 3 4 5 6 7 8 9 10 11 12 13 s2 r15 20k 1% r10 20k 1% r12 20k 1% r11 20k 1% r14 20k 1% r9 20k 1% r7 20k 1% r8 50k 1% r28 40k 1% r29 120k 1% y1 32.768khz c2 22p c3 22p l2 270nh c19 0.1u c15 4u7 vr1 50k 10% c6 0.1u r6 100k c5 0.47u q1 2sc9018 r31 1k r32 10r c30 33n c33 10p r41 120k c31 33n b6 2.5k/100m c36 0.47u ant1 mw ferrite antenna r34 100k c34 33p 1 lna_en 2 nc 3 tune1 4 tune2 5 ba nd 6 nc 7 nc 8 fmi 9 rfgnd 10 nc 11 nc 12 ami 13 gnd 14 gnd 15 rst 16 vol+ 17 vol- 18 xtal0 19 xtali 20 vdd1 21 vdd2 22 dbyp 23 nc 24 aout u1 c1 0.1u r27 100r r33 20k 1% r35 20k 1% r36 33k 1% c13 47u r43 30k 1% r44 47k 1% ant2 c4 4.7u s3 volume- s4 volume+ r37 56k r38 56k vcc vcc vcc vcc vcc ba nd [1] lna_en [1] lna_en [1] ba nd [1] tune1 [1] tune1 [1] aout an555 rev. 0.2 17 figure 11. si483x-b/si4820/24 default volume selection in volume mode 3.5. application circuits fo r memorization of user settings si483x-b/si4820/24 has high retention memory (hrm) built -in that can memorize the last volume and bass/treble settings so that at the next power up , the unit will automatically restore the volume and bass/treble settings before the last power off. the unit requires pin 20 vdd1 to be co nnected to an always-on power source such as battery terminals. during power off/on cycling, there is a low probability that the user sett ing data in hrm can be corrupted by transient. if the tuner fi nds that the stored data in hrm is corrupted at po wer on, it will switch to use the default volume or bass/treble setting. to safeguard the integrity of hrm data, users are advised to ensure that the reset pin (rstb) voltage goes down to 0.3*vdd before the vdd2 voltage drops to 1.65 v during the power off process. a 2p2t, power on/off switch s3 in figure 12 is reco mmended, with one pole of s3 short pin15 rstb to gnd immediately at the power off event. applying always-on power supply voltag e to vdd1 and using 2p2t power on/off switch to connect rstb will also improve the tuned channel consistency before power off and after power on. si483x-b/si4820/24 memorizes the last tuned station before power off and restores the original tuned station at power up after confirming that there is not a large enough position change on pvr during the power off/on cycle. an555 18 rev. 0.2 figure 12. si483x-b applications circuits with user setting memory ! " # # #"$ % & ! ! ' # # $ # ( )*+*, -./),+ ! !" 0 ( 1# 2 -./),+ # # # # #$%&''()&$*+)&++* # # ,-./0&$ ,-./0&$ $ $ $ 34 5( 34 1056 34 '5765 $1 34 '5765 12 34 1056 34 1 an555 rev. 0.2 19 3.6. si483x-b/si4820/24 bill of materials 3.6.1. si483x-b/si4820/24 basic volu me mode applications circuit bom table 6. si483x-b basic volume mode applications circuit bom component(s) value/description supplier c4,c7,c15 capacitor 4.7 f, 20%, z5u/x7r murata c13 capacitor 47 f, 20%, z5u/x7r murata c1,c6,c19 supply bypass capacitor, 0.1 f, 20%, z5u/x7r murata c36 supply bypass capacitor, 0.47 f, 20%, z5u/x7r murata c34 rf coupling capacitors, 33 pf, 5%, cog murata l2 inductor 270 nh. murata r5,r21 led biasing resistors, 200 ? , 5% venkel vr1 variable resistor (pot), 100 k ? , , 10% ? kennon d1,d3 station and stereo indicating leds any, depends on customer u1 si483xb am/fm/sw analog tune analog display radio tuner silicon laboratories r6 resistor, 100 k ? , 5% venkel r27 resistor, 100 ? ,, 5% venkel r28 band switching resistor, 40 k ? ,, 1% venkel r44 band switching resistor, 47 k ? ,, 1% venkel r36 band switching resistor, 33 k ? ,, 1% venkel r43 band switching resistor, 30 k ? ,, 1% venkel r7,r33 band switching resistor, 20 k ? ,, 1% venkel r29 band switching resistor, 120 k ? ,, 1% venkel s2 band switch shengda c2, c3 crystal load capacitors, 22 pf, 5%, cog (optional: for crystal oscillator option) venkel y1 32.768 khz crystal (optional: fo r crystal oscillator option) epson ant2 whip antenna various ant1 mw ferrite antenna 220 h jiaxin electronics an555 20 rev. 0.2 table 7. si4820/24 basic volume mode applications circuit bom component(s) value/description supplier c4,c7,c15 capacitor 4.7 f, 20%, z5u/x7r murata c13 capacitor 4.7 f, 20%, z5u/x7r murata c1,c6,c19 supply bypass capacitor, 0. 1 f, 20%, z5u/x7r murata c36 supply bypass capacitor, 0.47 f, 20%, z5u/x7r murata c34 rf coupling capacitors, 33 pf, 5%, cog murata l2 inductor 270 nh murata vr1 variable resistor (pot), 100 k, 10% kennon u1 si4820/24 am/fm/sw anal og tune analog display radio tuner silicon laboratories r6 resistor, 100 k, 5% venkel r27 resistor, 100 ? , 5% venkel r28 band switching resistor, 40 k, 1% venkel r44 band switching resistor, 47 k, 1% venkel r36 band switching resistor, 33 k, 1% venkel r43 band switching resistor, 30 k, 1% venkel r7,r33 band switching resistor, 20 k, 1% venkel r29 band switching resistor, 120 k, 1% venkel s2 band switch shengda c2, c3 crystal load capa citors, 22 pf, 5%, cog (optional: for crysta l oscillator option) venkel y1 32.768 khz crystal (optional: fo r crystal oscillator option) epson ant2 whip antenna various ant1 mw ferrite antenna 220 h. jiaxin electronics an555 rev. 0.2 21 3.6.2. additional bom for appli cations circuit with 9-level bass/treble control via push buttons 3.6.3. additional bom for appli cation circuit with 3-level bass/ treble control via slide switch 3.6.4. additional bom for appli cation circuit with 32-level volume control via push buttons table 8. si4835-b/si4824 additional bom (for 8 sw bands) component(s) value/description supplier c36 capacitor, 0.47 f, 20%, z5u/x7r murata c33 capacitor capacitors, 10 pf, 5%, cog murata c30-31 capacitor capacitors, 33 nf, 5%, cog murata b6 ferrite bead,2.5k ? , 100 mhz murata q1 rf transistor, 2sc9018. etc r34 resistor, 100 k ? , 5% venkel r41 resistor, 120 k ? , 5% venkel r32 resistor, 10r, 5% venkel r31 resistor, 1k ? ,, 5% venkel r9-12,r14-15,r35 band switching resistor, 20 k ? ,, 1% venkel r8 band switchin g resistor, 50 k ? , 1% venkel table 9. si483x-b additional bom for 9-level bass/treble control component(s) value/description supplier r1-2 resistor, 56 k ? , 5% venkel s3-4 button switch various table 10. si483x-b additional bom for 3-level bass/treble control component(s) value/description supplier r37-38 resistor, 56 k ? , 5% venkel s5 slide switch shengda table 11. si483x-b additional bom for 32-level volume control component(s) value/description supplier r1-2 resistor, 56 k ? , 5% venkel s3-4 button switch various an555 22 rev. 0.2 3.6.5. additional bom for a pplication circuit with memo rization of user settings table 12. si4820/24 addtional bom for 32-level volume control component(s) value/description supplier r37-38 resistor, 56 k ? , 5% venkel s3-4 button switch various table 13. si483x-b additional bom for user setting memory component(s) value/description component(s) r1-2 resistor, 56 k ? , 5% venkel s3-4 button switch various s1 2p2t slide switch shengda r16 resistor, 200r, 5% venkel c40 supply bypass electrolytic capacitor, 100 f, 4 v any c39 supply bypass capacitor, 0.1 f, 20%, z5u/x7r murata an555 rev. 0.2 23 3.7. si483x-b/si4820/24 pcb layout guidelines ?? 1-layer pcb is used for si483x-b/si4820/24 ?? gnd routed by large plane ?? power routed with traces ?? 0402 component size or larger ?? 10 mil traces width ?? 20 mil trace spacing ?? 15 mil component spacing ?? recommended to keep the am ferrite loop antenna at least 5 cm away from the tuner chip ?? keep the am ferrite loop antenna at least 5 cm away from mcu, audio amp, and other circuits which have am interference place vdd1/vdd2 bypass capacitor c6, c15 as close as possi ble to the supply (pin 20/pin 21) and dbyp (pin 22). do not connect the dbyp (p in 22) to the board gnd. place the crystal as close to xtalo (pin 18) and xtali (pin 19) as possible. route all gnd (including rfgnd) pi ns to the gnd plane underneath the chip. try to create a large gnd plane underneath and around the chip. do not route pin 6 and 7. these pins must be left floating to guarantee proper operation. keep the tune1 and tune2 traces away from pin 6 and pi n 7. route tune1 and tune2 traces in parallel and the same way. place c1, c13 as close to pin3 tune1 as possible. for si4820/24, do not route pin 23, leave it floating to guarantee proper operation. copy the si483x-b layout example as much as possible when doing pcb layout. figure 13. si483x-b pcb layout example an555 24 rev. 0.2 4. headphone antenna for fm receive the si483x-b/si4820/24 fm receiver component supports a headphone antenna interface through the fmi pin. a headphone antenna with a length between 1.1 and 1.45 m suits the fm applicatio n very well because it is approximately half the fm wave length (fm wavelength is ~3 m). 4.1. headphone antenna design a typical headphone cable will contain th ree or more conductors. the left and right audio channels are driven by a headphone amplifier onto left and right audio conductors and the common audio conductor is used for the audio return path and fm antenna. additional conductors may be used for microphone audio, switching, or other functions, and in some app lications the fm antenna will be a separate conductor within the cable. a representation of a typical application is shown in figure 14. figure 14. typical headphone antenna application an555 rev. 0.2 25 4.2. headphone antenna schematic figure 15. headphone antenna schematic the headphone antenna implementation requires components lmatch, c4, f1, and f2 for a minimal implementation. the esd protection diodes and headpho ne amplifier components are system components that will be required for proper implementation of any tuner. inductor lmatch is selected to maximi ze the voltage gain across the fm band. lmatch should be selected with a q of 15 or greater at 100 mhz and minimal dc resistance. ac-coupling capacitor c4 is used to remove a dc offset on the fmi input. this capacitor must be chosen to be large enough to cause negligible loss with an lna input capacitance of 4 to 6 pf. the recommended value is 100 pf to 1nf. ferrite beads f1 and f2 provide a low-impedance a udio path and high-impedance rf path between the headphone amplifier and the headphone. ferrite beads shou ld be placed on each antenna conductor connected to nodes other than the fmip such as left and right audio, microphone audio, switching, etc. in the example shown in figure 15, these nodes are the left and right audio conductors. ferrite beads should be 2.5 k ? or greater at 100 mhz, such as the murata blm18bd252sn1. high re sistance at 100 mhz is desirable to maximize rshunt, and therefore, rp. refer to ?an383: si47xx antenna, sche matic, layout, and design guidelines,? appendix a?fm receive headphone antenna interface model for a complete description of rshunt, rp, etc. esd diodes d1, d2, and d3 are recommended if design requirements exceed the esd rating of the headphone amplifier and the si483x-b/si4820/24. diodes should be chosen with no more than 1 pf parasitic capacitance, such as the california micro device s cm1210. diode capacitance should be minimized to reduce cshunt and, therefore, cp. if d1 and d2 must be chosen with a capa citance greater than 1 pf, t hey should be placed between the ferrite beads f1 and f2 and t he headphone amplifier to minimize cshunt. this placement will, however, reduce the effectiveness of the esd protection devices. diode d3 may not be relocated and must therefore have a capacitance less than 1 pf. note that each diode packag e contains two devices to pr otect against positive and negative polarity esd events. c9 and c10 are 125 uf ac coupling capacitors required when the audio amplifier does not have a common mode output voltage and the audio output is swinging above and below ground. optional bleed resistors r5 and r6 may be desirable to discharge the ac-coupling capacitors when the headphone cable is removed. an555 26 rev. 0.2 optional rf shunt capacitors c5 and c6 may be placed on the left and right audio traces at the headphone amplifier output to reduce the level of digital noise passed to the antenna. the recommended value is 100 pf or greater, however, the designer should confirm that the headphone amplifier is capable of driving the selected shunt capacitance. the schematic example in figure 15 uses the national semiconductor lm4910 headphone amplifier. passive components r1 r4 and c7 c8 are required for the lm4910 headphone amplifier as described in the lm4910 data sheet. the gain of the right and left amplifiers is r3 /r1 and r4/r2, respectively. these gains can be adjusted by changing the values of resistors r3 and r4. as a general guide, gain between 0.6 and 1.0 is recommended for the headphone amplifier, depending on the gain of the head phone elements. capacitors c7 and c8 are ac-coupling capacitors required for the lm4910 interface. these capacitors, in conjunction with resistors r1 and r2, create a high-pass filter that sets the audio amplifier's lower frequ ency limit. the high-pass corner frequencies for the right and left amplifiers are: equation 2. with the specified bom components, the corner frequen cy of the headphone amplifie r is approximately 20 hz. capacitor c1 is the supply bypass capacitor for the audio amplifier. the lm4910 can also be shut down by applying a logic low voltage to the number 3 pin. the ma ximum logic low level is 0.4 v and the minimum logic high level is 1.5 v. the bill of materials for the typical ap plication schematic shown in figure 15 is provided in t able 14. note that manufacturer is not critical for resistors and capacitors. 4.3. headphone antenna bill of materials table 14. headphone antenna bill of materials designator description lmatch ind, 0603, sm, 270 nh, murata, lqw18anr27j00d c4 ac coupling cap, sm, 0402, x7r, 100 pf d1, d2, d3 ic, sm, esd diode, sot23-3, california micro devices, cm1210-01st u3 ic, sm, headphone amp, nati onal semiconductor, lm4910ma r1, r2, r3, r4 res, sm, 0603, 20 k ? c7, c8 cap, sm, 0603, 0.39 uf, x7r c5, c6 cap, sm, 0402, c0g, 100 pf r5, r6 res, sm, 0603, 100 k ? f1, f2 ferrite bead, sm, 0603, 2.5 k ? , murata, blm18bd252sn1d c1 cap, sm, 0402, x7r, 0.1 f r7 res, sm, 0402, 10 k ? f cright 1 2 ? r1 ? c7 ? ----------------------------------- f cleft 1 2 ? r2 c8 ? ? ----------------------------------- = ? = an555 rev. 0.2 27 4.4. headphone antenna layout to minimize inductive and capaciti ve coupling, inductor lmatch and headphone jack j24 should be placed together and as far from noise sources such as clocks and digital circuits as possible. lmatch should be placed near the headphone connector to keep audio currents away from the chip. to minimize cshunt and cp, place ferrite beads f1 and f2 as close as possible to the headphone connector. to maximize esd protection diode effe ctiveness, place diodes d1, d2, and d3 as close as possible to the headphone connector. if capacitance larger than 1 pf is required for d1 and d2, both components should be placed between fb1, fb2, and the headphone amplifier to minimize cshunt. place the chip as close as possible to the headpho ne connector to minimize antenna trace capacitance, cpcbant. keep the trace length short and narrow and as far above the reference plane as possible, restrict the trace to a microstrip topology (trace routes on the top or bottom pcb layers only), mi nimize trace vias, and relieve ground fill on the trace layer. note that minimizing capacitance has the effect of maximizing characteristic impedance. it is not ne cessary to design for 50 ? transmission lines. to reduce the level of digital noise passed to the antenna, rf shunt capacitors c5 and c6 may be placed on the left and right audio traces close to the headphone ampl ifier audio output pins. the recommended value is 100 pf or greater; however, the designer sh ould confirm that the headphone amplifie r is capable of driving the selected shunt capacitance. 4.5. headphone antenna design checklist ?? select an antenna length of 1.1 to 1.45 m. ?? select matching inductor lmatch to maximize signal strength across the fm band. ?? select matching inductor lmatch with a q of 15 or greater at 100 mhz and minimal dc resistance. ?? place inductor lmatch and headphone connector togeth er and as far from potential noise sources as possible to reduce capacitive and inductive coupling. ?? place the chip close to the headphone connector to mi nimize antenna trace length. minimizing trace length reduces cp and the possibility for i nductive and capacitive coupling into the antenna by noise sources. this recommendation must be followed for optimal device performance. ?? select ferrite beads f1-f2 with 2.5 k ? or greater resistance at 100 mhz to maximize rshunt and, therefore, rp. ?? place ferrite beads f1-f2 close to the headphone connector. ?? select esd diodes d1-d3 with minimum capacitance. ?? place esd diodes d1-d3 as close as possible to the headphone connector for maximum effectiveness. ?? place optional rf shunt capacitors near the headphone amplifier?s left and right audio output pins to reduce the level of digital noise passed to the antenna. an555 28 rev. 0.2 5. whip antenna for fm receiver a whip antenna is a typical monopole antenna. 5.1. fm whip antenna design a whip antenna is a monopole antenna with a stiff but flex ible wire mounted ve rtically with one end adjacent to the ground plane. there are various types of whip antennas including long, non-telescopic metal whip antennas, telescopic metal whip antennas, and rubber whip antennas. figure 16 shows the telescopic whip antenna. figure 16. telescopic whip antennas the whip antenna is capacitive, and its output capaci tance depends on the length of the antenna (maximum length ~56 cm). at 56 cm length, the capacitance of the whip antenna ranges from 18 to 32 pf for the us fm band. the antenna capacitance is about 22 pf in the center of the us fm band (98 mhz). 5.2. fm whip antenna schematic figure 17. fm whip antenna schematic l1 (56 nh) is the matching inductor and it combin es with the antenna impedance and the fmi impedance to resonate in the fm band. c5 (1nf) is the ac coupling cap going to the fmi pin. u3 is a required esd diode since the antenna is expose d. the diode should be chosen with no more than 1 pf parasitic capacitance, such as t he california micro device cm1213. an555 rev. 0.2 29 5.3. fm whip antenna bill of materials 5.4. fm whip antenna layout place the chip as close as possible to the whip antenna. this will minimize the trace le ngth between the device and whip antenna, which will minimize parasitic capacitance a nd the possibility of noise co upling. place inductor l1 and the antenna connector together and as far from potenti al noise sources as possible. place the ac coupling capacitor, c5, as close to the fmi pin as possible. place esd diode u3 as close as possible to the whip antenna input connector for maximum effectiveness. 5.5. fm whip antenna design checklist ?? maximize whip antenna length for optimal performance. ?? select matching inductor l1 with a q of 15 or greater at 100 mhz and minimal dc resistance. ?? select l1 inductor value to maximize resonance gain from fm frequency (64 mhz) to fm frequency (109 mhz) ?? place l1 and whip antenna close together and as far from potential noise sources as possible to reduce capacitive and inductive coupling. ?? place the chip as close as possible to the whip antenna to minimize the antenna trace length. this reduces parasitic capacitance and hence reduces coupling into the antenna by noise sources. this recommendation must be followed for optimal device performance. ?? place esd u3 as close as possible to th e whip antenna for maximum effectiveness. ?? select esd diode u3 with minimum capacitance. ?? place the ac coupling capacitor, c5, as close to the fmi pin as possible. table 15. fm whip antenna bill of materials designator description wip_antenna whip antenna l1 tuning inductor, 0603, sm, 56 nh, murata, lqw18an56nj00d c5 ac coupling capacitor, 1nf, 10%, cog u3 ic, sm, esd diode, sot23-3, california micro devices, cm1213-01st an555 30 rev. 0.2 6. ferrite loop an tenna for am receive two types of antenna will work well for an am receiver: a ferrite lo op antenna or an air loop antenna. a ferrite loop antenna can be placed internally on the device or connect ed externally to the device with a wire connection. when the ferrite loop antenna is placed internally on the device , it is more susceptible to picking up any noise within the device. when the ferrite loop antenna is placed outside a de vice, e.g., at the end of an extension cable, it is less prone to device noise activity and may result in better am reception. 6.1. ferrite loop antenna design the following figure shows an example of ferrite loop ante nnas. the left figure is the standard size ferrite loop antenna, which is usually used in pro ducts with a lot of space, such as de sktop radios. the right figure is the miniature size of the loop antenna comp ared with a u.s. 10-cent piece (dime). it is usually used in small products where space is at a premium, such as cell phones. if possible, use the standard size ferrite loop antenna as it has a better sensitivity than the miniature one. figure 18. standard and miniature ferrite loop antennas a loop antenna with a ferrite inside should be designed such that the inductance of the ferrite loop is between 180 and 450 uh for the si483x-b/si4820/24 am receiver. table 16 lists the recommended ferrite loop antenna for the si483x-b/si4820/24 am receiver. the following is the vendor information for the ferrite loop antennas: jiaxin electronics shenzhen sales office email: sales@firstantenna.com web: www.firstantenna.com table 16. recommended ferrite loop antenna part # diameter length turns ui type application sl8x50mw70t 8 mm 50 mm 70 400 mn-zn desktop radios sl4x30mw100t 4 mm 30 mm 100 300 ni-zn portable radios (mp3, cell, gps) sl3x30mw105t 3 mm 30 mm 105 300 ni-zn sl3x25mw100t 3 mm 25 mm 110 300 ni-an sl5x7x100mw70t 5x7 mm 100 mm 70 400 mn-zn desktop radios an555 rev. 0.2 31 6.2. ferrite loop antenna schematic figure 19. am ferrite loop antenna schematic c1 is the ac coupling cap going to the ami pin and its value should be 0.47 f. d1 is an optional esd diode if there is an exposed pad going to the ami pin. 6.3. ferrite loop antenna bill of materials 6.4. ferrite loop antenna layout place the chip as close as possible to the ferrite loop ant enna feedline. this will minimize the trace going to the ferrite antenna, which will mini mize parasitic capacitance as well as the possibility of no ise sources coupling to the trace. the placement of the am antenna is critical because am is susceptible to noise sources causing interference in the am band. noise sources can come from clock signals, sw itching power supply, and digital activities (e.g., mcu). when the am input is interfaced to a ferrite loop stick antenna, the placement of the ferrite loop stick antenna is critical to minimize inductive coupling. place the ferrite loop stick antenna as far away from interference sources as possible. in particular, make sure th e ferrite loop stick antenn a is away from signals on the pcb and away from even the i/o signals of the chip. do not route any signal u nder or near the ferrite loop stick. route digital traces in between ground plane for best performance. if that is not po ssible, route digital traces on the opposite side of the chip. this will minimize capacitive coup ling between the plane (s) and the antenna. to tune correctly, the total capacitance seen at the ami input needs to be minimized and kept under a certain value. the total acceptable capacitance depends on the inductance seen by the chip at its am input. the acceptable capacitance at the am input can be calcul ated using the formula shown in equation 3. table 17. ferrite loop antenna bill of materials designator description ant1 ferrite loop antenna, 180?450 h c1 ac coupling capacitor, 0.47 f, 10%, z5u/x7r d1* esd diode, ic, sm, sot23-3, california micro devices, cm1213-01st *note: optional; only needed if there is any exposed pad going to the ami pin. an555 32 rev. 0.2 equation 3. expected total capacitance at ami the total allowable capacitance, when in terfacing a ferrite loop stick antenna, is the effective capacitance resulting from the ami input pin, the capacitance from the pcb, and the capacitance from the ferrite loop stick antenna. the inductance seen at the ami in this ca se is primarily the inductance of the ferrite loop stick antenna. the total allowable capacitance in the case of an air loop antenna is the effective capacitance resulting from the ami input pin, the capacitance of the pcb, the capacitance of the transformer, and the capacitance of the air loop antenna. the inductance in this case should also take all the elem ents of the circuit into account. the input capacitance of the ami input is 8 pf. the formula shown in equation 3 gives a total capacitance of 29 pf when a 300 uh ferrite loop stick antenna is used for an am band with 10 khz spacing, where the highest frequency in the band is 1750 khz. 6.5. ferrite loop an tenna design checklist ?? place the chip as close as possible to the ferrite l oop antenna feedline to minimize parasitic capacitance and the possibility of noise coupling. ?? place the ferrite loop stick antenna away from any so urces of interference and even away from the i/o signals of the chip. make sure that the am antenna is as far away as possible from circuits that switch at a rate which falls in the am band (504?1750 khz). ?? recommend keeping the am ferrite loop antenna at least 5 cm away from the tuner chip. ?? place optional component d1 if the antenna is exposed. ?? select esd diode d1 with minimum capacitance. ?? do not place any ground plane under the ferrite loop stick antenna if the ferrite loop stick antenna is mounted on the pcb. the recommended ground separation is 1/4 inch or the width of the ferrite. ?? route traces from the ferrite loop st ick connectors to the ami input via the ac coupling cap c1 such that the capacitance from the traces and the pads is minimized. c total 1 2 ? f max ?? 2 l effective -------------------------------------------------- where: c total total capacitance at the ami input l effective effective inductance at the ami input f max highest frequency in am band = = = = an555 rev. 0.2 33 7. air loop antenna for am an air loop antenna is an external am antenna (bec ause of its large size) typically found on home audio equipment. an air loop antenna is placed external to the product enclosure maki ng it more immune to system noise sources. it also will have a better sensitivity compared to a ferrite loop antenna. 7.1. air loop antenna design figure 20 shows an example of an air loop antenna. figure 20. air loop antenna unlike a ferrite loop, an air loop ante nna will have a smaller equiva lent inductance because of the absence of ferrite material. a typical inductance is on the order of 10 to 20 uh. therefore, in order to interface with the air loop antenna properly, a transformer is required to raise the inductance into the 180 to 450 uh range. t1 is the transformer to raise the inductance to within 180 to 450 uh range. a simple fo rmula to use is as follows: typically a transformer with a turn ratio of 1:5 to 1:7 is good for an air loop antenna of 10 to 20 uh to bring the inductance within the 180 to 450 uh range. choose a high-q transformer with a coupling coefficient as close to 1 as possible and use a multiple strands litz wire for the transformer winding to reduce the skin effect. all of this will ensure that the transformer will be a low loss transformer. finally, consider using a shielded enclosure to house the transformer or using a torroidal shape core to prevent noise pickup from interfering sources. a few recommended transformers are listed in table 18. an555 34 rev. 0.2 the following is the vendor information for the above transformer: vendor #1 : jiaxin electronics shenzhen sales office email: sales@firstantenna.com web: www.firstantenna.com vendor #2 : umec usa, inc. website: www.umec-usa.com www.umec.com.tw table 18. recommended transformers transformer 1 transformer 2 transformer 3 vendor jiaxin electronics umec umec part number sl9x5x4mwtf1 tg-utb01527s tg-utb01526 type surface mount surface mount through hole primary coil turns (l1) 12t 10t 10t secondary coil turns (l2) 70t 55t 58t wire gauge ulsa / 0.07 mm x 3 n/a n/a inductance (l2) 380 h 10% @ 796 khz 184 h min, 245 h typ @ 100 khz 179 h min, 263 h typ @ 100 khz q 130 50 75 an555 rev. 0.2 35 7.2. air loop antenna schematic figure 21. am air loop antenna schematic c1 is the ac coupling cap going to the ami pin and its value should be 0.47 uf. d1 is a required esd diode since the antenna is exposed. 7.3. air loop antenna bill of materials 7.4. air loop antenna layout place the chip and the transf ormer as close as possible to the air loop antenna feedline. th is will minimize the trace going to the air loop antenna, which will minimize pa rasitic capacitance and the po ssibility of noise coupling. when an air loop antenna with a transformer is used with the si483x-b/si4820/24, mi nimize inductive coupling by making sure that the transformer is pl aced away from all sources of interf erence. keep the transformer away from signals on the pcb and away from even the i/o signals of the si483x-b/si4820/24. do not route any signals under or near the transformer. use a shielded transformer if possible. 7.5. air loop antenna design checklist ?? select a shielded transformer or a torroidal shape transformer to prevent noise pickup from interfering sources ?? select a high-q transformer with coupling coefficient as close to 1 as possible ?? use multiple strands litz wire for the transformer winding ?? place the transformer away from any sources of inte rference and even away from the i/o signals of the chip. make sure that the am antenna is as far away as possible from circuits th at switch at a rate which falls in the am band (504?1750 khz). ?? route traces from the transformer to the ami input via the ac coupling cap c1 such that the capacitance from the traces and the pads is minimized. ?? select esd diode d1 with minimum capacitance. table 19. air loop antenna bill of materials designator description loop_antenna air loop antenna t1 transformer, 1:6 turns ratio c1 ac coupling capacitor, 0.47 f, 10%, z5u/x7r d1 esd diode, ic, sm, sot23-3, california micro devices, cm1213-01st an555 36 rev. 0.2 8. whip antenna for sw receiver sw reception usually uses whip antennas, the same as fm. 8.1. sw whip antenna design a whip antenna is a monopole antenna with a stiff but flex ible wire mounted ve rtically with one end adjacent to the ground plane. there are various types of whip antennas, including long non-telescopic metal whip antennas, telescopic metal whip antennas, and rubber whip antennas. figure 22 shows the telescopic whip antenna. figure 22. telescopic whip antenna for sw 8.2. sw whip antenna schematic figure 23. sw whip antenna schematic q1 2sc9018 is a low noise rf transistor and it constitu tes a lna to amplify the sw signal coming from the whip antenna. c30 (33nf) is the ac couplijng cap between whip anten na and lna input. c33 (0.47uf) is the ac coupling cap going to the ami pin. r31, r41 are bias resistors of the transistor. an555 rev. 0.2 37 8.3. sw whip antenn a bill of materials 8.4. sw whip antenna layout place the chip and 2sc9018 as close as possible to the wh ip antenna feedline. this wi ll minimize the trace going to the whip antenn a, which will minimize parasitic capacitance as we ll as the possibility of noise sources coupling to the trace. 8.5. sw whip antenna design checklist ?? maximize whip antenna length for optimal performance. ?? place q1 and whip antenna close together and as far from potential noise sources as possible to reduce capacitive and inductive coupling. ?? place the chip as close as possible to the whip antenna to minimize the antenna trace length. this reduces parasitic capacitance and hence reduces coupling into the antenna by noise sources. this recommendation must be followed for optimal device performance. ?? place the ac coupling capacitor c33, as close to the ami pin as possible. table 20. sw whip antenna bill of materials designator description w h ip_antenna whip antenna q1 low noise rf transistor, 2sc9018 c 30 ac coupling capacitor, 33 nf, 10%, cog c33 coupling capacitor, 0.47 f, 20%, z5u/x7r r31 resistor, 1 k, 5% r41 resistor, 200 k, 5% disclaimer silicon laboratories intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the silicon laboratories products. characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "typical" parameters provided can and do vary in different applications. application examples described herein are for illustrative purposes only. silicon laboratories reserves the right to make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. silicon laboratories shall have no liability for the consequences of use of the information supplied herein. this document does not imply or express copyright licenses granted hereunder to design or fabricate any integrated circuits. the products must not be used within any life support system without the specific written consent of silicon laboratories. a "life support system" is any product or system intended to support or sustain life and/or health, which, if it fails, can be reasonably expected to result in significant personal injury or death. silicon laboratories products are generally not intended for military applications. silicon laboratories products shall under no circumstances be used in weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, or missiles capable of delivering such weapons. trademark information silicon laboratories inc., silicon laboratories, silicon labs, silabs and the silicon labs logo, cmems?, efm, efm32, efr, energy micro, energy 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