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1/19 features 3.0v to 5.5v operation 60v fault tolerance on analog bus pins extended 25v common mode operation robust esd protection: 15kv hbm (bus pins) 4kv hbm (non-bus pins) 1.65v to 5.5v logic interface vl pin (full-duplex package option) invert control to correct for reversed bus pins enhanced receiver fail-safe protection for open, shorted or terminated but idle data lines hot swap glitch protection on de and re pins driver short-circuit current limit and thermal shutdown for overload protection reduced unit loads allows up to 320 devices on bus industry standard 8 and 14-pin nsoic packages -40c to 85c ambient operating temperature range applications industrial control networks hvac networks building and process automation remote utility meter reading energy monitoring and control long or unterminated transmission lines typical application description the xr33152 , xr33156 and xr33158 family of high performance tia-485/tia-422 devices are designed for improved performance in noisy industrial environments and increased tolerance to system faults. the analog bus pins can withstand direct shorts up to 60v and are protected against esd events up to 15kv hbm. an extended 25v common mode operating range allows for more reliable operation in noisy environments. the receivers include full fail-safe circuitry, guaranteeing a logic high receiver output when the receiver inputs are open, shorted or undriven. the xr33152 receiver input impedance is at least 120k (1/10 unit load), allowing more than 320 devices on the bus. the xr33156/58 receiver input impedance is at least 30k (1/2.5 unit load), allowing more than 80 devices on the bus. the drivers are protected by short circuit detection as well as thermal shutdown and maintain high impedance in shutdown or when powered off. the xr33152 driver is slew limited for reduced emi and error-free communication over long or unterminated data cables. the xr33152/56/58 family of high performance tia-485/tia-422 devices are designed for improved performance in noisy industrial environments and increased tolerance to system faults. the devices with de and re pins include hot swap circuitry to prevent false transitions on the bus during power up or live insertion and can enter a 1na low current shutdown mode for extreme power savings. figure 1. typical application v cc v cc 5v 5v di r de re di de 60v power bus fault tolerant up to 60v r re 60v fault tolerant 3.0v to 5.5v tia-485/tia-422 transceivers xr 33152 / 56 / 58 rev1a
2/19 absolute maximum ratings these are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections to the specifications below is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability and cause permanent damage to the device. v cc -0.3v to 7.0v v l v l v cc input voltage at control and driver input (de, di and inv) xr33152/58 -0.3v to (v cc + 0.3v) receiver output voltage (ro) xr33152/58 -0.3v to (v cc + 0.3v) input voltage at control ( re ) xr33156 -0.3v to (v l + 0.3v) input voltage at control and driver input (de, di, r inv , d inv , and inv) xr33156 -0.3v to 7.0v receiver output voltage (ro) xr33156 -0.3v to (v l + 0.3v) driver output voltage (a, b, y and z) 60v receiver input voltage (a and b, half or full duplex) 60v transient voltage pulse, through 100? (figure 7) 100v driver output current 250ma storage temperature range -65c to 150c lead temperature (soldering, 10s) 300c package power dissipation 8-pin nsoic ja = 128.4c/w 14-pin nsoic ja = 86c/w maximum junction temperature = 150c caution: esd-sensitive (electrostatic discharge) device. permanent damage may occur on unconnected devices subject to high energy electrostatic fields. unused devices must be stored in conductive foam or shunts. personnel should be properly grounded prior to handling this device. the protective foam should be discharged to the destination socket before devices are removed. xr 33152 / 56 / 58 rev1a
3/19 pin configuration pin functions half duplex full duplex pin name type pin function xr33152 xr33156 xr33158 pin number - 1 r inv in receiver invert control (active high). when enabled, the polarity of the receiver bus pins (a & b) is reversed: a = inverting and b = non-inverting. when disabled, the receiver bus pins (a & b) operate normally: a = non-inverting and b = inverting. the r inv pin has a 150k pull-down resistor. 1 2 ro out receiver output, when re is low and if (a-b) 200mv, ro is high. if (a-b) -200mv, ro is low if inputs are left floating, shorted together or terminated and undriven for more than 2s the output is high. 2 - inv in driver and receiver invert control (active high). when enabled, the polarity of the driver input and receiver input bus pins is inverted. when disabled, the driver input and receiver inputs operate normally: a = non-inverting and b = inverting. the inv pin has a 150k pull-down resistor. - 3 re in receiver output enable (hot swap). when re is low, ro is enabled. when re is high, ro is high impedance. re should be high and de should be low to enter shutdown mode. 3 4 de in driver output enable (hot swap). when de is high, outputs are enabled. when de is low, outputs are high impedance. de should be low and re should be high to enter shutdown mode. 4 5 di in driver input. with de high, a low level on di forces non-inverting output low and inverting output high. similarly, a high level on di forces non-inverting output high and inverting output low. 5 6, 7 gnd power ground. 6 - a/y i/o non-inverting receiver input and non-inverting driver output. 7 - b/z i/o inverting receiver input and inverting driver output. r inv 1 ro 2 re 3 de 4 di 5 gnd 6 gnd 7 v cc 14 v l 13 a 12 b 11 z 10 y 9 d inv 8 d r r o 1 inv 2 d e 3 d i 4 v cc 8 b/z 7 a/y 6 gnd 5 d r xr 33152 / 56 / 58 rev1a
4/19 pin functions half duplex full duplex pin name type pin function xr33152 xr33156 xr33158 pin number 8 14 v cc power 3.0v to 5.5v power supply input bypass to ground with 0.1f capacitor. - 12 a in non inverting receiver input. - 11 b in inverting receiver input. - 9 y out non-inverting driver output. - 10 z out inverting driver output. - 8 d inv in driver invert control (active high). when enabled, the polarity of the driver input pin is inverted causing the driver output (y & z) polarities to be inverted. when disabled, the driver bus pins (y & z) operate normally: y = non-inverting and z = inverting. the d inv pin has a 150k pull-down resistor. - 13 v l power logic interface power supply. xr 33152 / 56 / 58 rev1a
5/19 pin functions xr33156 (full duplex - 14 pins) transmitting inputs outputs d inv re de di y z 0 x 1 1 1 0 0 x 1 0 0 1 1 x 1 1 0 1 1 x 1 0 1 0 x 0 0 x high-z x 1 0 x high-z (shutdown) xr33152 and xr33158 (half duplex - 8 pins) transmitting inputs outputs inv de di a/y b/z 0 1 1 1 0 0 1 0 0 1 1 1 1 0 1 1 1 0 1 0 x 0 x high-z xr33156 (full duplex - 14 pins) receiving inputs output r inv re de v a - v b ro 0 0 x 200mv 1 0 0 x -200mv 0 0 0 x open/shorted 1 1 0 x 200mv 0 1 0 x -200mv 1 1 0 x open/shorted 1 x 1 1 x high-z x 1 0 x high-z (shutdown) xr33152 and xr33158 (half duplex - 8 pins) receiving inputs output inv de v a - v b ro 0 0 200mv 1 0 0 -200mv 0 1 0 open/shorted 1 1 0 +200mv 0 1 0 -200mv 1 1 0 open/shorted 1 xr 33152 / 56 / 58 rev1a
6/19 electrical characteristics unless otherwise noted: v cc = 3.0v to 5.5v, t a = t min to t max . typical values are at v cc = 5.0v, t a = 25c. symbol parameter conditions min typ max units driver dc characteristics v cc supply voltage range 3.0 5.5 v v l i/o logic supply voltage range v l v cc 1.65 5.5 v v od differential driver output, 4.5v v cc 5.5v r l = 100 (tia-422), figure 4 2 v cc v r l = 54 (tia-485), figure 4 1.5 v cc v -25v v cm 25v, figure 5 1.5 v cc v v od differential driver output, 3.0v v cc 4.5v r l = 100 (tia-422), figure 4 0.85 v cc v r l = 54 (tia-485), figure 4 0.65 v cc v ? v od change in magnitude of differential output voltage, note 1 rl = 100 (tia-422) or rl = 54 (tia-485), figure 4 0.2 v v cm driver common-mode output voltage (steady state) 1 3 v ? v cm change in magnitude of common-mode output voltage, note 1 0.2 v v ih logic high input thresholds (di, de and inv) v cc = 3.3v, for xr33152/58 2.0 v v cc = 5.0v, for xr33152/58 2.4 v v il logic low input thresholds (di, de and inv) for xr33152/58 0.8 v v ih logic high input thresholds (di, de, re , d inv and r inv ) v l v cc , for xr33156 (2/3)v l v v il logic low input thresholds (di, de, re , d inv and r inv ) v l v cc , for xr33156 (1/3)v l v v hys input hysteresis (di, de, re , d inv , r inv and inv) 100 mv i in logic input current (di, de and re ) 0v v in v cc , for xr33152/58 after first transition, note 2 1 a logic input current (inv) v in = v cc = 5.5v, for xr33152/58 25 33 55 a logic input current (di, de and re ) 0v v in v l = v cc = 5.5v, for xr33156 after first transition, note 2 1 a logic input current (d inv and r inv ) v in = v l = v cc = 5.5v, for xr33156 25 33 55 a i inhs logic input current hot swap (de and re ) until first transition, note 2 100 200 a i a, b input current (a and b) v cc = 0v or 5.5v, v out = 12v, de = 0v, for xr33152 100 a v cc = 0v or 5.5v, v out = -7v, de = 0v, for xr33152 -80 a v out = 12v, de = 0v, v cc = 0v or 5.5v, for xr33156/58 400 a v out = -7v, de = 0v, v cc = 0v or 5.5v, for xr33156/58 -320 a notes: 1. change in magnitude of differential output voltage and change in magnitude of common mode output voltage are the changes in output voltage when di input changes state. 2. the hot swap feature disables the de and re inputs for the first 10s after power is applied. following this time period, these inputs are weakly pulled to their disabled state (low for de, high for re ) until the first transition, after which they become high impedance inputs. xr 33152 / 56 / 58 rev1a
7/19 electrical characteristics unless otherwise noted: v cc = 3.0v to 5.5v, t a = t min to t max . typical values are at v cc = 5.0v, t a = 25c. symbol parameter conditions min typ max units i ol output leakage (y and z) full duplex v out = 12v, de = 0v, v cc = 0v or 5.5v 100 a v out = -7v, de = 0v, v cc = 0v or 5.5v -80 a i osd driver short-circuit output current -60v v out 60v, figure 6 250 a driver thermal characteristics t ts thermal shutdown temperature junction temperature, note 1 175 c t tsh thermal shutdown hysteresis note 1 15 c receiver dc characteristics v sth receiver differential input signal threshold voltage (v a - v b ) -25v v out 25v 85 200 mv ? v sth receiver differential input signal hysteresis 170 mv v fsth- negative going receiver differential input failsafe threshold voltage (v a - v b ) -25v v out 25v -200 -125 -40 mv v fsth+ positive going receiver differential input failsafe threshold voltage (v a - v b ) -25v v out 25v -100 -10 mv ? v fsth receiver differential input failsafe hysteresis 25 mv v oh receiver output high voltage (ro) i out = -4ma, for xr33152/58 v cc - 0.6 v v ol receiver output low voltage (ro) i out = 4ma, for xr33152/58 0.4 v v oh receiver output high voltage (ro) 3.0v v l 5.5v, i out = -4ma, 1.6v v l 3.0v, i out = -1ma, for xr33156 v l - 0.6 v v ol receiver output low voltage (ro) 3.0v v l 5.5v, i out = 4ma, 1.6v v l 3.0v, i out = 1ma, for xr33156 0.4 v i ozr high-z receiver output current 0v v out v cc , for xr33152/58 0v v out v l , for xr33156 1 a r in rx input resistance -25v v cm 25v, for xr33152 120 k -25v v cm 25v, for xr33156/58 30 k i osc rx output short-circuit current 0v v ro v cc , for xr33152/58 110 ma rx output short-circuit current 0v v ro v l , for xr33156 110 ma supply current i cc supply current no load, re = 0v or v cc , de = v cc , di = 0v or v cc 4 ma i shdn supply current in shutdown mode re = v cc , de = 0v 0.001 1 a esd protection esd protection for a, b, y, and z human body model 15 kv esd protection for all other pins human body model 4 kv notes: 1. this spec is guaranteed by design and bench characterization. xr 33152 / 56 / 58 rev1a
8/19 electrical characteristics driver ac characteristics - xr33152 (250kbps) unless otherwise noted: v cc = 3.0v to 5.5v, t a = t min to t max . typical values are at v cc = 5.0v, t a = 25c. symbol parameter conditions min typ max units t dplh driver prop. delay (low to high) c l = 50pf, r l = 54, figure 8 350 1500 ns t dphl driver prop. delay (high to low) 350 1600 ns | t dplh -t dphl | differential driver output skew 20 200 ns t dr , t df driver differential output rise or fall time 400 1500 ns maximum data rate 1/t ui , duty cycle 40% to 60% 250 kbps t dzh driver enable to output high c l = 50pf, r l = 500, figure 9 200 2500 ns t dzl driver enable to output low 200 2500 ns t dhz driver disable from output high 250 ns t dlz driver disable from output low 250 ns t rzh(shdn) driver enable from shutdown to output high c l = 50pf, r l = 500, figure 9 5500 ns t rzl(shdn) driver enable from shutdown to output low 5500 ns t shdn time to shutdown notes 1 and 2 50 200 600 ns receiver ac characteristics - xr33152 (250kbps) unless otherwise noted: v cc = 3.0v to 5.5v, t a = t min to t max . typical values are at v cc = 5.0v, t a = 25c. symbol parameter conditions min typ max units t rplh receiver prop. delay (low to high) c l = 15pf, v id = 2v, v id rise and fall times < 15ns, figure 10 200 ns t rphl receiver prop. delay (high to low) 200 ns | t rplh -t rphl | receiver propagation delay skew 30 ns maximum data rate 1/t ui , duty cycle 40% to 60% 250 kbps notes: 1. the transceivers are put into shutdown by bringing re high and de low simultaneously for at least 600ns. if the control inputs are in this state for less than 50ns, the device is guaranteed to not enter shutdown. if the enable inputs are held in this state for at least 600ns, the device is ensured to be in shutdown. note that the receiver and driver enable times increase significantly when coming out of shutdown. 2. this spec is guaranteed by design and bench characterization. xr 33152 / 56 / 58 rev1a
9/19 electrical characteristics driver ac characteristics - xr33156 and xr33158 (20mbps) unless otherwise noted: v cc = 3.0v to 5.5v, t a = t min to t max . typical values are at v cc = 5.0v, t a = 25c. symbol parameter conditions min typ max units t dplh driver prop. delay (low to high) c l = 50pf, r l = 54, figure 8 25 ns t dphl driver prop. delay (high to low) 25 ns | t dplh -t dphl | differential driver output skew 5 ns t dr , t df driver differential output rise or fall time 15 ns maximum data rate 1/t ui , duty cycle 40% to 60% 20 mbps t dzh driver enable to output high c l = 50pf, r l = 500, figure 9 60 ns t dzl driver enable to output low 60 ns t dhz driver disable from output high 250 ns t dlz driver disable from output low 250 ns t dzh(shdn) driver enable from shutdown to output high c l = 50pf, r l = 500, figure 9 2200 ns t dzl(shdn) driver enable from shutdown to output low 2200 ns t shdn time to shutdown notes 1 and 2 50 200 600 ns receiver ac characteristics - xr33156 and xr33158 (20mbps) unless otherwise noted: v cc = 3.0v to 5.5v, t a = t min to t max . typical values are at v cc = 5.0v, t a = 25c. symbol parameter conditions min typ max units t rplh receiver prop. delay (low to high) c l = 15pf, v id = 2v, v id rise and fall times < 15ns, figure 10 60 ns t rphl receiver prop. delay (high to low) 60 ns | t rplh -t rphl | receiver propagation delay skew 5 ns maximum data rate 1/t ui , duty cycle 40% to 60% 20 mbps t rzh receiver enable to output high c l = 15pf, r l = 1k, figure 11, for xr33156 50 ns t rzl receiver enable to output low 50 ns t rhz receiver disable from output high 50 ns t rlz receiver disable from output low 50 ns t rzh(shdn) receiver enable from shutdown to output high c l = 15pf, r l = 1k, figure 11, for xr33156 2200 ns t rzl(shdn) receiver enable from shutdown to output low 2200 ns t shdn time to shutdown notes 1 and 2, for xr33156 50 200 600 ns notes: 1. the transceivers are put into shutdown by bringing re high and de low simultaneously for at least 600ns. if the control inputs are in this state for less than 50ns, the device is guaranteed to not enter shutdown. if the enable inputs are held in this state for at least 600ns, the device is ensured to be in shutdown. note that the receiver and driver enable times increase significantly when coming out of shutdown. 2. this spec is guaranteed by design and bench characterization. xr 33152 / 56 / 58 rev1a
10/19 figure 4. differential driver output voltage d di = ov or v cc de = v cc y z r l 2 v od v cm r l 2 figure 5. differential driver output voltage over common mode d di = ov or v cc de = v cc y z 375 375 60 v od v cm applications information figure 2. half duplex (xr33152, and xr33158) r o 1 inv 2 d e 3 d i 4 v cc 8 b/z 7 a/y 6 gnd 5 d r r inv 1 ro 2 re 3 de 4 di 5 gnd 6 gnd 7 v cc 14 v l 13 a 12 b 11 z 10 y 9 d inv 8 d r figure 3. full duplex (xr33156) xr 33152 / 56 / 58 rev1a
11/19 figure 7. transient overvoltage test circuit device powered on/off a or z b or y v test 15 us duration 15 duty cycle 100 transceiver, generator, receiver figure 8. driver propagation delay test circuit and timing diagram d v od r l c l y z de = v cc di z y di 1.5v 1.5v t skew = t dplh ? t dphl v od (v y - v z ) 3v 10% 90% 10% 90% t df t dr t dplh t dphl ov ov v od v od? v od+ figure 6. driver output short circuit current d di = ov or v cc de = ov or v cc y -60v to 60v z i osd v applications information xr 33152 / 56 / 58 rev1a
12/19 applications information figure 9. driver enable and disable timing test circuits and timing diagrams d v out r l c l d e testing z: di = ov testing y: di = v cc y z d v out r l v cc c l de testing z: di = v cc testing y: di = ov y z v out de 1.5v 1.5v 3v t dzh v oh + v ol v oh ? 0.25v 2 t dhz ov v oh v ol v out de 1.5v 1.5v 3v t dzl v oh + v ol v ol + 0.25v 2 t dlz ov v oh v ol xr 33152 / 56 / 58 rev1a
13/19 applications information figure 10. receiver propagation delay test circuit and timing diagram r ro c l re = ov a b t rplh b a ro t rphl v oh ?1v 0v +1v v ol v cc/2 v cc/2 v id xr 33152 / 56 / 58 rev1a
14/19 applications information figure 11. receiver enable and disable test circuits and timing diagrams r ro r l c l re a b r l v cc r ro c l re a b ro 1.5v 1.5v 3v t rzh v oh v oh ? 0.25v v a = v cc v b = ov 2 t rhz ov v oh ov re 1.5v 1.5v 3v t rzl v cc + v ol v ol + 0.25v 2 t rlz ov v cc v ol ro v a = ov v b = v cc re xr 33152 / 56 / 58 rev1a
15/19 applications information the xr33152/56/58 tia-485/tia-422 devices are part of exars high performance serial interface product line. the analog bus pins can survive direct shorts up to 60v and are protected against esd events up to 15kv. enhanced failsafe ordinary tia-485 differential receivers will be in an indeterminate state whenever the data bus is not being actively driven. the enhanced failsafe feature of the xr33152/56/58 family guarantees a logic-high receiver output when the receiver inputs are open, shorted or when they are connected to a terminated transmission line with all drivers disabled. in a terminated bus with all transmitters disabled, the receivers differential input voltage is pulled to 0v by the termination. the xr33152/56/58 family interprets 0v differential as a logic high with a minimum 50mv noise margin while maintaining compliance with the tia-485 standard of 200mv. although the xr33152/56/58 family does not need failsafe biasing resistors, it can operate without issue if biasing is used. receiver input filtering the xr33152 receivers incorporate internal filtering in addition to input hysteresis. this filtering enhances noise immunity by ignoring signals that do not meet a minimum pulse width of 30ns. receiver propagation delay increases slightly due to this filtering. the high speed xr33156 and xr33158 devices do not have this input filtering. hot swap capability when v cc is first applied the xr33152/56/58 family holds the driver enable and receiver enable inactive for approximately 10s. during power ramp-up, other system ics may drive unpredictable values or tristated lines may be influenced by stray capacitance. the hot swap feature prevents the xr33152/56/58 family from driving any output signal until power has stabilized. after the initial 10s, the driver and receiver enable pins are weakly pulled to their disabled states (low for de and high for re ) until the first transition. after the first transition, the de and re pins operate as high impedance inputs. if circuit boards are inserted into an energized backplane (commonly called live insertion or hot swap) power may suddenly be applied to all circuits. without the hot swap capability, this situation could improperly enable the transceivers driver or receiver, driving invalid data onto shared buses and possibly causing driver contention or device damage. driver output protection two mechanisms prevent excessive output current and power dissipation caused by faults or by bus contention. first, a driver current limit on the output stage provides immediate protection against short circuits over the whole common-mode voltage range. second, a thermal shutdown circuit forces the driver outputs into a high impedance state if junction temperature becomes excessive. line length the tia-485/tia-422 standard covers line lengths up to 4000ft. maximum achievable line length is a function of signal attenuation and noise. termination prevents signal reflections by eliminating the impedance mismatches on a transmission line. line termination is generally used if rise and fall times are shorter than the round trip signal propagation time. higher output drivers may allow longer cables to be used. 15kv esd protection esd protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. the driver outputs and receiver inputs of the xr33152/56/58 family has extra protection against static electricity. exar uses state-of-the- art structures to protect these pins against esd of 15kv without damage. the esd structures withstand high esd in all states: normal operation, shutdown and powered down. after an esd event, the xr33152/56/58 keep operating without latch up or damage. esd protection can be tested in various ways. the transmitter outputs and receiver inputs of the xr33152/56/58 are characterized for protection to the following limits: 15kv using the human body model, tia-485 bus pins 4kv using the human body model, all other pins esd test conditions esd performance depends on a variety of conditions. contact exar for a reliability report that documents test setup, methodology and results. maximum number of transceivers on the bus the standard tia-485 receiver input impedance is 12k (1 unit load). a standard driver can drive up to 32 unit loads. the xr33152 transceiver has a 1/10th unit load receiver input impedance of 120k, allowing up to 320 transceivers to be connected in parallel on a communication line. the xr33156/58 transceivers have a 1/2.5 unit load receiver input impedance of 30k, allowing up to 80 transceivers to be connected in parallel on a communication line. any combination of these devices and other tia-485 transceivers up to a total of 32 unit loads may be connected to the line. xr 33152 / 56 / 58 rev1a
16/19 product selector guide part number operation data rate shutdown receiver/driver enable nodes on bus footprint xr33152 half duplex 250kbps no no/yes 320 8-nsoic xr33156 full duplex 20mbps yes yes/yes 80 14-nsoic xr33158 half duplex no no/yes 80 8-nsoic applications information low power shutdown mode the xr33156 has a low-power shutdown mode that is initiated by bringing both re high and de low simultaneously. while in shutdown the xr33156 draws less than 1a of supply current. de and re may be tied together and driven by a single control signal. devices are guaranteed not to enter shutdown if re is high and de is low for less than 50ns. if the inputs are in this state for at least 600ns, the parts will enter shutdown. xr33156 enable times, t zh and t zl , apply when the part is not in low power shutdown state. enable times, t zh ( shdn ) and t zl ( shdn ) apply when the part is shutdown. the driver and receiver take longer to become enabled from low power shutdown t zh ( shdn ) and t zl ( shdn ) than from driver or receiver disable mode (t zh and t zl ). xr 33152 / 56 / 58 rev1a
17/19 package description 8-pin nsoic package 8-pin nsoic (jedec ms-012) symbols dimension in mm (control unit) dimension in inches (reference unit) min nom max min nom max a 1.35 - 1.75 0.053 - 0.069 a1 0.10 - 0.25 0.004 - 0.010 a2 1.25 - 1.65 0.049 - 0.065 b 0.31 - 0.51 0.012 - 0.020 c 0.17 - 0.25 0.007 - 0.010 e 6.00 bsc 0.236 bsc e1 3.90 bsc 0.154 bsc e 1.27 bsc 0.050 bsc h 0.25 - 0.50 0.010 - 0.020 l 0.40 - 1.27 0.016 - 0.050 l1 1.04 ref 0.041 ref l2 0.25 bsc 0.010 bsc r 0.07 - - 0.003 - - r1 0.07 - - 0.003 - - 0 - 8 0 - 8 1 5 - 15 5 - 15 2 0 - - 0 - - d 4.90 bsc 0.193 bsc n 8 8 e1 d n index area (d/2 x e1/2) top view recommended pcb land pattern front view e b e 2 1 n 4.93 mm 0.53 mm 1.27 mm 1.98 mm 2 1 side view a a2 a1 (l1) l l2 2 1 gauge plane seating plane h x 45 r1 r c e1 d n index area (d/2 x e1/2) top view recommended pcb land pattern front view e b e 2 1 n 4.93 mm 0.53 mm 1.27 mm 1.98 mm 2 1 side view a a2 a1 (l1) l l2 2 1 gauge plane seating plane h x 45 r1 r c xr 33152 / 56 / 58 rev1a
18/19 package description 14-pin nsoic package 14-pin nsoic (jedec ms-012) symbols dimension in mm (control unit) dimension in inches (reference unit) min nom max min nom max a 1.35 - 1.75 0.053 - 0.069 a1 0.10 - 0.25 0.004 - 0.010 a2 1.25 - 1.65 0.049 - 0.065 b 0.31 - 0.51 0.012 - 0.020 c 0.17 - 0.25 0.007 - 0.010 e 6.00 bsc 0.236 bsc e1 3.90 bsc 0.154 bsc e 1.27 bsc 0.050 bsc h 0.25 - 0.50 0.010 - 0.020 l 0.40 - 1.27 0.016 - 0.050 l1 1.04 ref 0.041 ref l2 0.25 bsc 0.010 bsc r 0.07 - - 0.003 - - r1 0.07 - - 0.003 - - 0 - 8 0 - 8 1 5 - 15 5 - 15 2 0 - - 0 - - d 8.65 bsc 0.341 bsc n 14 14 e1 d n index area (d/2 x e1/2) top view front view e b e 2 1 3 side view a a2 a1 (l1) l l2 2 1 gauge plane seating plane h x 45 r1 r c e1 d n index area (d/2 x e1/2) top view front view e b e 2 1 3 side view a a2 a1 (l1) l l2 2 1 gauge plane seating plane h x 45 r1 r c xr 33152 / 56 / 58 rev1a
tel.: +1 (510) 668-7000 fax: +1 (510) 668-7001 email: s upport@exar.com www.exar.com 19/19 order information part number operation data rate package environmental rating operating temperature range xr33152id-f half duplex 250kbps 8-pin soic green/rohs -40c to 85c xr33152idtr-f xr33156id-f full duplex 20mbps 14-pin soic xr33156idtr-f XR33158ID-F half duplex 8-pin soic xr33158idtr-f xr 33152 / 56 / 58 48760 kato road fremont, ca 94538 usa exar corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. exar corporation conveys no license under any patent or other right and makes no representation that the circuits are free of patent infringement. while the information in this publication has been carefully checked, no responsibility, however, is assumed for inaccuracies. exar corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. products are not authorized for use in such applications unless exar corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of exar corporation is adequately protected under the circumstances. reproduction, in part or whole, without the prior written consent of exar corporation is prohibited. exar, xr and the xr logo are registered trademarks of exar corporation. all other trademarks are the property of their respective owners. ?2015 exar corporation xr33152/56/58_ds_121015 rev1a

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