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lt3014 1 3014fd typical application features applications description 20ma, 3v to 80v low dropout micropower linear regulator the lt ? 3014 is a high voltage, micropower low dropout linear regulator. the device is capable of supplying 20ma of output current with a dropout voltage of 350mv. designed for use in battery-powered or high voltage systems, the low quiescent current (7a operating and 1a in shutdown) makes the lt3014 an ideal choice. quiescent current is also well controlled in dropout. other features of the lt3014 include the ability to operate with very small output capacitors. the regulators are stable with only 0.47f on the output while most older devices require between 10f and 100f for stability. small ceramic capacitors can be used without the necessary addition of esr as is common with other regulators. internal protec- tion circuitry includes reverse-battery protection, current limiting, thermal limiting and reverse current protection. the device is available as an adjustable device with a 1.22v reference voltage. the lt3014 regulator is available in the 5-lead thinsot and 8-lead dfn packages. dropout voltage n wide input voltage range: 3v to 80v n low quiescent current: 7a n low dropout voltage: 350mv n output current: 20ma n lt3014hv survives 100v transients (2ms) n no protection diodes needed n adjustable output from 1.22v to 60v n 1a quiescent current in shutdown n stable with 0.47f output capacitor n stable with aluminum, tantalum or ceramic capacitors n reverse-battery protection n no reverse current flow from output n thermal limiting available in 5-lead thinsot tm and 8-lead dfn packages n low current high voltage regulators n regulator for battery-powered systems n telecom applications n automotive applications l , lt, ltc and ltm are registered trademarks of linear technology corporation. thinsot is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents including 6118263, 6144250. 5v supply with shutdown in lt3014 shdn 1f v in 5.4v to80v out adj gnd 3014 ta01 v out 5v20ma 0.47 f 3.92m1.27m v shdn <0.3v>2.0v output off on 400350 300 250 200 150 100 50 0 3014 ta02 output current (ma) dropout voltage (mv) 0 4 10 12 268 1 4 1 6 1 8 2 0 downloaded from: http:///
lt3014 2 3014fd absolute maximum ratings in pin voltage, operating ................................... 80v transient (2ms survival, lt3014hv) ................ +100v out pin voltage ................................................. 60v in to out differential voltage ............................ 80v adj pin voltage ................................................... 7v shdn pin input voltage ..................................... 80v output short-circuit duration ......................inde? nite (note 1) 5 out4 adj in 1 top view s5 package 5-lead plastic sot-23 gnd 2 shdn 3 t jmax = 125c, ja = 150c/ w jc = 25c/w measured at pin 2 see applications information section top view dd package 8-lead (3mm 3mm) plastic dfn exposed pad is gnd (pin 9) must be soldered to pcb 5 6 7 8 4 3 2 1 out adj nc gnd innc nc shdn 9 t jmax = 125c, ja = 40c/ w jc = 10c/w measured at pin 9 pin configuration order information lead free finish tape and reel part marking* package description temperature range lt3014es5#pbf lt3014es5#trpbf ltbmf 5-lead plastic sot-23 C40c to 125c lt3014is5#pbf lt3014is5#trpbf ltbmf 5-lead plastic sot-23 C40c to 125c lt3014hves5#pbf lt3014hves5#trpbf ltbrs 5-lead plastic sot-23 C40c to 125c lt3014hvis5#pbf lt3014hvis5#trpbf ltbrs 5-lead plastic sot-23 C40c to 125c lt3014edd#pbf lt3014edd#trpbf lbmg 8-lead (3mm 3mm) plastic dfn C40c to 125c lt3014idd#pbf lt3014idd#trpbf lbmg 8-lead (3mm 3mm) plastic dfn C40c to 125c lt3014hvedd#pbf lt3014hvedd#trpbf lbrt 8-lead (3mm 3mm) plastic dfn C40c to 125c lt3014hvidd#pbf lt3014hvidd#trpbf lbrt 8-lead (3mm 3mm) plastic dfn C40c to 125c lead based finish tape and reel part marking* package description temperature range lt3014es5 lt3014es5#tr ltbmf 5-lead plastic sot-23 C40c to 125c lt3014is5 lt3014is5#tr ltbmf 5-lead plastic sot-23 C40c to 125c lt3014hves5 lt3014hves5#tr ltbrs 5-lead plastic sot-23 C40c to 125c lt3014hvis5 lt3014hvis5#tr ltbrs 5-lead plastic sot-23 C40c to 125c lt3014edd lt3014edd#tr lbmg 8-lead (3mm 3mm) plastic dfn C40c to 125c lt3014idd lt3014idd#tr lbmg 8-lead (3mm 3mm) plastic dfn C40c to 125c lt3014hvedd lt3014hvedd#tr lbrt 8-lead (3mm 3mm) plastic dfn C40c to 125c lt3014hvidd lt3014hvidd#tr lbrt 8-lead (3mm 3mm) plastic dfn C40c to 125c consult ltc marketing for parts speci? ed with wider operating temperature ranges. *the temperature grade is identi? ed by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/ storage temperature range thinsot package .......................... C65c to 150c dfn package ..................................C65c to 125c operating junction temperature range (notes 3, 10, 11) ............................C40c to 125c lead temperature (soldering, 10 sec, sot-23 package) ............300c downloaded from: http:///
lt3014 3 3014fd electrical characteristics symbol conditions min typ max units minimum input voltage i load = 20ma l 3 3.3 v adj pin voltage (notes 2, 3) v in = 3.3v, i load = 100a 3.3v < v in < 80v, 100a < i load < 20ma l 1.2001.180 1.2201.220 1.2401.260 vv line regulation v in = 3.3v to 80v, i load = 100a (note 2) l 11 0 m v load regulation (note 2) v in = 3.3v, i load = 100a to 20ma v in = 3.3v, i load = 100a to 20ma l 13 25 40 mvmv dropout voltage v in = v out(nominal) (notes 4, 5) i load = 100a i load = 100a l 120 180 250 mvmv i load = 1ma i load = 1ma l 200 270 360 mvmv i load = 10ma i load = 10ma l 300 350 450 mvmv i load = 20ma i load = 20ma l 350 410 570 mvmv gnd pin currentv in = v out(nominal) (notes 4, 6) i load = 0ma i load = 100a i load = 1ma i load = 10ma i load = 20ma ll l l l 7 1240 250650 2030 100450 1000 aa a a a output voltage noise c out = 0.47f, i load = 20ma, bw = 10hz to 100khz 115 v rms adj pin bias current (note 7) 4 10 na shutdown threshold v out = off to on v out = on to off ll 0.25 1.31.3 2v v shdn pin current (note 8) v shdn = 0v v shdn = 6v ll 10 41 aa quiescent current in shutdown v in = 6v, v shdn = 0v l 14 a ripple rejection v in = 7v (avg), v ripple = 0.5v p-p , f ripple = 120hz, i load = 20ma 60 70 db current limit v in = 7v, v out = 0v v in = 3.3v, v out = C0.1v (note 2) l 25 70 ma ma input reverse leakage current v in = C80v, v out = 0v l 6m a reverse output current (note 9) v out = 1.22v, v in < 1.22v (note 2) 2 4 a the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t j = 25c. note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the lt3014 is tested and speci? ed for these conditions with the adj pin connected to the out pin.note 3: operating conditions are limited by maximum junction temperature. the regulated output voltage speci? cation will not apply for all possible combinations of input voltage and output current. when operating at maximum input voltage, the output current range must be limited. when operating at maximum output current, the input voltage range must be limited. note 4: to satisfy requirements for minimum input voltage, the lt3014 is tested and speci? ed for these conditions with an external resistor divider (249k bottom, 392k top) for an output voltage of 3.3v. the external resistor divider adds a 5a dc load on the output. note 5: dropout voltage is the minimum input to output voltage differential needed to maintain regulation at a speci? ed output current. in dropout, the output voltage is equal to (v in ? v dropout ). note 6: gnd pin current is tested with v in = v out (nominal) and a current source load. this means the device is tested while operating in its dropout region. this is the worst-case gnd pin current. the gnd pin current decreases slightly at higher input voltages. note 7: adj pin bias current ? ows into the adj pin. note 8: shdn pin current ? ows out of the shdn pin. note 9: reverse output current is tested with the in pin grounded and the out pin forced to the rated output voltage. this current ? ows into the out pin and out of the gnd pin. note 10: the lt3014 is tested and speci? ed under pulse load conditions such that t j ? t a . the lt3014e is 100% tested at t a = 25c. performance at C40c to 125c is assured by design, characterization, and statistical downloaded from: http:///
lt3014 4 3014fd typical performance characteristics output current (ma) dropout voltage (mv) 3014 g01 01 6 4 2 6 10 14 18 81 2 2 0 500450 400 300 350250 200 150 100 50 0 t j = 125 c t j = 25 c output current (ma) 0 dropout voltage (mv) 200 400 600100 300 500 4 8 12 16 3014 g02 20 2 0 6 10 14 18 = test points t j 125 c t j 25 c temperature ( c) C50 0 dropout voltage (mv) 50 150 200 250 500350 0 50 75 3014 g03 100 400 450300 C25 25 100 125 i l = 20ma i l = 10ma i l = 1ma i l = 100 a temperature ( c) C50 quiescent current ( a) 14 25 3014 g04 8 4 C25 0 50 20 1612 10 6 75 100 125 v shdn = 0v v in = 6v r l = i l = 0 v shdn = v in temperature ( c) C50 adj pin voltage (v) 1.235 25 3014 g05 1.220 1.210 C25 0 50 1.2051.200 1.2401.230 1.225 1.215 75 100 125 i l = 100 a 08 2 13579 4 6 10 1614 12 10 86 4 2 0 input voltage (v) quiescent current ( a) 3014 g06 v shdn = v in v shdn = 0v t j = 25 c r l = v out = 1.22v typical dropout voltage guaranteed dropout voltage dropout voltage quiescent current adj pin voltage quiescent current process controls. the lt3014i is guaranteed over the full C40c to 125c operating junction temperature. note 11: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125c when overtemperature protection is active. continuous operation above the speci? ed maximum operating junction temperature may impair device reliability. electrical characteristics downloaded from: http:///
lt3014 5 3014fd input voltage (v) 0 gnd pin current ( a) 600 800 1000 8 3014 g07 400200 500 700 900300 100 0 2 14 36 79 51 0 t j = 25 c *for v out = 1.22v r l = 61 i l = 20ma* r l = 122 i l = 10ma* r l = 1.22k i l = 1ma* output current (ma) 0 gnd pin current ( a) 600 800 1000 16 3014 g08 400200 500 700 900300 100 0 4 2 8 6 12 14 18 10 20 v in = 3.3v t j = 25 c v out = 1.22v temperature ( c) C50 2.01.8 1.6 1.2 1.41.0 0.8 0.6 0.4 0.2 0 3014 g09 25 0 C25 50 75 125 100 shdn pin threshold (v) typical performance characteristics gnd pin current gnd pin current vs i load shdn pin threshold shdn pin voltage (v) 0 shdn pin current ( a) 0.4 0.8 1.20.2 0.6 1.0 3014 g10 012 3 4 0.5 1.5 2.5 3.5 t j = 25 c current flowsout of shdn pin temperature ( c) C50 shdn pin current ( a) 1.4 25 3014 g11 0.80.4 C25 0 50 0.2 0 1.61.2 1.0 0.6 75 100 125 v shdn = 0v current flowsout of shdn pin temperature ( c) adj pin bias current (na) 25 3014 g12 C25 0 50 C50 75 100 125 1412 10 86 4 2 0 input voltage (v) 0 current limit (ma) 16 3014 g13 4 28 61 2 1 41 8 10 20 7040 20 10 0 8060 50 30 v out = 0v t j = 25 c temperature ( c) C50 0 current limit (ma) 10 30 40 50 100 70 0 50 75 3014 g14 20 80 9060 C25 25 100 125 v in = 7v v out = 0v output voltage (v) 0 reverse output current ( a) 30 40 50 8 3014 g15 2010 25 35 4515 50 2 1 4 3 67 9 5 10 t j = 25 c v in = 0v v out = v adj current flowsinto output pin adj pin esd clamp shdn pin current shdn pin current adj pin bias current current limit current limit reverse output current downloaded from: http:///
lt3014 6 3014fd temperature ( c) C50 reverse output current ( a) 7 25 3014 g16 42 C25 0 50 10 86 5 3 75 100 125 v in = 0v v out = v adj = 1.22v temperature ( c) C50 ripple rejection (db) 70 25 3014 g17 6460 C25 0 50 5856 7268 66 62 75 100 125 v in = 7v + 0.5v p-p ripple at f = 120hzi l = 20ma frequency (hz) 10 ripple rejection (db) 100 1k 10k 100k 1m 3014 g18 7040 20 10 0 8060 50 30 v in = 7v + 50mv rms ripple i l = 20ma c out = 4.7 f c out = 0.47 f typical performance characteristics reverse output current input ripple rejection input ripple rejection temperature ( c) C50 3.53.0 2.5 2.0 1.5 1.0 0.5 0 25 75 3014 g19 C25 0 50 100 125 minimum input voltage (v) i load = 20ma temperature ( c) C50 load regulation (mv) C5 25 3014 g20 C20 C30 C25 0 50 C35C40 0 C10C15 C25 75 100 125 i l = 100 a to 20ma v out = 1.22v frequency (hz) 0.1 output noise spectral density ( v/ hz) 1 10 1k 10k 100k 3014 g21 0.01 100 10 c out = 0.47 f i l = 20ma v out = 1.22v 1ms/div v out 200v/div 3014 g22 c out = 0.47f i l = 200ma v out = 1.22v time ( s) 0 output voltage deviation (v) load current (ma) C0.02 0.02 800 3014 g23 4 C0.04 0 0.04 62 0 200 400 600 1000 v in = 7v v out = 5v c in = c out = 0.47 f ceramic i load = 1ma to 5ma minimum input voltage load regulation output noise spectral density 10hz to 100khz output noise transient response downloaded from: http:///
lt3014 7 3014fd pin functions in (pin 1/pin 8): input. power is supplied to the device through the in pin. a bypass capacitor is required on this pin if the device is more than six inches away from the main input ? lter capacitor. in general, the output impedance of a battery rises with frequency, so it is advisable to include a bypass capacitor in battery-powered circuits. a bypass capacitor in the range of 0.1f to 10f is suf? cient. the lt3014 is designed to withstand reverse voltages on the in pin with respect to ground and the out pin. in the case of a reversed input, which can happen if a battery is plugged in backwards, the lt3014 will act as if there is a diode in series with its input. there will be no reverse current ? ow into the lt3014 and no reverse voltage will appear at the load. the device will protect both itself and the load. gnd (pin 2/pins 4, 9): ground. shdn (pin 3/pin 5): shutdown. the shdn pin is used to put the lt3014 into a low power shutdown state. the output will be off when the shdn pin is pulled low. the shdn pin can be driven either by 5v logic or open-collector logic with a pull-up resistor. the pull-up resistor is only required to supply the pull-up current of the open-collec- tor gate, normally several microamperes. if unused, the shdn pin must be tied to in or to a logic high. adj (pin 4/pin 2): adjust. this is the input to the error ampli? er. this pin is internally clamped to 7v. it has a bias current of 4na which ? ows into the pin (see curve of adj pin bias current vs temperature in the typical performance characteristics). the adj pin voltage is 1.22v referenced to ground, and the output voltage range is 1.22v to 60v. out (pin 5/pin 1): output. the output supplies power to the load. a minimum output capacitor of 0.47f is required to prevent oscillations. larger output capacitors will be required for applications with large transient loads to limit peak voltage transients. see the applications information section for more information on output capacitance and reverse output characteristics. (sot-23 package/dd package) downloaded from: http:///
lt3014 8 3014fd applications information the lt3014 is a 20ma high voltage low dropout regulator with micropower quiescent current and shutdown. the device is capable of supplying 20ma at a dropout voltage of 350mv. the low operating quiescent current (7a) drops to 1a in shutdown. in addition to the low quiescent cur- rent, the lt3014 incorporates several protection features which make it ideal for use in battery-powered systems. the device is protected against both reverse input and reverse output voltages. in battery backup applications where the output can be held up by a backup battery when the input is pulled to ground, the lt3014 acts like it has a diode in series with its output and prevents reverse current ? ow. adjustable operation the lt3014 has an output voltage range of 1.22v to 60v. the output voltage is set by the ratio of two external resistors as shown in figure 1. the device servos the output to maintain the voltage at the adjust pin at 1.22v referenced to ground. the current in r1 is then equal to 1.22v/r1 and the current in r2 is the current in r1 plus the adj pin bias current. the adj pin bias current, 4na at 25c, ? ows through r2 into the adj pin. the output voltage can be calculated using the formula in figure 1. the value of r1 should be less than 1.62m to minimize errors in the output voltage caused by the adj pin bias current. note that in shutdown the output is turned off and the divider current will be zero. the device is tested and speci? ed with the adj pin tied to the out pin and a 5a dc load (unless otherwise speci? ed) for an output voltage of 1.22v. speci? cations for output voltages greater than 1.22v will be proportional to the ratio of the desired output voltage to 1.22v (v out /1.22v). for example, load regulation for an output current change of 1ma to 20ma is C13mv typical at v out = 1.22v. at v out = 12v, load regulation is: (12v/1.22v) ? (C13mv) = C128mv output capacitance and transient response the lt3014 is designed to be stable with a wide range of output capacitors. the esr of the output capacitor affects stability, most notably with small capacitors. a minimum output capacitor of 0.47f with an esr of 3 or less is recommended to prevent oscillations. the lt3014 is a micropower device and output transient response will be a function of output capacitance. larger values of output capacitance decrease the peak deviations and provide improved transient response for larger load current changes. bypass capacitors, used to decouple individual components powered by the lt3014, will increase the effective output capacitor value. extra consideration must be given to the use of ceramic capacitors. ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior across temperature and applied voltage. the most common dielectrics used are speci? ed with eia temperature char- acteristic codes of z5u, y5v, x5r and x7r. the z5u and y5v dielectrics are good for providing high capacitances in a small package, but they tend to have strong voltage and temperature coef? cients as shown in figures 2 and 3. when used with a 5v regulator, a 16v 10f y5v capacitor can exhibit an effective value as low as 1f to 2f for the dc bias voltage applied and over the operating tempera- ture range. the x5r and x7r dielectrics result in more stable characteristics and are more suitable for use as the output capacitor. the x7r type has better stability across temperature, while the x5r is less expensive and is avail- able in higher values. care still must be exercised when using x5r and x7r capacitors; the x5r and x7r codes only specify operating temperature range and maximum capacitance change over temperature. capacitance change due to dc bias with x5r and x7r capacitors is better than y5v and z5u capacitors, but can still be signi? cant enough to drop capacitor values below appropriate levels. capaci-tor dc bias characteristics tend to improve as component case size increases, but expected capacitance at operating voltage should be veri? ed. figure 1. adjustable operation in lt3014 v in out adj gnd 3014 f01 v out r2r1 + r2r1 v out = 1.22v v adj = 1.22v i adj = 4na at 25 c output range = 1.22v to 60v + (i adj )(r2) 1 + ? ? downloaded from: http:///
lt3014 9 3014fd figure 2. ceramic capacitor dc bias characteristics table 1. sot-23 measured thermal resistance copper area board area thermal resistance (junction-to-ambient) topside backside 2500 sq mm 2500 sq mm 2500 sq mm 125c/w 1000 sq mm 2500 sq mm 2500 sq mm 125c/w 225 sq mm 2500 sq mm 2500 sq mm 130c/w 100 sq mm 2500 sq mm 2500 sq mm 135c/w 50 sq mm 2500 sq mm 2500 sq mm 150c/w voltage and temperature coef? cients are not the only sources of problems. some ceramic capacitors have a piezoelectric response. a piezoelectric device generates voltage across its terminals due to mechanical stress, simi- lar to the way a piezoelectric accelerometer or microphone works. for a ceramic capacitor the stress can be induced by vibrations in the system or thermal transients. for surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the pc board and its copper traces. copper board stiffeners and plated through-holes can also be used to spread the heat gener- ated by power devices. the following table lists thermal resistance for several different board sizes and copper areas. all measurements were taken in still air on 3/32 fr-4 board with one ounce copper. applications information figure 3. ceramic capacitor temperature characteristics table 2. dfn measured thermal resistance copper area board area thermal resistance (junction-to-ambient) topside backside 2500 sq mm 2500 sq mm 2500 sq mm 40c/w 1000 sq mm 2500 sq mm 2500 sq mm 45c/w 225 sq mm 2500 sq mm 2500 sq mm 50c/w 100 sq mm 2500 sq mm 2500 sq mm 62c/w for the dfn package, the thermal resistance junction-to-case ( jc ), measured at the exposed pad on the back of the die, is 16c/w. dc bias voltage (v) change in value (%) 3014 f02 20 0 C20C40 C60 C80 C100 0 4 8 10 26 12 14 x5r y5v 16 both capacitors are 16v,1210 case size, 10 f temperature ( c) C50 4020 0 C20C40 C60 C80 C100 25 75 3014 f03 C25 0 50 100 125 y5v change in value (%) x5r both capacitors are 16v,1210 case size, 10 f thermal considerationsthe power handling capability of the device will be limited by the maximum rated junction temperature (125c). the power dissipated by the device will be made up of two components: 1. output current multiplied by the input/output voltage differential: i out ? (v in C v out ) and, 2. gnd pin current multiplied by the input voltage: i gnd ? v in . the gnd pin current can be found by examining the gnd pin current curves in the typical performance character- istics. power dissipation will be equal to the sum of the two components listed above. the lt3014 regulator has internal thermal limiting de- signed to protect the device during overload conditions. for continuous normal conditions the maximum junction temperature rating of 125c must not be exceeded. it is important to give careful consideration to all sources of thermal resistance from junction to ambient. additional heat sources mounted nearby must also be considered. downloaded from: http:///
lt3014 10 3014fd applications information continuous operation at large input/output voltage dif-ferentials and maximum load current is not practical due to thermal limitations. transient operation at high input/output differentials is possible. the approximate thermal time constant for a 2500sq mm 3/32" fr-4 board with maximum topside and backside area for one ounce copper is 3 seconds. this time constant will increase as more thermal mass is added (i.e. vias, larger board, and other components). for an application with transient high power peaks, average power dissipation can be used for junction temperature calculations as long as the pulse period is signi? cantly less than the thermal time constant of the device and board. calculating junction temperature example 1: given an output voltage of 5v, an input volt- age range of 24v to 30v, an output current range of 0ma to 20ma, and a maximum ambient temperature of 50c, what will the maximum junction temperature be? the power dissipated by the device will be equal to: i out(max) ? (v in(max) C v out ) + (i gnd ? v in(max) ) where: i out(max) = 20ma v in(max) = 30v i gnd at (i out = 20ma, v in = 30v) = 0.55ma so: p = 20ma ? (30v C 5v) + (0.55ma ? 30v) = 0.52w the thermal resistance for the dfn package will be in the range of 40c/w to 62c/w depending on the copper area. so the junction temperature rise above ambient will be approximately equal to: 0.52w ? 50c/w = 26c the maximum junction temperature will then be equal to the maximum junction temperature rise above ambient plus the maximum ambient temperature or: t jmax = 50c + 26c = 76c example 2: given an output voltage of 5v, an input voltage of 48v that rises to 72v for 5ms(max) out of every 100ms, and a 5ma load that steps to 20ma for 50ms out of every 250ms, what is the junction temperature rise above ambi- ent? using a 500ms period (well under the time constant of the board), power dissipation is as follows: p1(48v in, 5ma load) = 5ma ? (48v C 5v) + (100a ? 48v) = 0.22w p2(48v in, 20ma load) = 20ma ? (48v C 5v) + (0.55ma ? 48v) = 0.89w p3(72v in, 5ma load) = 5ma ? (72v C 5v) + (100a ? 72v) = 0.34w p4(72v in, 20ma load) = 20ma ? (72v C 5v) + (0.55ma ? 72v) = 1.38w operation at the different power levels is as follows: 76% operation at p1, 19% for p2, 4% for p3, and 1% for p4. p eff = 76%(0.22w) + 19%(0.89w) + 4%(0.34w) + 1%(1.38w) = 0.36w with a thermal resistance in the range of 40c/w to 62c/w, this translates to a junction temperature rise above ambient of 20c. downloaded from: http:///
lt3014 11 3014fd protection features the lt3014 incorporates several protection features which make it ideal for use in battery-powered circuits. in ad- dition to the normal protection features associated with monolithic regulators, such as current limiting and thermal limiting, the device is protected against reverse-input volt- ages, and reverse voltages from output to input. current limit protection and thermal overload protection are intended to protect the device against current overload conditions at the output of the device. for normal operation, the junction temperature should not exceed 125c. the input of the device will withstand reverse voltages of 80v. current ? ow into the device will be limited to less than 6ma (typically less than 100a) and no negative voltage will appear at the output. the device will protect both itself and the load. this provides protection against batteries which can be plugged in backward. the adj pin can be pulled above or below ground by as much as 7v without damaging the device. if the input is left open circuit or grounded, the adj pin will act like an open circuit when pulled below ground, and like a large resistor (typically 100k) in series with a diode when pulled above ground. if the input is powered by a voltage source, pulling the adj pin below the reference voltage will cause the device to current limit. this will cause the output to go to an unregulated high voltage. pulling the adj pin above the reference voltage will turn off all output current. in situations where the adj pin is connected to a resistor divider that would pull the adj pin above its 7v clamp volt- age if the output is pulled high, the adj pin input current must be limited to less than 5ma. for example, a resistor divider is used to provide a regulated 1.5v output from the 1.22v reference when the output is forced to 60v. the top resistor of the resistor divider must be chosen to limit the current into the adj pin to less than 5ma when the adj pin is at 7v. the 53v difference between the out and adj pins divided by the 5ma maximum current into the adj pin yields a minimum top resistor value of 10.6k. in circuits where a backup battery is required, several different input/output conditions can occur. the output voltage may be held up while the input is either pulled to ground, pulled to some intermediate voltage, or is left open circuit. current ? ow back into the output will follow the curve shown in figure 4. the rise in reverse output current above 7v occurs from the breakdown of the 7v clamp on the adj pin. with a resistor divider on the regulator output, this current will be reduced depending on the size of the resistor divider. when the in pin of the lt3014 is forced below the out pin or the out pin is pulled above the in pin, input cur- rent will typically drop to less than 2a. this can happen if the input of the lt3014 is connected to a discharged (low voltage) battery and the output is held up by either a backup battery or a second regulator circuit. the state of the shdn pin will have no effect on the reverse output current when the output is pulled above the input. applications information figure 4. reverse output current output voltage (v) 0 reverse output current ( a) 5045 40 30 3525 20 15 10 50 8 3014 f04 2 13579 46 1 0 t j = 25 c v in = 0v v out = v adj current flowsinto output pin adj pin esd clamp downloaded from: http:///
lt3014 12 3014fd typical applications 5v buck converter with low current keep alive backup buck converter ef? ciency vs load current boost v in 6 210 12 d110mq060n r115.4k v out 5v1a/20ma 4 1514 11 c c 1nf for input voltages below 7.5v, some restrictions may apply increase l1 to 30 h for load currents above 0.6a and to 60 h above 1a 1, 8, 9, 16 lt1766 shdnsync sw bias fb v c gnd c20.33f c1100f 10v solid tantalum l1 ? 15h d2 d1n914 r24.99k 3014 ta03 c34.7f 100v ceramic v in 5.5v* to 60v + adj 3.92m1.27m out in shdn lt3014 gnd operating current high low * ? load current (a) 0 efficiency (%) 80 90 100 1.00 3014 ta04 70 60 50 0.25 0.50 0.75 1.25 v in = 10v v in = 42v v out = 5v l = 68 h downloaded from: http:///
lt3014 13 3014fd typical applications lt3014 automotive application lt3014 telecom application constant brightness for indicator led over wide input voltage range + adj out in shdn lt3014 gnd on off 1f 1f v in 12v (later 42v) load: clock, security system etc + C adj out in shdn lt3014 gnd on off 1f 1f v in 48v (72v transient) load: system monitor etc no protection diode needed! no protection diode needed! 3014 ta05 backup battery r1r2 r1r2 in lt3014 shdn 1f return off on C48v out adj gnd 3014 ta06 1 f r set i led = 1.22v/r set C48v can vary from C3.3v to C80v downloaded from: http:///
lt3014 14 3014fd package description s5 package 5-lead plastic tsot-23 (reference ltc dwg # 05-08-1635) 1.50 C 1.75 (note 4) 2.80 bsc 0.30 C 0.45 typ 5 plcs (note 3) datum a 0.09 C 0.20 (note 3) s5 tsot-23 0302 rev b pin one 2.90 bsc (note 4) 0.95 bsc 1.90 bsc 0.80 C 0.90 1.00 max 0.01 C 0.10 0.20 bsc 0.30 C 0.50 ref note:1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.62 max 0.95 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref downloaded from: http:///
lt3014 15 3014fd information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description dd package 8-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1698) 3.00 0.10 (4 sides) note:1. drawing to be made a jedec package outline m0-229 variation of (weed-1) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on top and bottom of package 0.38 0.10 bottom viewexposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.115 typ 2.38 0.10 (2 sides) 1 4 8 5 pin 1 top mark (note 6) 0.200 ref 0.00 C 0.05 (dd) dfn 1203 0.25 0.05 2.38 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.15 0.05 0.50bsc 0.675 0.05 3.5 0.05 packageoutline 0.25 0.05 0.50 bsc downloaded from: http:///
lt3014 16 3014fd linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2005 lt 0808 rev d printed in usa related parts part number description comments lt1129 700ma, micropower, ldo v in : 4.2v to 30v, v out(min) = 3.75v, v do = 0.4v, i q = 50a, i sd = 16a, dd, sot-223, s8, to220, tssop-20 packages lt1175 500ma, micropower negative ldo v in : C20v to C4.3v, v out(min) = C3.8v, v do = 0.50v, i q = 45a, i sd = 10a, dd, sot-223, s8 packages lt1185 3a, negative ldo v in : C35v to C4.2v, v out(min) = C2.40v, v do = 0.80v, i q = 2.5ma, i sd <1a, to220-5 package lt1761 100ma, low noise micropower, ldo v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.30v, i q = 20a, i sd <1a, thinsot package lt1762 150ma, low noise micropower, ldo v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.30v, i q = 25a, i sd <1a, ms8 package lt1763 500ma, low noise micropower, ldo v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.30v, i q = 30a, i sd <1a, s8 package lt1764/lt1764a 3a, low noise, fast transient response, ldo v in : 2.7v to 20v, v out(min) = 1.21v, v do = 0.34v, i q = 1ma, i sd <1a, dd, to220 packages ltc1844 150ma, very low dropout ldo v in : 1.6v to 6.5v, v out(min) = 1.25v, v do = 0.08v, i q = 40a, i sd <1a, thinsot package lt1962 300ma, low noise micropower, ldo v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.27v, i q = 30a, i sd <1a, ms8 package lt1963/lt1963a 1.5a, low noise, fast transient response, ldo v in : 2.1v to 20v, v out(min) = 1.21v, v do = 0.34v, i q = 1ma, i sd <1a, dd, to220, sot packages lt1964 200ma, low noise micropower, negative ldo v in : C1.9v to C20v, v out(min) = C1.21v, v do = 0.34v, i q = 30a, i sd = 3a, thinsot package lt3010 50ma, 80v, low noise micropower, ldo v in : 3v to 80v, v out(min) = 1.28v, v do = 0.3v, i q = 30a, i sd <1a, ms8e package lt3020 100ma, low v in , low v out micropower, vldo v in : 0.9v to 10v, v out(min) = 0.20v, v do = 0.15v, i q = 120a, i sd <1a, dfn, ms8 packages lt3023 dual 100ma, low noise micropower, ldo v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.30v, i q = 40a, i sd <1a, dfn, ms10 packages lt3024 dual 100ma/500ma, low noise micropower, ldo v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.30v, i q = 60a, i sd <1a, dfn, tssop-16e packages lt3027 dual 100ma, low noise ldo with independent inputs v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.30v, i q = 40a, i sd <1a, dfn, ms10e packages lt3028 dual 100ma/500ma, low noise ldo with independent inputs v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.30v, i q = 60a, i sd <1a, dfn, tssop-16e packages downloaded from: http:///

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