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| ? semiconductor components industries, llc, 2013 february, 2013 ? rev. p0 1 publication order number: SCYW99143/d customer specific device from on semiconductor universal high voltage control block for smps controllers with extremely low stand-by power consumption product preview the SCYW99143 is an hv control circuit specifically designed for flyback and other smps controllers for applications with extremely low no ? load consumption. the internal startup current source supplies the SCYW99143 die and slaved smps controller during start ? up. this function greatly simplifies the design of the auxiliary supply. the built ? in brown ? out protection with x2 capacitor discharger allow for omitting inefficient resistor networks which usage would result in unacceptable standby power consumption increase. an off ? mode allows reaching extremely low no ? load input power consumption by turning whole device off and thus minimizing the power consumption of the control circuitry. features ? high voltage start up ? internal brown ? out protection ? buffered brown ? out divider output available ? automatic and lossless x2 capacitor discharge function ? remote input for standby operation control ? active on or off off ? mode options ? auto ? recovery timer ? open collector switch for disabling slave smps controller ? up to 28 ? v v cc operation ? extremely low no ? load standby power ? latched short ? circuit protection (only for co ? package option) ? internal thermal shutdown with hysteresis ? this is a pb ? free device typical applications ? flyback and other smps converters with extremely low stand ? by power consumption pad connections this document contains information on a product under development. on semiconductor reserves the right to change or discontinue this product without notice. this document, and the information contained herein, is confidential and proprietary and the property of semiconductor components industries, llc., dba on semiconductor. it shall not be used, published, disclosed or disseminated outside of the company, in whole or in part, without the written permission of on semiconductor. reverse engineering of any or all of the information contained herein is strictly prohibited. 2012, scillc. all rights reserved. this document contains information on a product under development. on semiconductor reserves the right to change or discontinue this product without notice. SCYW99143
SCYW99143 confidential and proprietary not for public release http://onsemi.com 2 figure 1. typical application example (active on) figure 2. typical application example (active off) SCYW99143 confidential and proprietary not for public release http://onsemi.com 3 table 1. pad connections pad no. pad name function pad description 1 x2 x2 discharge sense input detects ac line presence and activates x2 discharge circuitry with certain delay when the application is unplugged from the mains. 2 rem remote input initiates ultra low consumption mode (off ? mode) when cross v_rem_off. 3 disable open collector open collector to grounding fb pin to disable the second controller 4 vcc_stop vcc start input for communication between two ics voltage input to detect that second controller reaches vcc (on) threshold 5 bo_buff brown out divider output output signal of integrated brown out sensing network 6 gnd ? the hv controller ground. 7 latch latch input for communication between two ics or outside latch condition the SCYW99143 can be latched ? off via this input when used as a standalone ic or for latch signal from second controller (inter ? bonding connection) to detect transition to latch ? off mode.. 8 v cc supplies the controller this pin is connected to an external auxiliary voltage and supplies the controller. 10 hv hv startup input connects internal hv startup current source to rectified ac input line. allows for lossless brown out detection. discharges x2 capa- citor(s) when application is unplugged from the mains. figure 3. internal circuit architecture (active on) SCYW99143 confidential and proprietary not for public release http://onsemi.com 4 figure 4. internal circuit architecture (active off) table 2. maximum ratings symbol rating value unit v cc power supply voltage, v cc pad, continuous voltage ? 0.3 to 28 v v pad_x voltage on all pads (except pads 8 and 10) ? 0.3 to 10 v v_rem_active off voltage on all pins / pads 2 for active off version ? 0.3 to 5 v v_hv high voltage pad (pad 10) ? 0.3 to 500 v r j ? a thermal resistance junction ? to ? air (50 mm 2 x 35 m cu) 211 c/w t j,max maximum junction temperature 150 c storage temperature range ? 60 to +150 c esd capability, hbm model, all pins 2 kv esd capability, machine model 200 v stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. this device series contains esd protection and exceeds the following tests: human body model 2000 v per jedec standard jesd22, method a114e machine model method 200 v per jedec standard jesd22, method a115a 2. this device contains latch ? up protection and exceeds 100 ma per jedec standard jesd78. SCYW99143 confidential and proprietary not for public release http://onsemi.com 5 table 3. electrical characteristics (for typical values t j = 25 c, for min/max values t j = ? 40 c to +125 c, max t j = 150 c, v cc = 12 v unless otherwise noted) symbol rating pad option min typ max unit hv startup current source vhv_min minimum voltage for current source operation (vcc = 4 v) 10 ? ? 30 60 v istart1 current flowing out of vcc pin (vcc = 0 v) 10, 8 ? 0.2 0.5 0.8 ma istart2 current flowing out of vcc pin (vcc = vcc_on ? 0.5 v) 10, 8 ? 6 10 15 ma istart_off off ? state leakage current (vhv = 500 v, vcc < vcc_on, v_rem = 0 v) 10 ? ? 15 ? a ihv_off_mode_1 hv pin current when off ? mode is active (vhv = 141 v, vcc = 0 v) 10 ? ? ? 15 a ihv_off_mode_2 hv pin current when off ? mode is active (vhv = 325 v, vcc = 0 v) 10 ? ? ? 19 a vhv_min_off ? mode minimum voltage on hv pin during off ? mode (vrem = 10 v, vcc = 0 v) 10 ? ? ? 10 v supply section vcc_on vcc increasing level at which disable switch is deactivated (note 3) 8 vo1 19.5 22 24.5 v vo2 16.4 18 19.7 vo3 12.8 14 15.3 vcc_off v cc decreasing level at which the disable switch is activated (note 3) 8 vf1 10.4 11 12.1 v v vf2 9.9 10.5 11.6 vf3 9.5 10 11 vf4 9 9.5 10.5 vf5 8.5 9 10 vf6 8 8.5 9.4 vf7 7.6 8 8.8 vf8 7.1 7.5 8.3 vf9 6.6 7 7.7 vcc_hyst hysteresis vcc on ? vcc off 8 ? 0.1 ? ? v vcc_bias vcc level during latch and auto ? recover modes 8 ? 4.7 5.5 6.3 v vcc_inhibit vcc level for istart1 to istart2 transition 8 ? 0.5 1 1.25 v icc internal ic consumption during on ? mode 8 ? ? 0.2 0.4 ma brown ? out v_bo_on brown ? out turn ? on threshold (vhv going up) (vcc = vcc_bias) (note 3) 10 bo1 92 101 110 v bo2 102 111 120 bo3 104 112 120 v_bo_off brown ? out turn ? off threshold (vhv going down) (note 3) 10 bf1 84 93 102 v bf2 94 103 112 bf3 97 105 113 bo_timer timer duration for line cycle drop ? out (note 3) 10 ? 43 ? 86 ms 3. possible modification by metal option. 4. if this signal is not connected, the function is not activated. 5. minimum load impedance connected to bo_buff pin is 1 m parallel with 1 nf. 6. guaranteed by design. SCYW99143 confidential and proprietary not for public release http://onsemi.com 6 table 3. electrical characteristics (for typical values t j = 25 c, for min/max values t j = ? 40 c to +125 c, max t j = 150 c, v cc = 12 v unless otherwise noted) symbol unit max typ min option pad rating x2 discharge circuitry vth_x2 x2 timer disable switch threshold voltage 1 ? 1 1.5 2 v vth_x2_hyst hysteresis on the x2 pin (note 6) 1 ? 100 ? mv v_x2_clamp x2 input clamp voltage (i_x2_leak = 1 a) 1 ? ? 4 ? v x2_timer x2 timer duration (note 3) 1 x1 70 ? 140 ms x2 35 ? 65 x3 17 ? 33 i_x2_leak x2 input leakage current (v_x2 = 2.5 v) 1 ? ? ? 0.3 a i_x2_dis maximum discharge switch current (vcc = 10 v) 10 ? 6 10 13 ma i_vcc_dis vcc cap discharge switch resistance (vcc = 10 v) 1 ? 6 10 13 ma remote input active on v_rem_on remote pin voltage below which is the off ? mode deactivated (v_rem going down) (vcc = 0 v) 2 ? 1 1.5 2 v v_rem_off remote pin voltage above which is the off ? mode activated (v_rem going up) (note 3) 2 vr1 7.2 8 8.8 v vr2 5.4 6 6.6 rem_timer remote timer duration (note 3) 2 rt1 140 ? 260 ms ms rt2 70 ? 140 rt3 35 ? 65 rt4 17 ? 33 r_sw_rem internal remote pull down switch resistance (v_rem = 8 v) 2 ? 1000 ? 3000 i_rem_leak remote input leakage current (v_rem = 9 v, note 6) 2 ? ? 0.02 1 a remote input active off v_rem_on remote pin voltage above which is the off ? mode deactivated (v_rem going up) (vcc = 0 v) 2 ? 1.5 2 2.5 v v_rem_off remote pin voltage below which is the off ? mode activated (v_rem going down) (note 3) 2 vr3 0.18 0.2 0.22 v v vr4 0.27 0.3 0.33 vr5 0.36 0.4 0.44 i_rem_leak remote input leakage current (v_rem = 5 v, note 6) 2 ? ? 0.02 1 a i_rem_bias pull ? up bias current which biased rem pin during off ? mode 2 ? ? 2.4 5 a internal communication for co ? package option latch_input_on voltage level to start latch ? off mode (note 4) 7 ? 1.53 1.8 2.07 v vcc_stop_on voltage level for detect that vcc is higher than secondary controller?s vcc (on) (note 4) 4 ? 1.53 1.8 2.07 v pull_up_current pull ? up current when vcc_stop_on or latch_input_on signals are connected to open drain switch 4, 7 ? 3 4 6 a pull_down_current pull ? down current when vcc_stop_on or latch_input_on signals are connected to logic signal 4, 7 ? 2 4 6 a r_bo_buff internal series resistance on bo_buff (note 6) 5 ? ? 10 ? k 3. possible modification by metal option. 4. if this signal is not connected, the function is not activated. 5. minimum load impedance connected to bo_buff pin is 1 m parallel with 1 nf. 6. guaranteed by design. SCYW99143 confidential and proprietary not for public release http://onsemi.com 7 table 3. electrical characteristics (for typical values t j = 25 c, for min/max values t j = ? 40 c to +125 c, max t j = 150 c, v cc = 12 v unless otherwise noted) symbol unit max typ min option pad rating internal communication for co ? package option vbo_buff_ratio1 ratio between voltage on hv and voltage on bo_buff (v_bo_on (typ) = 101 v) (note 5) 10, 5 ? ? 112:1 ? ? vbo_buff_ratio2 ratio between voltage on hv and voltage on bo_buff (v_bo_on (typ) = 111 v) (note 5) 10, 5 ? ? 123:1 ? ? vbo_buff_ratio3 ratio between voltage on hv and voltage on bo_buff (v_bo_on (typ) = 112 v) (note 5) 10, 5 ? ? 124:1 ? ? disable switch output r_sw_disable internal disable pull down switch resistance (idisable = 500 a) 3 ? ? 250 500 latch input (when pinned out) vlatch voltage threshold above which the SCYW99143 enters latch ? off mode 7 ? 1.53 1.8 2.07 v protections t a ? rec_timer auto ? recovery timer duration (note 3) ? at1 0.7 ? ? s ? at2 1.4 ? ? t a ? rec_timer_max maximum timer duration (note 6) ? ? ? ? 3.8 s temperature shutdown t tsd temperature shutdown (note 3) ? t1 ? 150 ? c ? t2 ? 140 ? ? t3 ? 130 ? t tsd(hys) temperature shutdown hysteresis ? ? ? 30 ? c 3. possible modification by metal option. 4. if this signal is not connected, the function is not activated. 5. minimum load impedance connected to bo_buff pin is 1 m parallel with 1 nf. 6. guaranteed by design. SCYW99143 confidential and proprietary not for public release http://onsemi.com 8 table 4. function options option internal bo active on active off input signal for vcc start on input signal for latch input on assembly a yes yes no logic logic co ? package b yes yes no logic open drain co ? package c yes yes no open drain open drain co ? package d yes yes no open drain logic co ? package e yes no yes logic logic co ? package f yes no yes logic open drain co ? package g yes no yes open drain open drain co ? package h yes no yes open drain logic co ? package i no yes no logic logic co ? package j no yes no logic open drain co ? package k no yes no open drain open drain co ? package l no yes no open drain logic co ? package m no no yes logic logic co ? package n no no yes logic open drain co ? package o no no yes open drain open drain co ? package p no no yes open drain logic co ? package q yes yes no ? ? standalone r yes no yes ? ? standalone device code: SCYW99143 fvoxvfxboxbfxxxvrxrtxatxtx where: f ? function option (a ? r) xx ? x2_timer (x1 ? x3) vox ? vcc_on (vo1 ? vo3) vrx ? v_rem_off ? active on version (vr1, vr2), active off version (vr3 ? vr5) vfx ? vcc_off (vf1 ? vf9) rtx ? rem_timer (rt1 ? rt5) box ? vbo_on (bo1 ? bo3) atx ? tautorec (at1 ? at2) bfx ? vbo_off (bf1 ? bf3) tx ? tsd (t1 ? t3) SCYW99143 confidential and proprietary not for public release http://onsemi.com 9 typical characteristics figure 5. minimum current source operation, vhv_min figure 6. high voltage startup current flowing out of vcc pin, istart1 temperature ( c) temperature ( c) 100 75 125 50 25 0 ? 25 ? 50 17 18 19 20 21 22 23 100 75 125 50 25 0 ? 25 ? 50 0.50 0.55 0.60 0.65 figure 7. high voltage startup current flowing out of vcc pin, istart2 figure 8. off ? state leakage current, istart_off temperature ( c) temperature ( c) 100 75 50 125 25 0 ? 25 ? 50 9.5 10.0 10.5 11.0 11.5 12.0 12.5 100 75 125 50 25 0 ? 25 ? 50 6.5 6.7 6.9 7.1 7.3 7.5 figure 9. hv pin current during off ? mode, ihv_off_mode_1 figure 10. vcc increasing level at which disable switch is deactivated, vcc_on (option vo1) temperature ( c) temperature ( c) 8.5 8.7 8.9 9.1 9.3 9.5 21.0 21.5 22.0 22.5 23.0 vhv_min (v) istart1 (ma) istart2 (ma) istart_off ( a) ihv_off_mode_1 ( a) vcc_on (vo1) (v) 100 75 125 50 25 0 ? 25 ? 50 100 75 125 50 25 0 ? 25 ? 50 SCYW99143 confidential and proprietary not for public release http://onsemi.com 10 typical characteristics figure 11. vcc decreasing level at which the disable switch is activated, vcc_off (option vf3) figure 12. vcc hysteresis, vcc_hyst temperature ( c) temperature ( c) 9.0 9.5 10.0 10.5 11.0 11.0 11.5 12.0 12.5 13.0 figure 13. vcc level at fault modes, vcc_bias figure 14. vcc level for istart1 to istart2 transition, vcc_inhibit temperature ( c) temperature ( c) 100 75 50 125 25 0 ? 25 ? 50 5.2 5.3 5.4 5.5 5.7 5.8 5.9 6.0 0.7 0.8 0.9 1.0 1.1 1.2 figure 15. internal ic consumption during on ? mode, icc figure 16. brown ? out turn ? on threshold, v_bo_on (option bo1) temperature ( c) temperature ( c) 0.18 0.19 0.20 0.21 0.22 0.24 0.25 0.26 100.0 100.5 101.0 101.5 102.0 102.5 103.0 103.5 vcc_off (vf3) (v) vcc_hyst (v) vcc_bias (v) vcc_inhibit (v) icc (ma) v_bo_on (bo1) (v) 100 75 125 50 25 0 ? 25 ? 50 100 75 125 50 25 0 ? 25 ? 50 5.6 100 75 125 50 25 0 ? 25 ? 50 100 75 50 125 25 0 ? 25 ? 50 0.23 100 75 50 125 25 0 ? 25 ? 50 SCYW99143 confidential and proprietary not for public release http://onsemi.com 11 typical characteristics figure 17. brown ? out turn ? off threshold, v_bo_off (option bf1) figure 18. timer duration for line cycle drop ? out, bo_timer temperature ( c) temperature ( c) 91.5 92.0 92.5 93.0 93.5 94.0 54 55 56 57 58 59 60 61 figure 19. x2 timer disable switch threshold, vth_x2 figure 20. hysteresis on the x2 pin, vth_x2_hyst temperature ( c) temperature ( c) 1.0 1.2 1.4 1.6 1.8 2.0 100 120 140 160 180 200 figure 21. x2 input clamp voltage, v_x2_clamp figure 22. x2 timer duration, x2_timer temperature ( c) temperature ( c) 3.0 3.5 4.0 4.5 5.0 82 84 86 88 90 v_bo_off (bf1) (v) bo_timer (ms) vth_x2 (v) vth_x2_hyst (mv) v_x2_clamp (v) x2_timer (x1) (ms) 100 75 125 50 25 0 ? 25 ? 50 100 75 125 50 25 0 ? 25 ? 50 100 75 125 50 25 0 ? 25 ? 50 100 75 50 125 25 0 ? 25 ? 50 100 75 125 50 25 0 ? 25 ? 50 100 75 125 50 25 0 ? 25 ? 50 SCYW99143 confidential and proprietary not for public release http://onsemi.com 12 typical characteristics figure 23. x2 input leakage current, i_x2_leak figure 24. maximum x2 cap discharge current, i_x2_dis temperature ( c) temperature ( c) 0 0.05 0.10 0.15 0.20 8.5 9.0 9.5 10.0 10.5 figure 25. maximum vcc cap discharge current, i_vcc_dis figure 26. off ? mode turn ? off threshold, v_rem_on temperature ( c) temperature ( c) 8.5 9.0 9.5 10.0 10.5 1.0 1.2 1.4 1.6 1.8 figure 27. off ? mode turn ? on threshold, v_rem_off (option vr1) figure 28. remote timer duration, rem_timer (option rt2) temperature ( c) temperature ( c) 7.5 7.7 7.9 8.1 8.3 8.5 82 84 86 88 90 i_x2_leak ( a) i_x2_dis (ma) i_vcc_dis (ma) v_rem_on (v) v_rem_off (vr1) (v) rem_timer (rt2) (ms) 100 75 125 50 25 0 ? 25 ? 50 100 75 125 50 25 0 ? 25 ? 50 100 75 125 50 25 0 ? 25 ? 50 100 75 125 50 25 0 ? 25 ? 50 100 75 125 50 25 0 ? 25 ? 50 100 75 125 50 25 0 ? 25 ? 50 SCYW99143 confidential and proprietary not for public release http://onsemi.com 13 typical characteristics figure 29. internal remote pull down switch resistance, r_sw_rem figure 30. remote input leakage current, i_rem_leak temperature ( c) temperature ( c) 2000 2200 2400 2600 2800 0 0.05 0.10 0.15 0.20 figure 31. voltage level to start latch ? off mode, latch_input_on figure 32. voltage level to stop hv current source, vcc_stop_on temperature ( c) temperature ( c) 1.6 1.7 1.8 1.9 2.0 1.6 1.7 1.8 1.9 2.0 figure 33. pull ? up current for open ? drain inter ? bonding signals, pull_up_current figure 34. pull ? down current for logic inter ? bonding signals, pull_down_current temperature ( c) temperature ( c) 3.0 3.5 4.0 4.5 5.0 5.5 3.0 3.5 4.0 4.5 5.0 r_sw_rem ( ) i_rem_leak ( a) latch_input_on (v) vcc_stop_on (v) pull_up_current ( a) pull_down_current ( a) 100 75 125 50 25 0 ? 25 ? 50 100 75 125 50 25 0 ? 25 ? 50 100 75 125 50 25 0 ? 25 ? 50 100 75 125 50 25 0 ? 25 ? 50 100 75 125 50 25 0 ? 25 ? 50 100 75 125 50 25 0 ? 25 ? 50 SCYW99143 confidential and proprietary not for public release http://onsemi.com 14 typical characteristics figure 35. internal disable pull down switch resistance, r_sw_disable figure 36. auto ? recovery timer duration, t a ? rec_timer temperature ( c) temperature ( c) 70 90 110 130 150 170 0.80 0.85 0.90 0.95 1.00 r_sw_disable ( ) ta_rec_timer (at1) (s) 100 75 125 50 25 0 ? 25 ? 50 100 75 125 50 25 0 ? 25 ? 50 SCYW99143 confidential and proprietary not for public release http://onsemi.com 15 introduction this device is specifically designed for smps applications targeting ultra ? low no ? load power consumption. SCYW99143 die implements an hv startup current source with x2 discharge circuitry and brown ? out protection. ? hv startup current source: reaching a low no ? load standby power always represents a difficult exercise when standard resistor startup network is used. thanks to its proprietary technology, the SCYW99143 implements hv startup current source that provides fast and reliable startup sequence while cuts ? off power consumption when application operates under light load and especially no?load conditions. ? x2 capacitor discharge circuitry: the x2 capacitor(s) charge could result in electric shock to smps user if not discharged after application is unplugged from the mains. thus, according to international standards, it is mandatory to discharge x2 capacitor(s) in given time to pass safety qualification. built ? in x2 discharger in dap029 controller together with external x2 sensing network provides reliable and loss ? less discharge function when application is unplugged under any operating conditions. ? internal brown ? out pr otection: brow ? out (bo) protection is required in adapter applications to guarantee that the application won?t be operated under too low input voltage. internal high impedance brow ? out sensing network consumes minimum power from hv input and provides excellent noise and pcb leakage currents immunity compare to standard external bo networks composed from high resistance smt chip resistors. ? auto recovery uvp on vcc: it is sometimes interesting to implement a circuit protection by sensing the vcc level. this is what SCYW99143 provides by monitoring its vcc pin. when the voltage on this pin drops under vcc (off) threshold, the disable pin is immediately activated and the part enters hiccup mode. when the auto ? recovery timer elapses SCYW99143 repeats start ? up sequence. ? off ? mode: off ? mode helps to achieve low power consumption of an smps during no load conditions. the SCYW99143 goes into off ? mode when the rem pin is brought higher than the internal reference voltage v ? rem ? off (active_on version). similarly, for active_off version, the SCYW99143 enters off mode operation when the rem pin is brought below reference voltage v ? rem ? off . the disable input is pulled low, vcc capacitor is discharged and consumption of all internal blocks is reduced once the off ? mode is activated. off mode is terminated when remote pin voltage crosses v ? rem ? on threshold or application is unplugged from the mains. brown ? out circuitry the SCYW99143 features, on its hv pin, a true ac line monitoring circuitry ? refer to figure 37. this system includes a minimum start ? up threshold and auto ? recovery brown ? out protection; both of them independent of the input voltage ripple. the thresholds are fixed, but they are designed to fit most of the standard ac ? dc converter applications. when the hv pin voltage drops below vbo_off threshold for longer time than bo_timer , the brown ? out condition is detected and confirmed. thus the controller stops operation ? refer to figure 38. the hv current source maintains v cc at v cc _bias level until the input voltage is back above vbo_on . the controller then discharges vcc capacitor first to restart internal logic. standard startup attempt is then placed by the controller. refer to controller operation sequencing sections ? case 2 for better understanding on how the SCYW99143 bo protection operates. figure 37. simplified block diagram of brown ? out detection circuitry SCYW99143 confidential and proprietary not for public release http://onsemi.com 16 figure 38. brown ? out event detection the internal hv bo sensing network is formed by high impedance resistor divider with minimum resistance of 20 m . this solution reducing power losses during off ? mode and thus helps to pass maximum standby power consumption limit. the internal bo network solution provides excellent noise and pcb leakage currents immunity that is hard to achieve when using external resistor divider built from smt chip resistors. the internal hv bo sensing network output is connected to the bo_buff bonding pad. this is buffered and trimmed output of the hv divider. the purpose of this pad is to be used in co ? package solution with low voltage smps controller to provide voltage from hv pad into slave (low voltage) controller. the ratio between voltage on hv pad and voltage on bo_buff pad is defined by vbo_buff_ratio parameter. x2 discharge circuitry the SCYW99143 x2 discharge circuitry uses dedicated pin (x2) together with external charge pump sensing network to detect whether is application plugged into the mains or not. advantage of this solution is that the internal ic consumption can be reduced to extremely low level by keeping all internal blocks unbiased except simple and low consuming x2 timer disable circuitry. the internal x2 timer with duration of x2_timer is used to overcome unwanted activation of the x2 and vcc discharge switches in case of ac line dropout. the internal x2 and vcc discharge switches are activated once the x2 timer elapses. the hv startup current source is enabled in the same time thus the discharge path for x2 capacitor exists ? refer to figure 39. figure 39. simplified block diagram of x2 capacitor discharge circuitry the time duration of x2 capacitors discharging could be calculated by: t u c x1.2 i _x2_dis c x1,2 (eq. 1) SCYW99143 confidential and proprietary not for public release http://onsemi.com 17 the x2 capacitor discharging process can be interrupted by increasing voltage on x2 pin back above vth_x2 . the over temperature protection block is active during discharging process to protect controller chip against unwanted overheat that could occur in case the x2 pin is opened and the high voltage is present on the hv pin (like during open ? short pins testing for instance). the x2 discharge switch is also activated to discharge vcc capacitor when entering into fault mode (latch mode, auto ? recovery mode or the hv pin voltage drops below vbo_off threshold for more than 50 ms), off ? mode and also before controller vcc restart. refer to controller operation sequencing section ? cases 1 ? 5 for better understanding on how the SCYW99143 x2 discharge circuitry works. remote input the SCYW99143 features dedicated input (remote pin) that allows user to activate ultra low consumption mode during which the ic consumption is reduced to only very low hv pin leakage current (refer to ihv_off ? mode_1 and ihv_off_ mode_2 parameters). the off ? mode is activated when remote pin voltage exceeds v_rem_off threshold (8 v typically for active_on version) or drops under v_rem_off threshold (0.4 v typically for active _off version). normal operating mode (i.e. on ? mode) is then initiated again when remote input voltage crosses back v_rem_on threshold (1.5 v typically active_on version and 2 v typically active_off version) ? refer to figure 40 or figure 41 for better understanding. active on off ? mode the off ? mode with active on logic works in such a way that the off ? mode is activated when the remote input is pulled up by auxiliary remote supply (refer to figure 40.). the normal operation mode is then activated when dedicated opto ? coupler pulls the remote input down. there could occur situation, in the application, that the auxiliary remote supply stays charged while the secondary bias has been lost. the application then cannot restart until the auxiliary remote supply capacitor fully discharges. thus the remote input hosts internal pull down switch and remote timer with duration rem_timer . the controller pulls down remote pin using this circuitry in order to allow correct application restart in case the auxiliary bias capacitor (c7) stays charged while the secondary side is fully discharged already. the remote timer is activated each time the application starts after these events: ? start after application was plugged into the mains (x2 discharger signal resets remote timer latch in this case) ? restart from fault conditions in auto ? recovery versions ? restart after vcc has been lost while remote pin was at low state ? restart after bo event ? restart after otp event figure 40. simplified block diagram of remote control input for active on off ? mode the remote timer helps to assure correct application start or re ? start from fault conditions by forcing controller operation for rem_timer duration. however, the secondary controller drives remote pin via opto ? coupler during normal operating conditions in order to switch between on ? mode and off ? mode states. the on ? mode is activated for very short time during no ? load conditions ? just to re ? fill primary and secondary capacitors to keep application biased. the remote timer thus cannot be used in this case because it would increase no ? load power consumption by forcing application on ? mode operation for longer time than it is naturally needed. the remote timer with internal pull down switch is thus not activated in this case (i.e. when application restarts from off ? mode operation). refer to controller operation sequencing section ? cases 1 ? 5 for better understanding on how the SCYW99143 remote circuitry works. SCYW99143 confidential and proprietary not for public release http://onsemi.com 18 active off off ? mode the remote input is designed for direct connection to fb pin of a flyback controller. the voltage on remote pin follows fb pin voltage except during off ? mode. the fb pin is not biased in off ? mode because vcc is disabled by SCYW99143. the internal current source of (2.5 a typically) then pulls ? up the remote when fb optocoupler instructs the primary side to restart normal operation. the feedback pin of the flyback controller thus has to feature protection against reverse current from fb to vcc pins. the easiest way how to overcome this reverse current is to use a diode in fb pin. connection between remote and fb pins with simplified block diagram of remote control input are shown in figure 41. the off mode is activated when the remote pin is low and vcc _off threshold is crossed i.e. when the skip mode takes so long time that vcc is lost. vcc capacitor is then discharged by internal consumption of the SCYW99143 and consumption of slave smps controller in skip mode. maximum skip mode duration before the SCYW99143 enters off ? mode is thus given by value of vcc capacitor, total consumption during skip mode and voltage level on vcc capacitor in the time when flyback controller enters skip mode. the remote pin information is ignored in the case the fb pin is pulled down by SCYW99143 itself (i.e. like during bo event or vcc fault cases) ? refer to next paragraph ?disable input?. figure 41. simplified block diagram of remote control input for active off off ? mode refer to controller operation sequencing section ? cases 1 ? 5 for better understanding on how the SCYW99143 remote circuitry works. disable switch output the SCYW99143 features internal open drain mosfet switch that is connected to the disable pin/pad. this pad can be used to pull down fb pin of the slave smps controller in order to stop its operation immediately by activating skip mode. more specifically ? this function is used for fast disabling of smps controller driver in these cases: remote mode (only active on option), auto ? recovery mode, latch ? off mode, after x2 discharge condition is confirmed, bo event and during every new start ? up sequence. all these cases can be represent by one ?/pwm_on? signal (refer to figure 42). figure 42. simplified block diagram of disable switch output SCYW99143 confidential and proprietary not for public release http://onsemi.com 19 auto ? recovery uvp on vcc the controller activates auto ? recovery timer with duration t a ? rec_timer in case the vcc drops below vcc_off level. the vcc capacitor is discharged down to vcc_bias level when auto ? recovery timer starts counting. the vcc is maintained at vcc_bias level (5 v) during this operation to keep the timer and other internal circuitry running. the vcc capacitor is fully discharged by x2 discharge switch before controller tries for restart from fault condition. the restart from fault condition occurs when auto ? recovery timer elapses or if vcc is forced below 4 v externally. internal communication between two controllers at co ? package option co ? package option can bring some benefits. SCYW99143 can obtain information about vcc_on of slave controller, and information about slave controller transition to latch ? off mode. vcc_on detection the SCYW99143 features vcc_stop bonding pad/input that can be used to terminate startup current source operation prior the regular vcc_on threshold (22 v typically) is reached. this feature reduces startup time in case the slave smps controller provides vcc_stop signal based on its own vcc_on threshold (like 18 v in ncp1250 case). difference between start up sequences with and without vcc_stop bonding interconnection can be seen in figure 43 . vcc_stop comparator is enabled only during start ? up sequence ? i.e. vcc capacitor is charged from vcc_off level to vcc_on level. figure 43. start ? up sequence without and with vcc_start signal interconnection latch detection the SCYW99143 latch pad can be used to latch the hv startup block off in case of serious fail in smps. the internal latch signal from slave smps controller has to be provided to SCYW99143 in case of co ? packaged solution. when the slave controller latches ? off without inter ? bonding latch information, the SCYW99143 detects only that vcc was lost because of missing driver pulses i.e. no power from auxiliary winding. the SCYW99143 goes then into auto ? recovery mode and restarts operation after t a ? rec_timer by a new start ? up sequence refer to figure 49. if the slave controller latches ? off and inter ? bonding latch information is provided, the SCYW99143 goes into latch ? off mode refer to figure 50. latch ? off mode continues until the mains is unplugged ? the x2 discharge is confirmed and activated or vcc is forced below 4 v externally. the inter ? bonding latch signal does not have to be present for the time the controller is latched ? the SCYW99143 internal logic triggers on rise edge of this signal only. more details are showed on figure 44. latch comparator is enabled only during regular operation ? i.e. when vcc level is between vcc_on and vcc_off levels. SCYW99143 confidential and proprietary not for public release http://onsemi.com 20 figure 44. internal latch signal communication bonding diagram the bonding diagram of SCYW99143 can be seen in figure 45. pads 1, 2, 3, 5 and 7 can be swapped each other (using different metal masks options) to allow co ? package with many smsp controllers with different pinout. disable switch output could be connected only on pads 3 and 4. pads 6, 8, and 10, are fixed and cannot be swapped! figure 45. bonding diagram for co ? package option tsd protection the SCYW99143 includes a temperature shutdown protection. when the temperature rises above the high threshold during stable operation ? i.e. start ? up sequence is ended and vcc is between vcc_on and vcc_off levels, the controller immediately actives disable switch to stop slave controller. after the temperature falls back below the lower threshold, the vcc capacitor is fully discharged by vcc discharge switch to restart both ? SCYW99143 and slave controllers. the tsd protection can be activated at some other cases (charging vcc capacitor ? start ? up sequence and discharging x2 or vcc capacitors). the tsd protection only interrupts current operating sequence ? i.e. the operation sequence continue after the temperature falls back below the low threshold. the SCYW99143 is not reset by tsd activation in these cases. controller operation sequencing below paragraphs describe controller operation sequencing under several typical cases for active on and active off version that can occur in the application as well as transitions between them. refer also to the detail status diagrams for the off ? mode versions (figure 56 and figure 57). active on version 1. application start, remote off/on then ac line off ? figure 46: application has been plugged into the mains at point a . the hv pin receives rectified ac line voltage and the x2 sense pin charges up via external charge pump sensing circuitry. as the high voltage is present on the hv pin the startup current source is activated to charge vcc capacitor to vcc_bias . the bo block bias is enabled at this point (point b) . the vcc_bias is maintained until the controller receives bo ? ok information from the bo block. when line voltage is high enough to enable application operation the startup current source continues to ramp up the vcc voltage (point c ) up to vcc_on threshold (point d ) where pwm block operation is enabled (pwm_on signal). the remote timer and internal remote pin pull down switch are activated in the same time (point e ) to mask the external remote pin information and thus assure the application start even if the remote pin bias remains from previous operation. the remote opto ? coupler is then activated by secondary side controller to keep converter standard operation under any load conditions (e.g. standard pwm operation, frequency foldback or skip mode). the remote opto ? coupler has been turned ? off by the secondary controller at point f to activate the off ? mode operation. the voltage on remote pin thus grows above v_rem_off threshold. controller stops pwm operation immediately by pulling down the fb pin via internal switch. the vcc capacitor is then internally discharged to 5 v and all blocks are disabled to reduce ic consumption to minimum needed level. the vcc pin remains unbiased during whole off ? mode operation. the x2 discharge and remote internal blocks remain biased by the hv leakage current istart_off (hv current source is off) ? consuming minimum power but still keeping them operated. the remote opto ? coupler has been turned ? on by the secondary controller at point g to activate normal operation SCYW99143 confidential and proprietary not for public release http://onsemi.com 21 mode. the voltage on remote pin thus drops fast below v_rem_on threshold. vcc is fully discharged and the controller enables the hv startup current source to built vcc bias up again. the bo block bias is enabled at point h . this vcc_bias level (5 v) is maintained until the controller receives bo_ok information from the bo block. if the line voltage is high enough to enable operation the startup current source continues to ramp up vcc voltage (point i ) up to vcc_on threshold (point j ) where controller pwm is enabled (pwm_on signal). the remote timer is now not activated like during first start because there was line voltage present all the time during off ? mode operation (the remote timer latch is reset by x2 discharge signal). application then operates normally under any load conditions (e.g. standard pwm operation, frequency foldback or skip mode). application has been unplugged from the mains at point k . let us consider the light load operation mode during this event as a worst case for x2 capacitor discharging process. the x2 capacitor stays charged on its actual voltage level (line peak voltage in worst case). the x2 capacitor provides dc bias to hv pin. the x2 sense input voltage starts to drop in the same time because there is no ac voltage and charge pump cannot transfer any charge to x2 pin. the 100 ms x2 timer is activated when the x2 input voltage drops below internal x2 timer disable switch threshold voltage ( vth_x2 ) point l . after the x2 timer elapses (point m ), the pwm block operation is disabled by pulling down the fb pin via internal fb switch and the discharge switches (x2 and vcc) are activated and x2 capacitor discharges via hv startup current source until the x2 capacitor voltage drops to safe level and internal bias is lost. the over temperature protection is active during discharging process to overcome hv startup damage that would occur otherwise under fault cases ? like when x2 pin is not connected. 2. application start, ac line dropout, low line off, bo restart, ac line off ? figure 47: application operation from point a to point f is the same like in 1 st case described above. the line dropout occurs at point f . bo timer starts to count down and x2 pin voltage drops below threshold voltage of internal x2 disable switch ? thus also x2 timer is initiated. the line however recovers before the bo and x2 timer periods elapsed and vcc has been lost. application operation is thus is not interrupted. the energy for power stage operation is provided by bulk capacitor during dropout period in this case. the line voltage drops below v_bo_off threshold at point g . the bo timer is initiated and elapses after 50 ms thus the pwm block operation is disabled by pulling down the fb pin via internal fb switch. the vcc capacitor is discharged by vcc discharge switch to vcc_bias level. the vcc is then maintained at vcc_bias level by hv startup current source to keep bo block operation (vhv > 60 v). the line voltage increases above v_bo_on threshold at point i . the bo_ok signal is received (point j ) and internal vcc discharge switch is activated to fully discharge vcc capacitor and thus restart whole circuit. the hv startup current source is activated after discharge and ramps ? up the vcc voltage to vcc_bias (5 v) level. the bo block is activated at point k and correct line voltage is confirmed at point l thus the hv startup current source continues to ramp ? up the vcc voltage up to vcc_on threshold where is the pwm block operation enabled (point m ). the remote pin is pulled down by internal switch to assure correct application restart even if the external bias remains on the remote pin. application then operates normally under any load conditions (e.g. standard pwm operation, frequency foldback or skip mode). user unplugged power supply from the mains at point n . the x2 discharge process takes place after 100 ms similarly as in case 1. 3. off ? mode operation ? restart by primary remote discharge then ac line off ? figure 48: the secondary controller turns ? off the remote opto ? coupler and off ? mode is initiated at point a . the auxiliary voltage on remote input discharges very slowly during off ? mode. if the off ? mode is active for too long time the remote pin bias voltage will disappear. thus the remote pin voltage crosses v_rem_on threshold at point b . vcc capacitor is fully discharged and the hv startup current source is activated to build vcc bias for bo block (point c ). once the bo_ok information is received (point d ) the hv startup current source ramps up to vcc_on level (point e ). pwm block operation is enabled and remote pin bias voltage thus grows. the pwm block is disabled via fb pin, vcc capacitor is internally discharged to 5 v and application enters off ? mode again when remote pin voltage crosses v_rem_off threshold (point f ). this operation mode is called automatic primary restart during off ? mode. restart occurs because remote pin bias is lost. user unplugged application from the mains at point g . the application was operating in off ? mode at that time. the x2 pin voltage drops because charge pump does not operate and x2 timer disable switch is opened at point h (x2 timer start counting). the x2 and vcc dischargers are activated after x2 timer elapses (point i ). 4. application start into short cir cuit, auto ? recovery restart, overloads then ac line off ? figure 49: application operation from point a to point e is the same like in 1 st case described in paragraph 1. however, the short circuit is present at the converter output during startup sequence thus the vcc voltage is not maintained and vcc_off threshold is reached in point f . the pwm block is disabled via fb pin and 1 s auto ? recovery timer is activated. the vcc capacitor is discharged by vcc discharge switch to vcc_bias level where it is maintained by the hv startup current source. this vcc bias provides powers to all needed blocks including auto ? recovery timer. the auto ? recovery timer elapses at point g and controller places new restart by fully discharging vcc capacitor and then enabling hv startup current source to ramp up vcc voltage again. the bo block is enabled at point h as vcc bias is available. the bo_ok information is received at SCYW99143 confidential and proprietary not for public release http://onsemi.com 22 point i and startup current source is enabled again to charge vcc capacitor up ? to vcc_on level. the pwm block is enabled at point j together with remote pull down switch and timer (point k ). application then operates regularly in pwm mode. an overload condition occurs on the output in point l . the slave controller fault timer counts down the 100 ms period (fault timer duration is parameter of slave controller) before it disables pwm block internally (point m) . the vcc collapses due to controller consumption and passes vcc_off threshold where 1 s auto ? recovery timer is activated and pwm_on signal is deactivated (point n ). the vcc is again maintained at vcc_bias level when auto ? recovery timer counts down the off ? time. application is suddenly unplugged from the mains (point o ) before the auto ? recovery timer elapses. the x2 timer is activated after x2 pin voltage drops (point p ). the controller does not allow new attempt for restart when x2 timer is counting even the auto ? recovery timer elapses. the x2 capacitor is then discharged after x2 timer elapses (point q ). note that auto ? recovery timer is starter after vcc_off threshold is reached and remote pin is at low level ? i.e. application felt into fault during pwm block operation. the remote input is ignored and new restart is placed after auto ? recovery timer elapses. 5. application start, latch ? off after 120 ms, ac line restart ? figure 50: application operation from point a to point e is the same like in 1 st case described in paragraph 1. the controller however latches ? off approximately 120 ms after startup in this case ? point f . controller can be latched by various mechanisms ? refer below to descriptions. the pwm block is disabled internally after latch has been asserted. the vcc capacitor is discharged by vcc discharge switch to vcc_bias level. the vcc_bias (5 v) is then maintained by hv startup current source to keep controller in latched state. the user recognized that smps is not working and tries to restart it by re ? plugging into the mains. thus the application is unplugged at point g . the x2 discharge timer is activated via x2 pin (point h ). the x2 capacitor is discharged and all vcc is lost after x2 timer elapses (point i ). the internal logic is thus reset and prepared for next start attempt. user plugs application into the mains again at point j . standard startup sequence occurs (including remote pull down switch and timer activation). application then operates in normal operating modes (e.g. standard pwm operation, frequency foldback or skip mode). SCYW99143 confidential and proprietary not for public release http://onsemi.com 23 figure 46. ic operation sequencing ? case 1 (active on) SCYW99143 confidential and proprietary not for public release http://onsemi.com 24 figure 47. ic operation sequencing ? case 2 (active on) SCYW99143 confidential and proprietary not for public release http://onsemi.com 25 figure 48. ic operation sequencing ? case 3 (active on) SCYW99143 confidential and proprietary not for public release http://onsemi.com 26 figure 49. ic operation sequencing ? case 4 (active on) SCYW99143 confidential and proprietary not for public release http://onsemi.com 27 figure 50. ic operation sequencing ? case 5 (active on) SCYW99143 confidential and proprietary not for public release http://onsemi.com 28 active off version 1. application start, remote off/on then ac line off ? figure 51: application has been plugged into the mains at point a . the hv pin receives rectified ac line voltage and the x2 sense pin charges up via external charge pump sensing circuitry. as the high voltage is present on the hv pin the startup current source is activated to charge vcc capacitor to vcc_bias . the bo block bias is enabled at this point (point b) . the vcc_bias is maintained until the controller receives bo ? ok information from the bo block. when line voltage is high enough to enable application operation the startup current source continues to ramp up the vcc voltage (point c ) up to vcc_on threshold (point d ) where pwm block operation is enabled (pwm_on signal). the voltage on rem pin follows voltage on fb pin of slave controller (i.e. rem pin is connected directly to fb opto ? coupler). the voltage on rem falls under vrem_off . it is mean slave controller goes into skip mode. if the skip mode takes too long time, vcc crosses vcc_off level due to internal consumption (voltage on rem pin is still below vrem_off ), then the off ? mode is detected (point e ). the vcc capacitor is then internally discharged to 5v and all blocks are disabled to reduce ic consumption to minimum needed level. the vcc pin remains unbiased during whole off ? mode operation. the x2 discharge and remote internal blocks remain biased by the hv leakage current istart_off (hv current source is off) ? consuming minimum power but still keeping them operated. fb opto ? coupler is turned off and the voltage on rem pin is slowly increased by internal pull ? up current source i_rem_bias . when the voltage on rem pin exceed v_rem_on threshold at point f , vcc capacitor is fully discharged and the controller enables the hv startup current source to built vcc bias up again. the bo block bias is enabled and pwm_on signal is disabled at point g . this vcc_bias level (5 v) is maintained until the controller receives bo_ok information from the bo block. if the line voltage is high enough to enable operation the startup current source continues to ramp up vcc voltage (point h ) up to vcc_on threshold (point i ) where controller pwm is enabled (pwm_on signal). application then operates normally under any load conditions (e.g. standard pwm operation, frequency foldback or skip mode). application has been unplugged from the mains at point j . let us consider the light load operation mode during this event as a worst case for x2 capacitor discharging process. the x2 capacitor stays charged on its actual voltage level (line peak voltage in worst case). the x2 capacitor provides dc bias to hv pin. the x2 sense input voltage starts to drop in the same time because there is no ac voltage and charge pump cannot transfer any charge to x2 pin. the 100 ms x2 timer is activated when the x2 input voltage drops below internal x2 timer disable switch threshold voltage ( vth_x2 ) point k . after the x2 timer elapses (point l ), the pwm block operation is disabled by pulling down the fb pin via internal fb switch, the discharge switches (x2 and vcc) are activated and x2 capacitor discharges via hv startup current source until the x2 capacitor voltage drops to safe level and internal bias is lost (point m ). the over temperature protection is active during discharging process to overcome hv startup damage that would occur otherwise under fault cases ? like when x2 pin is not connected. 2. application start, ac line dropout, low line off, bo restart, ac line off ? figure 52: this case is the same as for active on version except levels of voltage on rem pin. the voltage on rem pin follows voltage on fb pin of the slave controller 3. off ? mode operation ? restart by primary remote pull ? up then ac line off ? figure 53: the voltage on rem falls under vrem_off . the slave controller goes to skip mode for long time. vcc crosses vcc_off level due to internal consumption (voltage on rem pin is still below vrem_off ) and off ? mode is initiated (point a ). as soon as the fb opto ? coupler is turned of f, the voltage on rem pin is slowly increased by internal pull ? up current source i_rem_bias . when the voltage on rem pin exceed v_rem_on threshold at point b , vcc capacitor is fully discharged and the controller enables the hv startup current source to built vcc bias for bo block and pwm_on signal is disabled (point c ). once the bo_ok information is received (point d ) the hv startup current source ramps up to vcc_on level (point e ). pwm block operation is enabled and the voltage on rem pin is decreasing by turning on of fb opto ? coupler. the application enters into off ? mode again when remote pin voltage crosses v_rem_off threshold and vcc falls under vcc_off (point f ). restart occurs because rem pin is biased when fb opto ? coupler is turned off. user unplugged application from the mains at point g . the application was operating in off ? mode at that time. the x2 pin voltage drops because charge pump does not operate and x2 timer disable switch is opened at point h (x2 timer start counting). the x2 discharger is activated after x2 timer elapses (point i ). 4. application start into short cir cuit, auto ? recovery restart, overloads then ac line off ? figure 54: this case is the same as for active on version except levels of voltage on rem pin. the voltage on rem pin follows voltage on fb pin of the slave controller. 5. application start, latch ? off after 120 ms, ac line restart ? figure 55: this case is the same as for active on version except levels of voltage on rem pin. the voltage on rem pin follows voltage on fb pin of the slave controller. SCYW99143 confidential and proprietary not for public release http://onsemi.com 29 figure 51. ic operation sequencing ? case 1 (active off) SCYW99143 confidential and proprietary not for public release http://onsemi.com 30 figure 52. ic operation sequencing ? case 2 (active off) SCYW99143 confidential and proprietary not for public release http://onsemi.com 31 figure 53. ic operation sequencing ? case 3 (active off) SCYW99143 confidential and proprietary not for public release http://onsemi.com 32 figure 54. ic operation sequencing ? case 4 (active off) SCYW99143 confidential and proprietary not for public release http://onsemi.com 33 figure 55. ic operation sequencing ? case 5 (active off) SCYW99143 confidential and proprietary not for public release http://onsemi.com 34 extra low consumption x2 cap discharge pwm _on = 0 vcc ? >0v hv ? >0v remote mode vcc = floating pwm_on = 0 v_rem > v_rem_off charge vcc vcc ? >22v pwm_on = 0 start vcc ? >5v pwm _on = 0 vcc_fault vcc = 5v pwm_on = 0 t a ? rec _timer =1 vcc SCYW99143 confidential and proprietary not for public release http://onsemi.com 35 on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parame ters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 SCYW99143/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative |
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