document number: 90362 www.vishay.com s11-1045-rev. c, 30-may-11 1 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 power mosfet irfsl9n60a, SIHFSL9N60A vishay siliconix features ? halogen-free according to iec 61249-2-21 definition ? low gate charge q g results in simple drive requirement ? improved gate, avalanche and dynamic dv/dt ruggedness ? fully characterized capacitance and avalanche voltage and current ? compliant to rohs directive 2002/95/ec applications ? switch mode power supply (smps) ? uninterruptable power supply ? high speed power switching ? this device is only for through hole application applicable off line smps topologies ? active clamped forward ? main switch notes a. repetitive rating; pulse widt h limited by maximum junction temperature (see fig. 11). b. starting t j = 25 c, l = 6.8 mh, r g = 25 ? , i as = 9.2 a (see fig. 12). c. i sd ? 9.2 a, di/dt ? 50 a/s, v dd ? v ds , t j ? 150 c. d. 1.6 mm from case. product summary v ds (v) 600 r ds(on) ( ? )v gs = 10 v 0.75 q g (max.) (nc) 49 q gs (nc) 13 q gd (nc) 20 configuration single n-channel mosfet g d s i 2 pak (to-262) s d g ordering information package i 2 pak (to-262) lead (pb)-free and halo gen-free SIHFSL9N60A-ge3 lead (pb)-free irfsl9n60apbf SIHFSL9N60A-e3 absolute maximum ratings (t c = 25 c, unless otherwise noted) parameter symbol limit unit drain-source voltage v ds 600 v gate-source voltage v gs 30 continuous drain current v gs at 10 v t c = 25 c i d 9.2 a t c = 100 c 5.8 pulsed drain current a i dm 37 linear derating factor 1.3 w/c single pulse avalanche energy b e as 290 mj repetitive avalanche current a i ar 9.2 a repetitive avalanche energy a e ar 17 mj maximum power dissipation t c = 25 c p d 170 w peak diode recovery dv/dt c dv/dt 5.0 v/ns operating junction and storage temperature range t j , t stg - 55 to + 150 c soldering recommendations (p eak temperature) for 10 s 300 d * pb containing terminations are not rohs compliant, exemptions may apply
www.vishay.com document number: 90362 2 s11-1045-rev. c, 30-may-11 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 irfsl9n60a, SIHFSL9N60A vishay siliconix notes a. repetitive rating; pulse widt h limited by maximum junction temperature (see fig. 11). b. pulse width ? 300 s; duty cycle ? 2 %. c. c oss eff. is a fixed capacitance that gives the same charging time as c oss while v ds is rising fr om 0 to 80% v ds . thermal resistance ratings parameter symbol typ. max. unit maximum junction-to-ambient (pcb mounted, steady-state) r thja -40 c/w maximum junction-to-case (drain) r thjc -0.75 specifications (t j = 25 c, unless otherwise noted) parameter symbol test condi tions min. typ. max. unit static drain-source brea kdown voltage v ds v gs = 0, i d = 250 a 600 - - v gate-source threshold voltage v gs(th) v ds = v gs , i d = 250 a 2.0 - 4.0 v gate-source leakage i gss v gs = 30 v - - 100 na zero gate voltage drain current i dss v ds = 600 v, v gs = 0 v - - 25 a v ds = 480 v, v gs = 0 v, t j = 125 c - - 250 drain-source on-state resistance r ds(on) v gs = 10 v i d = 5.5 a b - - 0.75 ? forward transconductance g fs v ds = 25 v, i d = 3.1 a b 5.5 - - s dynamic input capacitance c iss v gs = 0 v v ds = 25 v f = 1.0 mhz, see fig. 5 - 1400 - pf output capacitance c oss - 180 - reverse transfer capacitance c rss -7.1- output capacitance c oss v gs = 0 v v ds = 1.0 v, f = 1.0 mhz - 1957 - v ds = 480 v, f = 1.0 mhz - 49 - effective output capacitance c oss eff. v ds = 0 v to 480 v c -96- total gate charge q g v gs = 10 v i d = 9.2 a, v ds = 400 v see fig. 6 and 13 b --49 nc gate-source charge q gs --13 gate-drain charge q gd -- 20 turn-on delay time t d(on) v dd = 300 v, i d = 9.2 a r g = 9.1 ? , r d = 35.5 ? , see fig. 10 b -13- ns rise time t r -25- turn-off delay time t d(off) -30- fall time t f -22- drain-source body diode characteristics continuous source-dr ain diode current i s mosfet symbol showing the integral reverse p - n junction diode --9.2 a pulsed diode forward current a i sm --37 body diode voltage v sd t j = 25 c, i s = 9.2 a, v gs = 0 v b --1.5v body diode reverse recovery time t rr t j = 25 c, i f = 9.2 a, di/dt = 100 a/s b - 530 800 ns body diode reverse recovery charge q rr -3.04.4c forward turn-on time t on intrinsic turn-on time is negligible (turn-on is dominated by l s and l d ) s d g
document number: 90362 www.vishay.com s11-1045-rev. c, 30-may-11 3 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 irfsl9n60a, SIHFSL9N60A vishay siliconix typical characteristics (25 c, unless otherwise noted) fig. 1 - typical output characteristics fig. 2 - typical output characteristics fig. 3 - typical transfer characteristics fig. 4 - normalized on-resistance vs. temperature 0.1 1 10 100 0.1 1 10 100 20s pulse width t = 25 c j top bottom vgs 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v 4.7v v , drain-to-source voltage (v) i , drain-to-source current (a) ds d 4.7v 1 10 100 1 10 100 20 s pulse width t = 150 c j top bottom vgs 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v 4.7v v , drain-to-source volta g e (v) i , drain-to-source current (a) ds d 4.7v 0.1 1 10 100 4.0 5.0 6.0 7.0 8.0 9.0 10.0 v = 50v 20s pulse width ds v , gate-to-source voltage (v) i , drain-to-source current (a) gs d t = 25 c j t = 150 c j -60 -40 -20 0 20 40 60 80 100 120 140 160 0.0 0.5 1.0 1.5 2.0 2.5 3.0 t , junction temperature ( c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d 10v 9.2a
www.vishay.com document number: 90362 4 s11-1045-rev. c, 30-may-11 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 irfsl9n60a, SIHFSL9N60A vishay siliconix fig. 5 - typical capacitance vs. drain-to-source voltage fig. 6 - typical gate charge vs. gate-to-source voltage fig. 7 - typical source-d rain diode forward voltage fig. 8 - maximum safe operating area 0 400 800 1200 1600 2000 2400 1101001000 c, capacitance (pf) ds v , drain-to-source volta g e ( v ) a v = 0v, f = 1mhz c = c + c , c s horted c = c c = c + c gs iss gs gd ds rss gd oss ds gd c iss c oss c rss 0 10 20 30 40 50 0 4 8 12 16 20 q , total gate charge (nc) v , gate-to-source voltage (v) g gs for test circuit see figure i = d 13 9.2a v = 120v ds v = 300v ds v = 480v ds 400v 0.1 1 10 100 0.2 0.5 0.7 1.0 1.2 v ,source-to-drain voltage (v) i , reverse drain current (a) sd sd v = 0 v gs t = 25 c j t = 150 c j 0.1 1 10 100 1000 10 100 1000 10000 operation in this area limited by r ds(on) sin g le pulse t t = 150 c = 25 c j c v , drain-to-source volta g e (v) i , drain current (a) i , drain current (a) ds d 10us 100us 1ms 10ms
document number: 90362 www.vishay.com s11-1045-rev. c, 30-may-11 5 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 irfsl9n60a, SIHFSL9N60A vishay siliconix fig. 9 - maximum drain cu rrent vs. case temperature fig. 10a - switching time test circuit fig. 10b - switching time waveforms fig. 11 - maximum effective transient thermal impedance, junction-to-case 25 50 75 100 125 150 0.0 2.0 4.0 6.0 8.0 10.0 t , case temperature ( c) i , drain current (a) c d pulse width 1 s duty factor 0.1 % r d v gs r g d.u.t. 10 v + - v ds v dd v ds 90 % 10 % v gs t d(on) t r t d(off) t f 0.01 0.1 1 0.00001 0.0001 0.001 0.01 0.1 1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response)
www.vishay.com document number: 90362 6 s11-1045-rev. c, 30-may-11 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 irfsl9n60a, SIHFSL9N60A vishay siliconix fig. 12a - unclamped inductive test circuit fig. 12b - unclamped inductive waveforms fig. 12c - maximum avalanche energy vs. drain current fig. 13a - basic gate charge waveform fig. 13b - gate charge test circuit a r g i as 0.01 t p d.u.t. l v ds + - v dd driver a 15 v 20 v i as v ds t p 25 50 75 100 125 150 0 100 200 300 400 500 600 starting t , junction temperature ( c) e , single pulse avalanche energy (mj) j as i d top bottom 4.1a 5.8a 9.2a q gs q gd q g v g charge 10 v d.u.t. 3 ma v gs v ds i g i d 0.3 f 0.2 f 50 k 12 v current regulator current sampling resistors same type as d.u.t. + -
document number: 90362 www.vishay.com s11-1045-rev. c, 30-may-11 7 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 irfsl9n60a, SIHFSL9N60A vishay siliconix fig. 14 - for n-channel vishay siliconix maintains worldwide manufacturing capability. pr oducts may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?90362 . p.w. period di/dt diode recovery dv/dt ripple 5 % body diode forward drop re-applied voltage rever s e recovery current body diode forward current v gs = 10 v a i s d driver gate drive d.u.t. l s d waveform d.u.t. v d s waveform inductor current d = p.w. period + - + + + - - - peak dio d e recovery d v/ d t test circuit v dd ? dv/dt controlled by r g ? driver s ame type a s d.u.t. ? i s d controlled by duty factor d ? d.u.t. - device under te s t d.u.t. circuit layout con s ideration s ? low s tray inductance ? g round plane ? low leakage inductance current tran s former r g note a. v gs = 5 v for logic level device s v dd
document number: 91364 www.vishay.com revision: 15-sep-08 1 package information vishay siliconix to-263ab (high voltage) notes 1. dimensioning and toler ancing per asme y14.5m-1994. 2. dimensions are shown in millimeters (inches). 3. dimension d and e do not include mold flash. mold flash shal l not exceed 0.127 mm (0.005") per side. these dimensions are me asured at the outmost extremes of the plastic body at datum a. 4. thermal pad contour optional within dimension e, l1, d1 and e1. 5. dimension b1 and c1 apply to base metal only. 6. datum a and b to be determined at datum plane h. 7. outline conforms to jedec outline to to-263ab. 5 4 1 3 l1 l2 d b b e h b a detail a a a c c2 a 2 x e 2 x b 2 2 x b 0.010 a b mm 0.004 b m base metal plating b 1, b 3 ( b , b 2) c1 (c) section b - b and c - c scale: none lead tip 4 34 (dat u m a) 2 c c b b 5 5 v ie w a - a e1 d1 e 4 4 b h seating plane ga u ge plane 0 to 8 detail ?a? rotated 90 cw scale 8 :1 l3 a1 l4 l millimeters inches millimeters inches dim. min. max. min. max. dim. min. max. min. max. a 4.06 4.83 0.160 0.190 d1 6.86 - 0.270 - a1 0.00 0.25 0.000 0.010 e 9.65 10.67 0.380 0.420 b 0.51 0.99 0.020 0.039 e1 6.22 - 0.245 - b1 0.51 0.89 0.020 0.035 e 2.54 bsc 0.100 bsc b2 1.14 1.78 0.045 0.070 h 14.61 15.88 0.575 0.625 b3 1.14 1.73 0.045 0.068 l 1.78 2.79 0.070 0.110 c 0.38 0.74 0.015 0.029 l1 - 1.65 - 0.066 c1 0.38 0.58 0.015 0.023 l2 - 1.78 - 0.070 c2 1.14 1.65 0.045 0.065 l3 0.25 bsc 0.010 bsc d 8.38 9.65 0.330 0.380 l4 4.78 5.28 0.188 0.208 ecn: s-82110-rev. a, 15-sep-08 d w g: 5970
document number: 91367 www.vishay.com revision: 27-oct-08 1 package information vishay siliconix i 2 pak (to-262) (high voltage) notes 1. dimensioning and toler ancing per asme y14.5m-1994. 2. dimension d and e do not include mold flash. mold flash shal l not exceed 0.127 mm per side. these dimensions are measured at the outmost extremes of the plastic body. 3. thermal pad contour optional within dimension e, l1, d1, and e1. 4. dimension b1 and c1 apply to base metal only. a e b a a a c2 c a1 base metal plating b 1, b 3 ( b , b 2) c1 c section a - a section b - b and c - c scale: n one e1 e seating plane lead tip (dat u m a) l1 l2 b b c c l d 2 x e 3 x b 2 3 x b 0.010 a b m m d1 millimeters inches millimeters inches dim. min. max. min. max. dim. min. max. min. max. a 4.06 4.83 0.160 0.190 d 8.38 9.65 0.330 0.380 a1 2.03 3.02 0.080 0.119 d1 6.86 - 0.270 - b 0.51 0.99 0.020 0.039 e 9.65 10.67 0.380 0.420 b1 0.51 0.89 0.020 0.035 e1 6.22 - 0.245 - b2 1.14 1.78 0.045 0.070 e 2.54 bsc 0.100 bsc b3 1.14 1.73 0.045 0.068 l 13.46 14.10 0.530 0.555 c 0.38 0.74 0.015 0.029 l1 - 1.65 - 0.065 c1 0.38 0.58 0.015 0.023 l2 3.56 3.71 0.140 0.146 c2 1.14 1.65 0.045 0.065 ecn: s-82442-rev. a, 27-oct-08 dwg: 5977
legal disclaimer notice www.vishay.com vishay revision: 13-jun-16 1 document number: 91000 disclaimer ? all product, product specifications and data ar e subject to change with out notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employee s, and all persons acting on it s or their behalf (collectivel y, vishay), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, representation or guarantee regarding the suitability of th e products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicable law, vi shay disclaims (i) any and all liability arising out of the application or use of any product , (ii) any and all liability, including without limitation specia l, consequential or incidental damages, and (iii) any and all implied warranties, includ ing warranties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of products for certain types of applicatio ns are based on vishays knowledge of typical requirements that are often placed on vishay products in generic applications. such statements are not binding statements about the suitability of products for a particular applic ation. it is the customers responsibility to validate tha t a particular product with the prope rties described in the product sp ecification is suitable for use in a particular application. parameters provided in datasheets and / or specifications may vary in different ap plications and perfor mance may vary over time. all operating parameters, including ty pical parameters, must be va lidated for each customer application by the customer s technical experts. product specifications do not expand or otherwise modify vishays term s and conditions of purchase, including but not limited to the warranty expressed therein. except as expressly indicated in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vishay product could result in personal injury or death. customers using or selling vishay product s not expressly indicated for use in such applications do so at their own risk. please contact authorized vishay personnel to obtain writ ten terms and conditions rega rding products designed for such applications. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is gran ted by this document or by any conduct of vishay. product names and markings noted herein may be trademarks of their respective owners.
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