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this is information on a product in full production. august 2016 docid026333 rev 4 1/33 hts221 capacitive digital sensor for relative humidity and temperature datasheet - production data features ? 0 to 100% relative humidity range ? supply voltage: 1.7 to 3.6 v ? low power consumption: 2 a @ 1 hz odr ? selectable odr from 1 hz to 12.5 hz ? high rh sensitivity: 0.004% rh/lsb ? humidity accuracy: 3.5% rh, 20 to +80% rh ? temperature accuracy: 0.5 c,15 to +40 c ? embedded 16-bit adc ? 16-bit humidity and temperature output data ? spi and i2c interfaces ? factory calibrated ? tiny 2 x 2 x 0.9 mm package ? ecopack ? compliant applications ? air conditioning, heating and ventilation ? air humidifiers ? refrigerators ? wearable devices ? smart home automation ? industrial automation ? respiratory equipment ? asset and goods tracking description the hts221 is an ultra-compact sensor for relative humidity and temperature. it includes a sensing element and a mixed signal asic to provide the measurement information through digital serial interfaces. the sensing element consists of a polymer dielectric planar capacitor structure capable of detecting relative humidity variations and is manufactured using a dedicated st process. the hts221 is available in a small top-holed cap land grid array (hlga) package guaranteed to operate over a temperature range from -40 c to +120 c. hlga-6l (2 x 2 x 0.9 mm) table 1. device summary order code temperature range [c] package packing HTS221TR -40 to +120 hlga-6l tape and reel www.st.com
contents hts221 2/33 docid026333 rev 4 contents 1 hts221 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1 pin information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 sensor parameters and electrical specifications . . . . . . . . . . . . . . . . . . 8 2.1 communication interface characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.1.1 spi - serial peripheral interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.1.2 i2c - control interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.2 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3 functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.1 ic interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.2 factory calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4 application hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.1 soldering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 digital interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.1 i 2 c serial interface (cs = high or unconnected cs) . . . . . . . . . . . . . . . 14 5.1.1 i2c operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.2 spi bus interface (cs = low) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.2.1 spi write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.2.2 spi read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6 register mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7.1 who_am_i (0fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7.2 av_conf (10h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7.3 ctrl_reg1 (20h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.4 ctrl_reg2 (21h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7.5 ctrl_reg3 (22h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 7.6 status_reg (27h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 7.7 humidity_out_l (28h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
docid026333 rev 4 3/33 hts221 contents 33 7.8 humidity_out_h (29h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7.9 temp_out_l (2ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7.10 temp_out_h (2bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 8 humidity and temperature data conversion . . . . . . . . . . . . . . . . . . . . . 26 9 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 9.1 hlga-6l package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 9.2 hlga-6l packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 10 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
list of tables hts221 4/33 docid026333 rev 4 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 3. humidity and temperature parameter specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 4. electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 5. spi slave timing values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 6. i2c slave timing values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 7. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 8. serial interface pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 table 9. serial interface pin description i 2 c terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 table 10. sad + read/write patterns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 11. transfer when master is writing one byte to slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 12. transfer when master is writing multiple bytes to slave . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 13. transfer when master is receiving (reading) one byte of data from slave . . . . . . . . . . . . . 16 table 14. transfer when master is receiving (reading) multiple bytes of data from slave . . . . . . . . . 16 table 15. register address map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 16. humidity and temperature average configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 17. output data rate configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 18. typical power consumption with heater on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 19. decoding the coefficients in the sensor flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 20. hlga-6l (2 x 2 x 0.9 mm) mechanical data outer dimensions . . . . . . . . . . . . . . . . . . . . . 29 table 21. reel dimensions for carrier tape of hlga-6l package . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 table 22. document revision history. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
docid026333 rev 4 5/33 hts221 list of figures 33 list of figures figure 1. hts221 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. pin configuration (bottom view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. spi slave timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 5. hts221 electrical connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 figure 6. spi write protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 7. multiple byte spi write protocol (2-byte example). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 8. spi read protocol in 3-wires mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 figure 9. step 1: linear interpolation to convert lsb to c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 10. step 2: linear interpolation to convert lsb to rh% . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 figure 11. hlga-6l (2 x 2 x 0.9 mm) package outline and mechanical data . . . . . . . . . . . . . . . . . . . 29 figure 12. carrier tape information for hlga-6l package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 figure 13. hlga-6l package orientation in carrier tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 figure 14. reel information for carrier tape of hlga-6l package. . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
hts221 block diagram hts221 6/33 docid026333 rev 4 1 hts221 block diagram figure 1. hts221 block diagram 1.1 pin information figure 2. pin configuration (bottom view) +xplglw\ &dsdflwru 6hqvlqj (ohphqw 6hqvru 'ulyhu &kdujh 2s$ps 2s $ps 7hpshudwxuh 6hqvru $'& 9rowdjh &xuuhqw %ldv &orfn 7lplqj ,e& 63, &rqwuro /rjlf 08; *$066* *1' 6&/63& 9'' 6'$6',6'2 &6 '5'< %277209,(:
docid026333 rev 4 7/33 hts221 hts221 block diagram 33 table 2. pin description pin n name function 1v dd power supply 2 scl/spc i2c serial clock (scl) spi serial port clock (spc) 3 drdy data ready output signal 4 sda/sdi/sdo i2c serial data (sda) 3-wire spi serial data input /output (sdi/sdo) 5 gnd ground 6 spi enable i2c/spi mode selection (1: spi idle mode / i2c communication enabled; 0: spi communication mode / i2c disabled)
sensor parameters and electrical specifications hts221 8/33 docid026333 rev 4 2 sensor parameters and electrical specifications conditions at v dd = 2.5 v, t = 25 c, unless otherwise noted. table 3. humidity and temperature parameter specifications symbol parameter test condition min. typ. (1) max. unit h op operating humidity range 0 ? 100 % rh h bit humidity output data 16 ? bit h s humidity sensitivity 0.004 %rh/lsb 256 lsb/%rh h acc humidity accuracy (2) 20 to 80% rh 3.5 % rh 0 to 100% rh 5 h noise humidity noise (3) 0.03 rms h hys humidity hysteresis 1 % rh h step humidity response time (4) t @ 63% 10 s h drift humidity long-term drift 20 to 80% rh 0.5 %rh/yr t op operating temperature range -40 ? 120 c t bit temperature output data ? 16 ? bit t s temperature sensitivity 0.016 c/lsb 64 lsb/c t acc temperature accuracy 15 to 40 c 0.5 c 0 to 60 c 1 t noise temperature noise (3) 0.007 rms t step temperature response time t @ 63% 15 s t drift temperature long-term drift t = 0 to 80 c 0.05 c/yr odr humidity and temperature digital output data rate 1/7/12. 5 hz 1. typical specifications are not guaranteed 2. accuracy in non condensing environment including hysteresis 3. default value; noise value can be modified by av_conf (10h) 4. valid at 25 c and 1 m/s airflow table 4. electrical characteristics symbol parameter test condition min. typ. (1) max. unit v dd supply voltage 1.7 ? 3.6 v i dd supply current (2) 1 hz, 25 c, 2.5 v 2 a i dd p dn supply current in power-down mode t = 25 c 25 c, 2.5 v ? 0.5 ? a 1. typical specifications are not guaranteed 2. refer to table 16 .
docid026333 rev 4 9/33 hts221 sensor parameters and electrical specifications 33 2.1 communication interface characteristics 2.1.1 spi - serial peripheral interface subject to general operating conditions for v dd and t op figure 3. spi slave timing diagram note: measurement points are done at 0.2v dd and 0.8v dd , for both ports. table 5. spi slave timing values symbol parameter value (1) 1. values are guaranteed at 10 mhz clock frequency for spi, based on characterization results, not tested in production. unit min. max. t c(spc) spi clock cycle 100 ns f c(spc) spi clock frequency 10 mhz t su(cs) cs setup time 6 ns t h(cs) cs hold time 8 t su(si) sdi input setup time 5 t h(si) sdi input hold time 15 t v(so) sdo valid output time 50 t h(so) sdo output hold time 9 t dis(so) sdo output disable time 50 63& &6 6',6'2 w vx&6 w y62 w k62 w k6, w vx6 , w k&6 w glv62 w f6 3& 06%,1 06%287 /6%287 /6%,1 6', 6'2 *$066*
sensor parameters and electrical specifications hts221 10/33 docid026333 rev 4 2.1.2 i2c - control interface subject to general operating conditions for v dd and t op . figure 4. i2c slave timing diagram note: measurement points are done at 0.2v dd and 0.8v dd , for both ports. table 6. i2c slave timing values symbol parameter (1) i2c standard mode (1) i2c fast mode (1) unit min. max. min. max. f (scl) scl clock frequency 0 100 0 400 khz t w(scll) scl clock low time 4.7 1.3 s t w(sclh) scl clock high time 4.0 0.6 t su(sda) sda setup time 250 100 ns t h(sda) sda data hold time 0.01 3.45 0 0.9 s t r(sda) t r(scl) sda and scl rise time 1000 20 + 0.1c b (2) 300 ns t f(sda) t f(scl) sda and scl fall time 300 20 + 0.1c b (2) 300 t h(st) start condition hold time 4 0.6 s t su(sr) repeated start condition setup time 4.7 0.6 t su(sp) stop condition setup time 4 0.6 t w(sp:sr) bus free time between stop and start condition 4.7 1.3 1. data based on standard i2c protocol requirement, not tested in production. 2. c b = total capacitance of one bus line, in pf. 6'$ 6&/ w i6'$ w vx63 w z6&// w vx6'$ w u6'$ w vx65 w k67 w z6&/+ w k6'$ w u6&/ w i6&/ w z6365 67$57 5(3($7(' 67$57 6723 67$57 $0y
docid026333 rev 4 11/33 hts221 sensor parameters and electrical specifications 33 2.2 absolute maximum ratings stress above those listed as ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device under these conditions is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. note: supply voltage on any pin should never exceed 4.8 v. table 7. absolute maximum ratings symbol ratings maximum value unit v dd supply voltage -0.3 to 4.8 v v in input voltage on any control pin -0.3 to v dd +0.3 v t stg storage temperature range -40 to +125 c esd electrostatic discharge protection 2 (hbm) kv this device is sensitive to mechanical shock, improper handling can cause permanent damage to the part. this device is sensitive to electrostatic discharge (esd), improper handling can cause permanent damage to the part.
functionality hts221 12/33 docid026333 rev 4 3 functionality the hts221 is a digital humidity and temperature sensor, packaged in an hlga holed package.the device includes the sensing element and an ic (integrated circuit) interface able to take information from the sensing element and provide a digital signal to the application, communicating through i2c/spi interfaces with the host controller. 3.1 ic interface the complete measurement chain consists of a low-noise capacitive amplifier, which converts the capacitive imbalance of the humidity sensor into an analog voltage signal, and an analog-to-digital converter is used to generate the digital information. the converter is coupled with a dedicated hardware (hw) averaging filter to remove the high-frequency component and reduce the serial interface traffic. the relative humidity and temperature data can be accessed through an i2c/spi interface, making the device particularly suitable for direct interfacing with a microcontroller. 3.2 factory calibration the ic (integrated circuit) interface is factory calibrated and the coefficients required to convert the adc 16-bit values into rh% or degrees celsius can be read through the internal registers of the sensor. further calibration by the user is not required.
docid026333 rev 4 13/33 hts221 application hints 33 4 application hints figure 5. hts221 electrical connections the device is supplied through the v dd line. the power supply decoupling capacitor (100 nf ceramic) should be placed as near as possible to the supply pad of the device (common design practice). the functionality of the device and the measured data outputs are selectable and accessible through the i2c/spi interfaces. to select the i2c interface, the cs line must be tied high (i.e. connected to vdd) or left unconnected (thanks to the internal pull-up). all the voltage and ground supplies must be present at the same time to have proper behavior of the ic (refer to figure 5 ). 4.1 soldering information the hlga package is compliant with the ecopack ? standard and it is qualified for soldering heat resistance according to jedec j-std-020. after soldering, the accuracy specification of the sensor can be guaranteed after re-hydration of the sensor element in a stabilized environment (25 c / 55% rh) for 3 days or at 70% rh for 12 h. otherwise the sensor may read an offset that slowly disappears if exposed to ambient conditions. *$066* &6 '5'< 6'$6',6'2 *1' 9'' 9'' & q) *1' 7239,(9 *1' 6&/63& 7239,(:
digital interfaces hts221 14/33 docid026333 rev 4 5 digital interfaces the registers embedded in the hts221 may be accessed through both the i2c and spi 3-wire serial interfaces. the serial interfaces are mapped onto the same pins.to select the i2c interface, the cs line must be tied high (i.e. connected to v dd ) or unconnected (internal pull-up); to select the spi interface, the cs line must be tied low (i.e. connected to gnd). 5.1 i 2 c serial interface (cs = high or unconnected cs) the hts221 i2c is a bus slave. the i2c is employed to write data into registers whose content can also be read back. the relevant i2c terminology is provided in table 9. there are two signals associated with the i2c bus: the serial clock line (scl) and the serial data line (sda). the latter is a bi-directional line used for sending and receiving the data to/from the interface. both lines must be connected to v dd through pull-up resistors. the i2c interface is compliant with fast mode (400 khz) i2c standards as well as with normal mode. table 8. serial interface pin description pin name pin description cs i2c/spi mode selection 1: spi idle mode / i2c communication enabled 0: spi communication mode / i2c disabled) scl/spc i2c serial clock (scl) spi serial clock (spc) sda/sdi/sdo i2c serial data (sda) 3-wire spi serial data input /output (sdi/sdo) table 9. i 2 c terminology term description transmitter the device which sends data to the bus receiver the device which receives data from the bus master the device which initiates a transfer, generates clock signals and terminates a transfer slave the device addressed by the master
docid026333 rev 4 15/33 hts221 digital interfaces 33 5.1.1 i2c operation the transaction on the bus is started through a start (st) signal. a start condition is defined as a high to low transition on the data line while the scl line is held high. after this has been transmitted by the master, the bus is considered busy. the next byte of data transmitted after the start condition contains the address of the slave in the first 7 bits and the eighth bit tells whether the master is receiving data from the slave or transmitting data to the slave. when an address is sent, each device in the system compares the first seven bits after a start condition with its address. if they match, the device considers itself addressed by the master. the 8-bit slave address (sad) associated to the hts221 humidity sensor is beh (write) and bfh (read). data transfer with acknowledge is mandatory. the transmitter must release the sda line during the acknowledge pulse. the receiver must then pull the data line low so that it remains stable low during the high period of the acknowledge clock pulse. a receiver which has been addressed is obliged to generate an acknowledge after each byte of data received. the i2c embedded in the hts221 behaves like a slave device and the following protocol must be adhered to. after the start condition (st) a slave address is sent, once a slave acknowledge (sak) has been returned, an 8-bit sub-address (sub) will be transmitted: the 7 lsb represents the actual register address while the msb enables address auto- increment. if the msb of the sub field is ?1?, the sub (register address) will be automatically increased to allow multiple data read/write. the slave address is completed with a read/write bit. if the bit was ?1? (read), a repeated start (sr) condition must be issued after the two sub-address bytes; if the bit is ?0? (write) the master will transmit to the slave with direction unchanged. table 10 explains how the sad + read/write bit pattern is composed, listing all the possible configurations. table 10. sad + read/write patterns command sad[6:0] r/w sad+r/w read 1011111 1 10111111 (bfh) write 1011111 0 101 11110 (beh) table 11. transfer when master is writing one byte to slave master st sad + w sub data sp slave sak sak sak table 12. transfer when master is writing multiple bytes to slave master st sad + w sub data data sp slave sak sak sak sak
digital interfaces hts221 16/33 docid026333 rev 4 data are transmitted in byte format (data). each data transfer contains 8 bits. the number of bytes transferred per transfer is unlimited. data is transferred with the most significant bit (msb) first. if a receiver can?t receive another complete byte of data until it has performed some other functions, it can hold the clock line, scl low to force the transmitter into a wait state. data transfer only continues when the receiver is ready for another byte and releases the data line. if a slave receiver does not acknowledge the slave address (i.e. it is not able to receive because it is performing some real-time function) the data line must be kept high by the slave. the master can then abort the transfer. a low to high transition on the sda line while the scl line is high is defined as a stop condition. each data transfer must be terminated by the generation of a stop (sp) condition. in order to read multiple bytes incrementing the register address, it is necessary to assert the most significant bit of the sub-address field. in other words, sub(7) must be equal to 1 while sub(6-0) represents the address of the first register to be read. in the presented communication format mak is master acknowledge and nmak is no master acknowledge. i2c high speed hs-mode devices can transfer information at bit rates of up to 3.4 mbit/s, yet they remain fully downward compatible with fast or standard-mode (f/s-mode) devices for bi-directional communication in a mixed-speed bus system. with the exception that arbitration and clock synchronization is not performed during the hs-mode transfer, the same serial bus protocol and data format is maintained as with the f/s-mode system. hs-mode can only begin after the following conditions (all of which are in f/s-mode): 1. start condition (s) 2. 8-bit master code (00001xxx) 3. not-acknowledge bit (a) this master code has two main functions: it allows arbitration and synchronization between competing masters at f/s-mode speeds, resulting in one winning master. it indicates the beginning of an hs-mode transfer. hs-mode master codes are reserved 8-bit codes, which are not used for slave addressing or other purposes. the master code indicates to other devices that an hs-mode transfer is to begin and the connected devices must meet the hs-mode specification. as no device is allowed to acknowledge the master code, the master code is followed by a not-acknowledge (a). after the not-acknowledge bit (a), and the sclh line has been pulled up to a high level, the active master switches to hs-mode and enables (at time t h , see data transfer in hs mode) table 13. transfer when master is receiving (reading) one byte of data from slave master st sad + w sub sr sad + r nmak sp slave sak sak sak data table 14. transfer when master is receiving (reading) multiple bytes of data from slave master st sad+w sub sr sad+r mak mak nmak sp slave sak sak sak data data data
docid026333 rev 4 17/33 hts221 digital interfaces 33 the current-source pull-up circuit for the sclh signal. as other devices can delay the serial transfer before t h by stretching the low period of the sclh signal, the active master will enable its current-source pull-up circuit when all devices have released the sclh line and the sclh signal has reached a high level, thus speeding up the last part of the rise time of the sclh signal. the active master then sends a repeated start condition (sr) followed by a 7-bit slave address (or 10-bit slave address; see previous section) with a r/w bit address, and receives an acknowledge bit (a) from the selected slave. after a repeated start condition and after each acknowledge bit (a) or not-acknowledge bit (a), the active master disables its current-source pull-up circuit. this enables other devices to delay the serial transfer by stretching the low period of the sclh signal. the active master re-enables its current-source pull-up circuit again when all devices have released and the sclh signal reaches a high level, and so speeds up the last part of the sclh signal?s rise time. data transfer continues in hs-mode after the next repeated start (sr), and only switches back to f/s-mode after a stop condition (p). to reduce the overhead of the master code, it?s possible that a master links a number of hs-mode transfers, separated by repeated start conditions (sr). 5.2 spi bus interface (cs = low) the hts221 spi is a slave bus that can operate in 0 and 3 spi modes. the spi allows writing to and reading from the registers of the device. the serial interface interacts with the application through 3 wires: cs , spc , sdi/sdo . cs is the serial port enable and is controlled by the spi master. it goes low at the start of the transmission and goes back high at the end. scl is the serial port clock and it is controlled by the spi master. it is stopped high when cs is high (no transmission). sdi/sdo is the serial port data input and output. this line is driven at the falling edge of scl and should be captured at the rising edge of scl . both the read register and write register commands are completed in 16 clock pulses or in multiples of 8 in case of multiple read/write bytes. bit duration is the time between two falling edges of scl . the first bit (bit 0) starts at the first falling edge of scl after the falling edge of cs while the last bit (bit 15, bit 23,...) starts at the last falling edge of scl just before the rising edge of cs .
digital interfaces hts221 18/33 docid026333 rev 4 5.2.1 spi write figure 6. spi write protocol the spi write command is performed with 16 clock pulses. a multiple byte write command is performed by adding blocks of 8 clock pulses to the previous one. bit 0 : write bit. the value is 0. bit 1 : ms bit. when 0, does not increment the address; when 1, increments the address in multiple writes. bit 2 -7 : address ad(5:0). this is the address field of the indexed register. bit 8-15 : data di(7:0) (write mode). this is the data that will be written inside the device (msb first). bit 16-... : data di(...-8). further data in multiple byte writes. figure 7. multiple byte spi write protocol (2-byte example) &6 63& 6',6'2 5: '2 $' $' $' $' $' $' 06 '2 '2 '2 '2 '2 '2 '2 &6 6&/ 5: $' $' $' $' $' $' ', ', ', ', ', ', ', ', ', ', ', ', ', ', ', ', 06 6',6'2 *$066*
docid026333 rev 4 19/33 hts221 digital interfaces 33 5.2.2 spi read figure 8. spi read protocol in 3-wire mode the spi read command is performed with 16 clock pulses: bit 0 : read bit. the value is 1. bit 1 : m s bit. when 0, does not increment the address, when 1, increments the address in multiple reads. bit 2-7 : address ad(5:0). this is the address field of the indexed register. bit 8-15 : data do(7:0) (read mode). this is the data that is read from the device (msb first). a multiple read command is also available in 3-wire mode. &6 63& 6',2 5: '2 '2 '2 '2 '2 '2 '2 '2 06 $' $' $' $' $' $'
register mapping hts221 20/33 docid026333 rev 4 6 register mapping the table below provides a list of the 8-bit registers embedded in the device and the related addresses. registers marked as reserved must not be changed. writing to those registers may cause permanent damage to the device. the content of the calib_0..f registers that are loaded at power-on from device internal non-volatile memory should never be modified. table 15. register address map name type register address (hex) default (hex) reserved 00-0e do not modify who_am_i r 0f bc av_conf r/w 10 1b reserved 11-1c do not modify ctrl_reg1 r/w 20 0 ctrl_reg2 r/w 21 0 ctrl_reg3 r/w 22 0 reserved 23-26 do not modify status_reg r 27 0 humidity_out_l r 28 output humidity_out_h r 29 output temp_out_l r 2a output temp_out_h r 2b output reserved 2c-2f do not modify calib_0..f r/w 30-3f do not modify
docid026333 rev 4 21/33 hts221 register description 33 7 register description the device contains a set of registers which are used to control its behavior and to retrieve humidity and temperature data. the register address, made up of 7 bits, is used to identify and to read/write the data, through the serial interfaces. 7.1 who_am_i (0fh) device identification this read-only register contains the device identifier, set to bch 7.2 av_conf (10h) humidity and temperature resolution mode to configure humidity/temperature average. 76543210 10111100 76543210 reserved avgt2 avgt1 avgt0 avgh2 avgh1 avgh0 [7:6] reserved [5:3] avgt2-0: to select the numbers of averaged temperature samples (2 - 256), see table 16 . [2:0] avgh2-0: to select the numbers of averaged humidity samples (4 - 512), see table 16 . table 16. humidity and temperature average configuration avgx2:0 nr. internal average noise (rms) i dd 1 hz temperature (avgt) humidity (avgh) temp (c) rh % a 000 2 4 0.08 0.4 0.80 001 4 8 0.05 0.3 1.05 010 8 16 0.04 0.2 1.40 011 (1) 1. default configuration 16 32 0.03 0.15 2.10 100 32 64 0.02 0.1 3.43 101 64 128 0.015 0.07 6.15 110 128 256 0.01 0.05 11.60 111 256 512 0.007 0.03 22.50
register description hts221 22/33 docid026333 rev 4 7.3 ctrl_reg1 (20h) control register 1 the pd bit is used to turn on the device. the device is in power-down mode when pd = ?0? (default value after boot). the device is active when pd is set to ?1?. the bdu bit is used to inhibit the output register update between the reading of the upper and lower register parts. in default mode (bdu = ?0?), the lower and upper register parts are updated continuously. if it is not certain whether the read will be faster than output data rate, it is recommended to set the bdu bit to ?1?. in this way, after the reading of the lower (upper) register part, the content of that output register is not updated until the upper (lower) part is read also. this feature prevents the reading of lsb and msb related to different samples. the odr1 and odr0 bits permit changes to the output data rates of humidity and temperature samples.the default value corresponds to a ?one-shot? configuration for both humidity and temperature output. odr1 and odr0 can be configured as described in table 17 . 76543210 pd reserved bdu odr1 odr0 [7] pd: power-down control (0: power-down mode; 1: active mode) [6:3] reserved [2] bdu: block data update (0: continuous update; 1: output registers not updated until msb and lsb reading) [1:0] odr1, odr0: output data rate selection (see table 17) table 17. output data rate configuration odr1 odr0 humidity (hz) temperature (hz) 0 0 one-shot 0 1 1 hz 1 hz 1 0 7 hz 7 hz 1 1 12.5 hz 12.5 hz
docid026333 rev 4 23/33 hts221 register description 33 7.4 ctrl_reg2 (21h) control register 2 the boot bit is used to refresh the content of the internal registers stored in the flash memory block. at device power-up, the content of the flash memory block is transferred to the internal registers related to trimming functions to permit good behavior of the device itself. if, for any reason, the content of the trimming registers is modified, it is sufficient to use this bit to restore the correct values. when the boot bit is set to ?1? the content of the internal flash is copied inside the corresponding internal registers and is used to calibrate the device. these values are factory trimmed and are different for every device. they permit good behavior of the device and normally they should not be changed. at the end of the boot process, the boot bit is set again to ?0?. the one_shot bit is used to start a new conversion. in this situation a single acquisition of temperature and humidity is started when the one_shot bit is set to ?1?. at the end of conversion the new data are available in the output registers, the status_reg[0] and status_reg[1] bits are set to ?1? and the one_shot bit comes back to ?0? by hardware. the heater bit is used to control an internal heating element, that can effectively be used to speed up the sensor recovery time in case of condensation. the heater can be operated only by an external controller, which means that it has to be switched on/off directly by fw. humidity and temperature output should not be read during the heating cycle; valid data can be read out once the heater has been turned off, after the completion of the heating cycle. typical power consumption related to v dd is described in table 18 . 76543210 boot reserved heater one_shot [7] boot: reboot memory content (0: normal mode; 1: reboot memory content) [6:2] reserved [1] heater (0: heater disable; 1: heater enable) [0] one-shot enable (0: waiting for start of conversion; 1: start for a new dataset) table 18. typical power consumption with heater on v dd [v] i [ma] 3.3 33 2.5 22 1.8 12
register description hts221 24/33 docid026333 rev 4 7.5 ctrl_reg3 (22h) control register 3 control register for data ready output signal the drdy_en bit enables the drdy signal on pin 3. normally inactive, the drdy output signal becomes active on new data available: logical or of the bits status_reg[1] and status_reg[0] for humidity and temperature, respectively. the drdy signal returns inactive after both humidity_out_h and temp_out_h registers are read. 7.6 status_reg (27h) status register status register; the content of this register is updated every one-shot reading, and after completion of every odr cycle, regardless of the bdu value in ctrl_reg1. 76543210 drdy_h_l pp_od reserved drdy reserved [7] drdy_h_l: data ready output signal active high, low (0: active high - default;1: active low) [6] pp_od: push-pull / open drain selection on pin 3 (drdy) (0: push-pull - default; 1: open drain) [5:3] reserved [2] drdy_en: data ready enable (0: data ready disabled - default;1: data ready signal available on pin 3) [1:0] reserved 76543210 reserved h_da t_da [7:2] reserved [1] h_da: humidity data available. (0: new data for humidity is not yet available; 1: new data for humidity is available) [0] t_da: temperature data available. (0: new data for temperature is not yet available; 1: new data for temperature is available) h_da is set to 1 whenever a new humidity sample is available. h_da is cleared anytime humidity_out_h (29h) register is read. t_da is set to 1 whenever a new temperature sample is available. t_da is cleared anytime temp_out_h (2bh) register is read.
docid026333 rev 4 25/33 hts221 register description 33 7.7 humidity_out_l (28h) relative humidity data (lsb) humidity data (see humidity_out_h) 7.8 humidity_out_h (29h) relative humidity data (msb) humidity data are expressed as humidity_out_h & humidity_out_l in 2?s complement. values exceeding the operating humidity range (see table 3 ) must be clipped by sw. 7.9 temp_out_l (2ah) temperature data (lsb) 7.10 temp_out_h (2bh) temperature data (msb) temperature data are expressed as temp_out_h & temp_out_l as 2?s complement numbers. the relative humidity and temperature values must be computed by linear interpolation of current registers with calibration registers, according to table 19 and scaling as described in section 8 . 76543210 hout7 hout6 hout5 hout4 hout3 hout2 hout1 hout0 [7:0] hout7 - hout0: humidity data lsb 15 14 13 12 11 10 9 8 hout15 hout14 hout13 hout12 hout11 hout10 hout9 hout8 [7:0] hout15 - hout8: humidity data msb 76543210 tout7 tout6 tout5 tout4 tout3 tout2 tout1 tout0 [7:0] tout7 - tout0: temperature data lsb (see temperature_out_h) 15 14 13 12 11 10 9 8 tout15 tout14 tout13 tout12 tout11 tout10 tout9 tout8 [15:8] tout15 - tout8: temperature data msb.
humidity and temperature data conversion hts221 26/33 docid026333 rev 4 8 humidity and temperature data conversion the registers in 30h..3fh address range contain calibration coefficients. every sensor module has individual coefficients. before the first calculation of temperature and humidity, the master reads out the calibration coefficients. (u8) is the unsigned 8-bit quantity, and (s16) the signed 16-bit quantity using 2?s complement format. in the following example, the two steps required to calculate temperature and relative humidity output values are described. the t0 and t1 calibration temperature values are actually composed of 10 bits (unsigned), where the 2 msb are in reg 35h, and the 8 lsb are in regs 32h and 33h, respectively. t0 and t1 are the actual calibration temperature values multiplied by 8. table 19. decoding the coefficients in the sensor flash addr variable format b7 b6 b5 b4 b3 b2 b1 b0 output registers 28 h_out (s16) h7 h6 h5 h4 h3 h2 h1 h0 29 h15 h14 h13 h12 h11 h10 h9 h8 2a t_out (s16) t7 t6 t5 t4 t3 t2 t1 t0 2b t15 t14 t13 t12 t11 t10 t9 t8 calibration registers 30 h0_rh_x2 (u8) h0.7 h0.6 h0.5 h0.4 h0.3 h0.2 h0.1 h0.1 31 h1_rh_x2 (u8) h1.7 h1.6 h1.5 h1.4 h1.3 h1.2 h1.1 h1.0 32 t0_degc_x8 (u8) t0.7 t0.6 t0.5 t0.4 t0.3 t0.2 t0.1 t0.0 33 t1_degc_x8 (u8) t1.7 t1.6 t1.5 t1.4 t1.3 t1.2 t1.1 t1.0 34 reserved (u16) 35 t1/t0 msb (u2),(u2) reserved t1.9 t1.8 t0.9 t0.8 36 h0_t0_out (s16) 76 5 4 3 2 1 0 37 15 14 13 12 11 10 9 8 38 reserved 39 3a h1_t0_out (s16) 76 5 4 3 2 1 0 3b 15 14 13 12 11 10 9 8 3c t0_out (s16) 76 5 4 3 2 1 0 3d 15 14 13 12 11 10 9 8 3e t1_out (s16) 76 5 4 3 2 1 0 3f 15 14 13 12 11 10 9 8
docid026333 rev 4 27/33 hts221 humidity and temperature data conversion 33 step 1: temperature conversion from adc_out (lsb) to c data to build the temperature calibration curve are stored in device registers. linear interpolation (example) figure 9. step 1: linear interpolation to convert lsb to c conclusion: current temperature is 15 c. input temperature lsb (adc) output temperature (c) t0_out = 300 (msb t0_degc u t0_degc)_x8 = 80 c => 80/8 = 10.0c t1_out = 500 (msb t1_degc u t1_degc)_x8 = 160 c => 160/8 = 20.0c temperature conversion: t_out = 400 t_degc_x8 =120 c =>t_degc=120/8 = 15.0 c
humidity and temperature data conversion hts221 28/33 docid026333 rev 4 step 2: humidity conversion from adc_out (lsb) to rh % linear interpolation for relative humidity (example) figure 10. step 2: linear interpolation to convert lsb to rh% conclusion: current relative humidity value is 30%. input: relative humidity lsb (adc) output: relative humidity (% rh) h0_t0_out = 0x4000 h0_rh_x2 = 40% rh => 40/2 = 20.0% rh h1_t0_out = 0x6000 h1_rh_x2 = 80% rh => 80/2 = 40% rh humidity conversion: h_out = 0x5000 h_rh_x2 = 60% [interp.] => 60/2 = 30.0% rh /6%$'& + b 7 b 2 8 7fdo + b 7b 2 8 7phdv + b 7 b 2 8 7fdo +b5+fdo +b5+fdo +b5+phdv 5+
docid026333 rev 4 29/33 hts221 package information 33 9 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack is an st trademark. 9.1 hlga-6l package information figure 11. hlga-6l (2 x 2 x 0.9 mm) package outline and mechanical data dimensions are in millimeters unless otherwise specified. general tolerance is 0.1 mm unless otherwise specified. table 20. hlga-6l (2 x 2 x 0.9 mm) outer dimensions item dimension [mm] tolerance [mm] length [l] 2 ? 0.1 width [w] 2 ? 0.1 height [h] 0.9 ? 0.1 land size 0.30 x 0.35 0.05 : + / b$ /dqg6l]h %277209,(: 7239,(: 3lqlqglfdwru
package information hts221 30/33 docid026333 rev 4 9.2 hlga-6l packing information figure 12. carrier tape information for hlga-6l package figure 13. hlga-6l package orientation in carrier tape
docid026333 rev 4 31/33 hts221 package information 33 figure 14. reel information for carrier tape of hlga-6l package table 21. reel dimensions for carrier tape of hlga-6l package reel dimensions (mm) a (max) 330 b (min) 1.5 c 13 0.25 d (min) 20.2 n (min) 60 g 12.4 +2/-0 t (max) 18.4 $ ' % )x o o u dg l x v 7dshvorw lqfruhiru wdshvwduw ppplqzlgwk *phdvxuhgdwkxe & 1 ppplq $ffhvvkrohdw vorworfdwlrq 7
revision history hts221 32/33 docid026333 rev 4 10 revision history table 22. document revision history date revision changes 15-may-2014 1 initial release 06-apr-2015 2 document reformatted to improve readability updated: applications and device summary in cover page, table 2: pin description , section 4: application hints , section 5.1: i2c serial interface (cs = high or unconnected cs) , section 7: register description and section 8: humidity and temperature data conversion . 21-oct-2015 3 document update to align device performance confirmed in volume production 30-aug-2016 4 minor textual changes added section 9.2: hlga-6l packing information
docid026333 rev 4 33/33 hts221 33 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2016 stmicroelectronics ? all rights reserved

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