irfr/u9024n parameter typ. max. units r q jc junction-to-case CCC 3.3 r q ja junction-to-ambient (pcb mount)** CCC 50 c/w r q ja junction-to-ambient CCC 110 thermal resistance d -pak to-252aa i-pak to-251aa l ultra low on-resistance l p-channel l surface mount (IRFR9024N) l straight lead (irfu9024n) l advanced process technology l fast switching l fully avalanche rated description parameter max. units i d @ t c = 25c continuous drain current, v gs @ -10v -11 i d @ t c = 100c continuous drain current, v gs @ -10v -8 a i dm pulsed drain current ? -44 p d @t c = 25c power dissipation 38 w linear derating factor 0.30 w/c v gs gate-to-source voltage 20 v e as single pulse avalanche energy ? 62 mj i ar avalanche current ? -6.6 a e ar repetitive avalanche energy ? 3.8 mj dv/dt peak diode recovery dv/dt ? -10 v/ns t j operating junction and -55 to + 150 t stg storage temperature range soldering temperature, for 10 seconds 300 (1.6mm from case ) c absolute maximum ratings the d-pak is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. the straight lead version (irfu series) is for through- hole mounting applications. power dissipation levels up to 1.5 watts are possible in typical surface mount applications. v dss = -55v r ds(on) = 0.175 w i d = -11a s d g 2014-8-14 1 www.kersemi.com
irfr/u9024n source-drain ratings and characteristics parameter min. typ. max. units conditions i s continuous source current mosfet symbol (body diode) CCC CCC showing the i sm pulsed source current integral reverse (body diode) ? CCC CCC p-n junction diode. v sd diode forward voltage CCC CCC -1.6 v t j = 25c, i s = -7.2a, v gs = 0v ? t rr reverse recovery time CCC 47 71 ns t j = 25c, i f = -7.2a q rr reverse recovery charge CCC 84 130 nc di/dt = 100a/s ?? t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) -11 -44 a notes: ? this is applied for i-pak, l s of d-pak is measured between lead and center of die contact ? starting t j = 25c, l = 2.8mh r g = 25 w , i as = -6.6a. (see figure 12) ? repetitive rating; pulse width limited by max. junction temperature. ( see fig. 11 ) ? i sd -6.6a, di/dt 240a/s, v dd v (br)dss , t j 150c ? pulse width 300s; duty cycle 2%. s d g parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage -55 CCC CCC v v gs = 0v, i d = -250a d v (br)dss / d t j breakdown voltage temp. coefficient CCC -0.05 CCC v/c reference to 25c, i d = -1ma r ds(on) static drain-to-source on-resistance CCC CCC 0.175 w v gs = -10v, i d = -6.6a ? v gs(th) gate threshold voltage -2.0 CCC -4.0 v v ds = v gs , i d = -250a g fs forward transconductance 2.5 CCC CCC s v ds = -25v, i d = -7.2a ? CCC CCC -25 a v ds = -55v, v gs = 0v CCC CCC -250 v ds = -44v, v gs = 0v, t j = 150c gate-to-source forward leakage CCC CCC 100 v gs = 20v gate-to-source reverse leakage CCC CCC -100 na v gs = -20v q g total gate charge CCC CCC 19 i d = -7.2a q gs gate-to-source charge CCC CCC 5.1 nc v ds = -44v q gd gate-to-drain ("miller") charge CCC CCC 10 v gs = -10v, see fig. 6 and 13 ?? t d(on) turn-on delay time CCC 13 CCC v dd = -28v t r rise time CCC 55 CCC i d = -7.2a t d(off) turn-off delay time CCC 23 CCC r g = 24 w t f fall time CCC 37 CCC r d = 3.7 w, see fig. 10 ?? between lead, CCC CCC 6mm (0.25in.) from package and center of die contact ? c iss input capacitance CCC 350 CCC v gs = 0v c oss output capacitance CCC 170 CCC pf v ds = -25v c rss reverse transfer capacitance CCC 92 CCC ? = 1.0mhz, see fig. 5 ? nh electrical characteristics @ t j = 25c (unless otherwise specified) l d internal drain inductance l s internal source inductance CCC CCC i gss ns 4.5 7.5 i dss drain-to-source leakage current s d g ? uses irf9z24n data and test conditions. 2014-8-14 2 www.kersemi.com
fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics 0.1 1 10 100 0.1 1 10 100 20s pulse width t = 25 c j top bottom vgs -15v -10v -8.0v -7.0v -6.0v -5.5v -5.0v -4.5v -v , drain-to-source voltage (v) -i , drain-to-source current (a) ds d -4.5v 0.1 1 10 100 0.1 1 10 100 20s pulse width t = 150 c j top bottom vgs -15v -10v -8.0v -7.0v -6.0v -5.5v -5.0v -4.5v -v , drain-to-source voltage (v) -i , drain-to-source current (a) ds d -4.5v -60 -40 -20 0 20 40 60 80 100 120 140 160 0.0 0.5 1.0 1.5 2.0 2.5 t , junction temperature ( c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d -10v -11a 0.1 1 10 100 4 5 6 7 8 9 10 v = -25v 20s pulse width ds -v , gate-to-source voltage (v) -i , drain-to-source current (a) gs d t = 150 c j t = 25 c j irfr/u9024n 2014-8-14 3 www.kersemi.com
fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 0.1 1 10 100 0.2 0.6 0.9 1.3 1.6 -v ,source-to-drain voltage (v) -i , reverse drain current (a) sd sd v = 0 v gs t = 25 c j t = 150 c j 0.1 1 10 100 1000 1 10 100 operation in this area limited by r ds(on) single pulse t t = 150 c = 25 c j c -v , drain-to-source voltage (v) -i , drain current (a) i , drain current (a) ds d 10us 100us 1ms 10ms 0 100 200 300 400 500 600 700 1 10 100 c, capacitance (pf) ds v , drain-to-source voltage (v) a v = 0v , f = 1mh z c = c + c , c shorted c = c c = c + c gs iss gs gd ds rss gd oss ds gd c is s c oss c rs s 0 4 8 12 16 20 0 5 10 15 20 25 g gs a -v , gate-to-s ource v oltage (v ) q , total g ate charge (nc) for test circuit see figure 13 i = -7 .2a v = -44 v v = -28 v d ds ds irfr/u9024n 2014-8-14 4 www.kersemi.com
fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature fig 10a. switching time test circuit fig 10b. switching time waveforms v ds -10v pulse width 1 s duty factor 0.1 % r d v gs v dd r g d.u.t. + - v ds 90% 10% v gs t d(on) t r t d(off) t f 25 50 75 100 125 150 0.0 3.0 6.0 9.0 12.0 t , case temperature ( c) -i , drain current (a) c d 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response) irfr/u9024n 2014-8-14 5 www.kersemi.com
fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current q g q gs q gd v g charge -10v d.u.t. v ds i d i g -3ma v gs .3 m f 50k w .2 m f 12v current regulator same type as d.u.t. current sampling resistors + - fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 w t p d.u.t l v ds v dd driver a 15v -20v - + v dd 25 50 75 100 125 150 0 20 40 60 80 100 120 starting t , junction temperature ( c) e , single pulse avalanche energy (mj) j as i d top bottom -3.0a -4.2a -6.6a irfr/u9024n 2014-8-14 6 www.kersemi.com
peak diode recovery dv/dt test circuit p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - ? ? ? r g v dd dv/dt controlled by r g i sd controlled by duty factor "d" d.u.t. - device under test d.u.t * circuit layout considerations low stray inductance ground plane low leakage inductance current transformer ? * reverse polarity of d.u.t for p-channel v gs [ ] [ ] *** v gs = 5.0v for logic level and 3v drive devices [ ] *** fig 14. for p-channel hexfets irfr/u9024n 2014-8-14 7 www.kersemi.com
package outline to-252aa outline dimensions are shown in millimeters (inches) to-252aa (d-pak) part marking information 6.73 (.265) 6.35 (.250) - a - 4 1 2 3 6.22 (.245) 5.97 (.235) - b - 3x 0.89 (.035) 0.64 (.025) 0.25 (.010) m a m b 4.57 (.180) 2.28 (.090) 2x 1.14 (.045) 0.76 (.030) 1.52 (.060) 1.15 (.045) 1.02 (.040) 1.64 (.025) 5.46 (.215) 5.21 (.205) 1.27 (.050) 0.88 (.035) 2.38 (.094) 2.19 (.086) 1.14 (.045) 0.89 (.035) 0.58 (.023) 0.46 (.018) 6.45 (.245) 5.68 (.224) 0.51 (.020) min . 0.58 (.023) 0.46 (.018) lead assignments 1 - g at e 2 - d r a in 3 - s ou r ce 4 - d r a in 10.42 (.410) 9.40 (.370) notes: 1 dimensioning & tolerancing per ansi y14.5m, 1982. 2 controlling dimension : inch. 3 conforms to jedec outline to-252aa. 4 dimensions shown are before sold er dip, solder dip max. +0.16 (.006). international rect ifier lo g o assembly l o t code example : this is an irfr120 w ith assembly lot code 9u1p first portion of part number second portion of part number 120 irfr 9 u 1p a irfr/u9024n 2014-8-14 8 www.kersemi.com
package outline to-251aa outline dimensions are shown in millimeters (inches) to-251aa (i-pak) part marking information inte rnatio nal rectifier lo go assembly lo t co de first portion of part number second portion of part number 120 9u 1 p example : this is an irfu120 w ith assembly lo t co de 9u1p irfu 6.73 (.265) 6.35 (.250) - a - 6.22 (.245) 5.97 (.235) - b - 3x 0.89 (.035) 0.64 (.025) 0.25 (.010) m a m b 2.28 (.090) 1.14 (.045) 0.76 (.030) 5.46 (.215) 5.21 (.205) 1.27 (.050) 0.88 (.035) 2.38 (.094) 2.19 (.086) 1.14 (.045) 0.89 (.035) 0.58 (.023) 0.46 (.018) lead assignments 1 - g at e 2 - d r a in 3 - source 4 - d r a in notes: 1 dimensioning & tolerancing per ansi y14.5m, 1982. 2 controlling dimension : inch. 3 conforms to jedec outline to-252aa. 4 dimensions show n are before solder dip, solder dip max. +0.16 (.006). 9.65 (.380) 8.89 (.350) 2x 3x 2.28 (.090) 1.91 (.075) 1.52 (.060) 1.15 (.045) 4 1 2 3 6.45 (.245) 5.68 (.224) 0.58 (.023) 0.46 (.018) irfr/u9024n 2014-8-14 9 www.kersemi.com
tape & reel information to-252aa tr 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) 12.1 ( .476 ) 11.9 ( .469 ) feed direction feed direction 16.3 ( .641 ) 15.7 ( .619 ) trr trl n otes : 1. contro lling dimension : millimeter. 2. all dimensions are show n in millimeters ( inches ). 3. outline con for ms to eia-481 & eia-541. notes : 1. outline conforms to eia-481. 16 mm 13 inc h 2014-8-14 10 www.kersemi.com irfr/u9024n
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