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product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays 1/23 datashee t tsz22111 ? 14 ? 001 ? 2012 rohm co., ltd. all rights reserved. tsz02201-0r2r0g100490-1-2 05.sep.2012 rev.001 www.rohm.com serial eeprom series standard eeprom wlcsp eeprom bu9889gul-w (8kbit) general description bu9889gul-w is a serial eeprom of i 2 c bus interface method. features completely conforming to the world standard i 2 c bus. all controls available by 2 ports of serial clock (scl) and serial data (sda) 1k words 8 bits architecture 8kbit serial eeprom. other devices than eeprom can be connected to the same port, saving microcontroller port. 1.7v to 5.5v single power source action most suitable for battery use. fast mode 400khz at 1.7v to 5.5v page write mode useful for initial value write at factory shipment. auto erase and auto end function at data rewrite. low current consumption ? at write operation (5v) : 0.5ma (typ.) ? at read operation (5v) : 0.2ma (typ.) ? at standby operation (5v) : 0.1a (typ.) write mistake prevention function ? write (write protect) function added ? write mistake prevention function at low voltage data rewrite up to 100,000 times data kept for 40 years noise filter built in scl / sda terminal shipment data all address ffh package w(typ.) x d(typ.) x h(max.) absolute maximum ratings (ta=25 ) parameter symbol limits unit remarks impressed voltage v cc -0.3 to +6.5 v permissible dissipation pd 220 mw when using at ta=25 or higher, 2.2mw to be reduced per 1 storage temperature range tstg -65 to +125 action temperature range topr -40 to +85 terminal voltage - -0.3 to v cc +1.0 v memory cell characteristics (ta=25 , vcc=1.7v to 5.5v) limits parameter min. typ. max. unit number of data rewrite times *1 100,000 - - times data hold years *1 40 - - years shipment data all address ffh *1 not 100% tested recommended operating ratings parameter symbol limits unit power source voltage v cc 1.7 to 5.5 input voltage v in 0 to v cc v vcsp50l1 1.60mm x 1.00mm x 0.55mm downloaded from: http:///
2/23 datasheet datasheet bu9889gul-w (8kbit) ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 05.sep.2012 rev.001 tsz02201-0r2r0g100490-1-2 electrical characteristics (unless otherwise specified ta=-40 to +85 , vcc=1.7v to 5.5v) limits parameter symbol min typ. max. unit condition "h" input voltage1 v ih1 0.7v cc - v cc +1.0 v "l" input voltage1 v il1 -0.3 - 0.3v cc v "l" output voltage1 v ol1 - - 0.4 v i ol =3.0ma , 2.5v v cc 5.5v (sda) "l" output voltage2 v ol2 - - 0.2 v i ol =0.7ma , 1.7v v cc 2.5v (sda) input leakage current i li -1 - 1 av in =0 to v cc output leakage current i lo -1 - 1 av out =0 to v cc (sda) i cc1 - - 2.0 ma v cc =5.5v, fscl =400khz, twr=5ms byte write, page write current consumption at action i cc2 - - 0.5 ma v cc =5.5v, fscl =400khz random read, current read, sequential read standby current i sb - - 2.0 a v cc =5.5v, sda ? scl=v cc a2=gnd, wp=gnd action timing characteristics (unless otherwise specified ta=-40 to +85 , vcc=1.7v to 5.5v) limits parameter symbol min. typ. max. unit scl frequency fscl - - 400 khz data clock "high" time thigh 0.6 - - s data clock "low" time tlow 1.2 - - s sda, scl rise time *1 tr - - 0.3 s sda, scl fall time *1 tf - - 0.3 s start condition hold time thd:sta 0.6 - - s start condition setup time tsu:sta 0.6 - - s input data hold time thd:dat 0 - - ns input data setup time tsu:dat 100 - - ns output data delay time tpd 0.1 - 0.9 s output data hold time tdh 0.1 - - s stop condition data setup time tsu:sto 0.6 - - s bus release time before transfer start tbuf 1.2 - - s internal write cycle time twr - - 5 ms noise removal valid period (sda,scl terminal) ti - - 0.1 s wp hold time thd:wp 0 - - ns wp setup time tsu:wp 0.1 - - s wp valid time thigh:wp 1.0 - - s *1 : not 100% tested downloaded from: http:/// 3/23 datasheet datasheet bu9889gul-w (8kbit) ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 05.sep.2012 rev.001 tsz02201-0r2r0g100490-1-2 a a a t aa sync data input / output timing sda tsu:sta tsu:sto thd:sta start bit stop bit scl figure 1-(b) start - stop bit timing figure 1-(c) write cycle timing figure 1-(d) wp timing at write execution figure 1-(e) wp timing at write cancel at write execution, in the area from the d0 taken clock rise of the first data(1), to twr, set wp= 'low'. by setting wp "high" in the area, write can be cancelled. when it is set wp = 'high' during twr, write is forcibly ended, and data of address under access is not guaranteed, therefore write it once again. input read at the rise edge of scl data output in sync with the fall of scl figure 1-(a) sync data input / output timing sda () sda () thd:sta thd:dat tsu:dat tbuf tpd tdh tlow thigh tr tf scl (input) (output) sclsda wp hd wp ???? wr d1 d0 a ck a ck data(1) data(n) tsu wp stop condition thigh:wp wp sda d1 d0 ack ack data(1) data(n) twr scl downloaded from: http:/// 4/23 datasheet datasheet bu9889gul-w (8kbit) ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 05.sep.2012 rev.001 tsz02201-0r2r0g100490-1-2 a1 block diagram pin configuration (bottom view) pin descriptions terminal name input/ output function a2 input slave address setting gnd - reference voltage of all input / output, 0v. sda input / output slave and word address, serial data input serial data output scl input serial clock input wp input write protect terminal vcc - connect the power source. a a aay a a a aa a it it it a a b a 1 3 b1 sda gnd a2 v cc wp scl 2 a3 a2 b2 b3 v cc gnd downloaded from: http:/// 5/23 datasheet datasheet bu9889gul-w (8kbit) ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 05.sep.2012 rev.001 tsz02201-0r2r0g100490-1-2 typical performance curves (the following values are typ. ones.) figure 2. h input voltage v ih (a2, scl, sda, wp) figure 3. l input voltage v il (a2, scl, sda, wp) figure 4. l output voltage v ol -i ol (vcc=1.7v) figure 5. l output voltage v ol -i ol (vcc=2.5v) downloaded from: http:/// 6/23 datasheet datasheet bu9889gul-w (8kbit) ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 05.sep.2012 rev.001 tsz02201-0r2r0g100490-1-2 typical performance curves \ continued figure 6. input leak current i li (a2, scl, wp) figure 7. output leak current i l0 (sda) figure 8. current consumption at write operation i cc 1 (fscl=400khz) figure 9. current consumption at read operation i cc 2 (fscl=400khz) downloaded from: http:/// 7/23 datasheet datasheet bu9889gul-w (8kbit) ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 05.sep.2012 rev.001 tsz02201-0r2r0g100490-1-2 typical performance curves \ continued figure 10. standby operation i sb figure 11. scl frequency f scl figure 12. data clock high period t high figure 13. data clock low period t low downloaded from: http:/// 8/23 datasheet datasheet bu9889gul-w (8kbit) ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 05.sep.2012 rev.001 tsz02201-0r2r0g100490-1-2 typical performance curves \ continued figure 14. start condition hold time t hd:sta figure 15. start condition setup time t su:sta figure 17. input data hold time t hd:dat (low) figure 16. input data hold time t hd:dat (high) thd:dat(ns) downloaded from: http:/// 9/23 datasheet datasheet bu9889gul-w (8kbit) ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 05.sep.2012 rev.001 tsz02201-0r2r0g100490-1-2 typical performance curves \ continued figure 18. input data setup time t su:dat (high) figure 19. input data setup time t su:dat (low) figure 20. l data output delay time t pd 0 figure 21. h data output delay time t pd 1 downloaded from: http:/// 10/23 datasheet datasheet bu9889gul-w (8kbit) ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 05.sep.2012 rev.001 tsz02201-0r2r0g100490-1-2 typical performance curves \ continued figure 22. bus open time before transmission t buf figure 23. internal writing cycle time t wr figure 24. noise reduction effective time t1 (scl h) effective figure 25. noise reduction effective time t i (scl l) effective downloaded from: http:/// 11/23 datasheet datasheet bu9889gul-w (8kbit) ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 05.sep.2012 rev.001 tsz02201-0r2r0g100490-1-2 typical performance curves \ continued figure 26. noise reduction effective time t i (sdah) figure 28. wp setup time t su:wp figure 29. wp effective time t high:wp figure 27. noise reduction effective time t i (sda l) sda downloaded from: http:/// 12/23 datasheet datasheet bu9889gul-w (8kbit) ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 05.sep.2012 rev.001 tsz02201-0r2r0g100490-1-2 i 2 c bus communication i 2 c bus data communication i 2 c bus data communication starts by start condition input, and ends by stop condition input. data is always 8bit long, and acknowledge is always required after each byte. i 2 c bus carries out data transmission with plural devices c onnected by 2 communication lines of serial data (sda) and serial clock (scl). among devices, there are master that generates clock and control communication start and end, and slave that is controlled by addresses peculiar to devices. eeprom becomes slave. and the devic e that outputs data to bus during data communication is ca lled transmitter, and the device that receives data is called receiver. start condition (start bit recognition) ? before executing each command, start condition (start bit) where sda goes from 'high' down to 'low' when scl is 'high' is necessary. ? this ic always detects whether sda and scl are in start conditi on (start bit) or not, theref ore, unless this condition is satisfied, any command is executed. stop condition (stop bit recognition) ? each command can be ended by sda rising from 'low' to 'high' when stop condition (stop bit), namely, scl is 'high' acknowledge (ack) signal ? this acknowledge (ack) signal is a software rule to show whether data transfer has been made normally or not. in master and slave, the device (-com at slave address input of write command, read co mmand, and this ic at data output of read command) at the transmitter (sending) side re leases the bus after output of 8bit data. ? the device (this ic at slave address input of write co mmand, read command, and - com at data output of read command) at the receiver (receiving) side sets sda 'low' during 9 clock cycles, and outputs acknowledge signal (ack signal) showing that it has received the 8bit data. ? this ic, after recognizing start condition and slave address (8bit), outputs acknowledge signal (ack signal) 'low'. ? each write action outputs acknowledge signal) (ack signal) 'low ', at receiving 8bit data (word address and write data). ? each read action outputs 8bit data (read data), and detects acknowledge signal (ack signal) 'low'. ? when acknowledge signal (ack signal) is detected, and stop condition is not sent from the master (-com) side, this ic continues data output. when acknowledge signal (ack signal) is not detected, this ic stops data transfer, and recognizes stop condition (stop bit), and ends read ac tion. and this ic gets in standby status. device addressing ? following a start condition, the master output the slave address to be accessed. ? the most significant four bits of the slav e address are the device type indentifier, for this device it is fixed as 1010. ? the next bit (device address) identify the specified device on the bus. the device address is defined by the state of a2 input pin. this ic works only when the device address inputted from sda pin correspond to the state of a2 input pin. using this address scheme, up to two devices may be connected to the bus. ? the next two bits (p1, p0) are used by the mast er to select four 256 word page of memory. p1, p0 set to 0 0 ??? 1page (000 to 0ff) p1, p0 set to 0 1 ??? 1page (100 to 1ff) p1, p0 set to 1 0 ??? 1page (200 to 2ff) p1, p0 set to 1 1 ??? 1page (300 to 3ff) ? the last bit of the stream (r/w read/write) determines the operation to be performed. when set to 1, a read operation is selected ; when set to 0, a write operation is selected. r/w set to 0 ??? write (including word address input of random read) r/w set to 1 ??? read 1 0 1 0 a2 p1 p0 r/w D figure 30. data transfer timing iti iti a a aa aa a a a a downloaded from: http:/// 13/23 datasheet datasheet bu9889gul-w (8kbit) ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 05.sep.2012 rev.001 tsz02201-0r2r0g100490-1-2 write command write cycle ? arbitrary data is written to eeprom. when to write only 1 by te, byte write normally used, and when to write continuous data of 2 bytes or more, simultaneous write is possible by page write cycle. ? data is written to the address designated by word address (n-th address). ? by issuing stop bit after 8bit data input, write to memory cell inside starts. ? when internal write is started, command is not accepted for twr (5ms at maximum). ? by page write cycle, the following can be written in bulk: up to 16 bytes and when data of the maximum bytes or higher is sent, data from the first byte is overwritten. (refer to "internal address increment " in pape14.) ? as for page write command, after page select bit(ps) of slave addr ess is designated arbitrarily, by continuing data input of 2 bytes or more, the address of insignificant 4 bits is in cremented internally, and data up to 16 bytes can be written. notes on write cycle continuous input p1 a2 w a 7 d7 1 1 0 0 w r i t e s t a r t r / w st o p word addr ess dat a slave address p0 wa 0 d0 a c k sd a line a c k a c k figure 31. byte write cycle figure 32. page write cycle a a a a a a a aa 5 a a a a a a a ne xt com man d tw r(maximum 5m s) co mma nd is n ot a cce pt ed fo r th is period. at s to p (s to p bit ) write starts. a figure 33. page write cycle w r i t e s t a r t r / w a c k s t o p word address(n) data(n) sda line a c k a c k data(n+15) a c k slave address 1 0 0 1 p0 p1 a2 wa 7 d0 d7 d0 wa 0 downloaded from: http:/// 14/23 datasheet datasheet bu9889gul-w (8kbit) ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 05.sep.2012 rev.001 tsz02201-0r2r0g100490-1-2 notes on page write cycle maximum page number is 16 bytes for this ic. any bytes below these can be written. the page write cycle write time is 5ms at maximum for 16byte bulk write. it does not stand 5ms at maximum 16byte = 80ms(max.). internal address increment page write mode write protect (wp) terminal ? write protect (wp) function when wp terminal is set vcc (h level), data rewrite of all address is prohibited. when it is set gnd (l level), data rewrite of all address is enabled. be sure to connect this terminal to vcc or gnd, or control it to h leve l or l level. do not use it o pen. at extremely low voltage at power on/off, by setting the wp terminal 'h', mistake write can be prevented. during twr, set the wp terminal al ways to 'l'. if it is set 'h ', write is forcibly terminated. for example, when it is st arted from address 0eh, therefore, increment is made as below, 0eh 0fh 00h 01h ??? , which please note. * 0eh ??? 16 in hexadecimal, therefore, 00001110 becomes a binary number. --------- --------- significant bit is fixed. no di g it u p wa7 ----- wa4 wa3 wa2 wa1 wa0 0 ----- 0 0 0 0 0 0 ----- 0 0 0 0 1 0 ----- 0 0 0 1 0 0 ----- 0 1 1 1 0 0 ----- 0 1 1 1 1 0 ----- 0 0 0 0 0 0eh increment downloaded from: http:/// 15/23 datasheet datasheet bu9889gul-w (8kbit) ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 05.sep.2012 rev.001 tsz02201-0r2r0g100490-1-2 read command read cycle data of eeprom is read. in read cycle, there are random read cycle and current read cycle. random read cycle is a command to read data by designating address, and is used generally. current read cycle is a command to read data of internal addr ess register without designating address, and is used when to verify just after write cycle. in both the read cycles, sequential read cycle is available, and the next address data can be read in succession. ? in random read cycle, data of designated word address can be read. ? when the command just before current read cycle is random read cycle, current read cycle (each including sequential read cycle), data of incremented last read address (n)-t h address, i.e., data of t he (n+1)-th address is output. ? when ack signal 'low' after d0 is detected, and stop condition is not sent from master (-com) side, the next address data can be read in succession. ? read cycle is ended by stop condition where 'h' is input to ack signal after d0 and sda signal is started at scl signal 'h'. ? when 'h' is not input to ack signal after d0, seque ntial read gets in, and the next data is output. therefore, read command cycle cannot be ended. when to end read command cycle, be sure input stop condition to input 'h' to ack signal after d0, and to start sda at scl signal 'h'. ? sequential read is ended by stop condition w here 'h' is input to ack signal after arbitrary d0 and sda is started at scl signal 'h'. w r i t e s t a r t r / w a c k s t o p word add ress(n) sd a line a c k a c k data(n) a c k slave address 10 0 1 p0 p1 a2 wa 7 p0 d0 slave address 10 0 1p1 a2 s t a r t d7 r / w r e a d wa 0 figure 34. random read cycle figure 35. current read cycle s t a r t st o p sda line a c k data(n) a c k slav e address 10 0 1 p0 p1 a2 d0 d7 r / w r e a d a a a aa a a a aax a a a a figure 36. sequential read cycle (in the case of current read cycle) it is necessary to input 'h' to the last ack. it is necessary to input 'h' to the last ack. downloaded from: http:/// 16/23 datasheet datasheet bu9889gul-w (8kbit) ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 05.sep.2012 rev.001 tsz02201-0r2r0g100490-1-2 software reset software reset is executed when to avoid malfunction after po wer on, and to reset during command input. software reset has several kinds, and 3 kids of them are shown in the figure below. (refer to figure 37-(a), figure 37-(b), figure 37-(c).) in dummy clock input area, release the sda bus ('h' by pull up) . in dummy clock area, ack output and read data '0' (both 'l' level) may be output from eeprom, therefor e, if 'h' is input forcibly, output may conflict and over current may flow, leading to instantaneous power failure of system power source or influence upon devices. acknowledge polling during internal write, all input commands are ignored, theref ore ack is not sent back. during internal automatic write execution after write cycle input, next command (slave address) is sent, and if the first ack signal sends back 'l', then it means end of write action, while if it s ends back 'h', it means now in writing. by use of acknowledge polling, next command can be executed without waiting for twr = 5ms. when to write continuously, r/w = 0, when to carry out current re ad cycle after write, slave address r/w = 1 is sent, and if ack signal sends back 'l', then execute word address input and data so forth. slave address word address s t a r t first write command a c k h a c k l slave address slave address slave address data write command during internal write, ack = high is sent back. after completion of internal write, ack=low is sent back, so input next word address and data in succession. t wr t wr second write command s t a r t st a r t s t a r t s t a r t s t o p st o p a c k h a c k h a c k l a c k l figure 38. case to continuously write by acknowledge polling scl 2 1 8 9 dummy clock9 start figure 37-(b) the case of start+9 dummy clock + start + command input start normal command normal command sda 1 2 13 14 scl figure 37-(a) the case of 14 dummy clock + start + start+ command input normal command normal command dummy clock14 start2 * start command from start input. start9 figure 37-(c) start 9 + command input scl 1 2 3 8 9 7 sda sda normal command normal command downloaded from: http:/// 17/23 datasheet datasheet bu9889gul-w (8kbit) ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 05.sep.2012 rev.001 tsz02201-0r2r0g100490-1-2 wp valid timing (write cancel) wp is usually fixed to 'h' or 'l', but when wp is used to canc el write cycle and so forth, pay attention to the following wp valid timing. during write cycle execution, in cancel valid area, by setting wp='h', write cycle can be cancelled. in both byte write cycle and page write cycle, the area from the first start c ondition of command to the rise of clock to taken in d0 of dat a (in page write cycle, the first byte data) is cancel invalid area. wp input in this area becomes don't care. set the setup time to rise of d0 taken 100ns or more. the area from the rise of scl to take in d0 to the end of internal automatic write (twr) is cancel valid area. and, when it is set wp='h' during twr, write is ended forcibly, data of address under access is not guar anteed, therefore, wr ite it once again.(refer to figure 39.) after execution of forced end by wp standby status gets in, so there is no need to wait for twr (5ms at maximum). command cancel by start condition and stop condition during command input, by continuously inputting start c ondition and stop condition, command can be cancelled. (refer to figure 40.) however, in ack output area and during data read, sda bus ma y output 'l', and in this case, start condition and stop condition cannot be input, so reset is not available. therefore, execute software reset. and when command is cancelled by start, stop condition, during random read cycle, sequential read cycle, or current read cycle, internal setting address is not determined, therefore, it is not possible to carry out curre nt read cycle in succession. when to carry out read cycle in succession, carry out random read cycle. figure 39. wp valid timing ? rise of d0 taken clock scl d0 ack enlarged view scl sda enlarged view ack d0 ? rise of sda sda wp wp cancel invalid area wp cancel valid area write forced end data is not written. data not guaranteed slave address d7 d6 d5 d4 d3 d2 d1 d0 data twr sda d1 s t a r t a c k l a c k l a c k l a c k l s t o p word address figure 40. case of cancel by start, stop condition during slave address input scl sda 1 1 0 0 start condition stop condition downloaded from: http:/// 18/23 datasheet datasheet bu9889gul-w (8kbit) ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 05.sep.2012 rev.001 tsz02201-0r2r0g100490-1-2 i/o peripheral circuit pull up resistance of sda terminal sda is nmos open drain, so requires pull up resistance. as for this resistance value (r pu ), select an appropriate value to this resistance value from microcontroller v il , i l , and v ol -i ol characteristics of this ic. if r pu is large, action frequency is limited. the smaller the r pu , the larger the consumption current at action. maximum value of r pu the maximum value of r pu is determined by the following factors. (1)sda rise time to be determined by the capacitance (cbus) of bus line of r pu and sda should be t r or below. and ac timing should be satisfied even when sda rise time is late. (2)the bus electric potential a to be determined by input leak total (i l ) of device connected to bus output of 'h' to sda bus and r pu should sufficiently secure the input 'h' level (v ih ) of microcontroller and eeprom including recommended noise margin 0.2vcc. minimum value of r pu the minimum value of r pu is determined by the following factors. (1)when ic outputs low, it should be satisfied that v olmax =0.4v and i olmax =3ma. (2)v olmax =0.4v should secure the input 'l' level (v il ) of microcontroller and eeprom including recommended noise margin 0.1vcc. v olmax v il -0.1 vcc ex.) when vcc= 3v, v ol 0.4v, i ol =3ma, microcontroller, eeprom v il =0.3vcc from(1), and therefore, the condition (2) is satisfied. pull up resistance of scl terminal when scl control is made at cmos output port, there is no need, but in the case there is timing where scl becomes 'hi-z', add a pull up resistance. as for the pull up resistance, one of several k to several ten k is recommended in consideration of drive performance of output port of microcontroller. a2, wp process process of device address terminals (a2) check whether the set device address coincides with device address input sent from the master side or not, and select one among plural devices connected to a same bus. connect this terminal to pull up or pull down, or vcc or gnd. process of wp terminal wp terminal is the terminal that prohibits and permits write in hardware manner. in 'h' status, only read is available and write of all address is prohibited. in the case of 'l', both are available. in the case of use it as an rom, it is recommended to connect it to pull up or v cc. in the case to use both read and write, control wp terminal or connect it to pull down or gnd. v cc v o l r pu i ol r pu v cc v ol i ol 867 ?? r pu 3 0.4 310 v ol =0.4 v v il =0.3 3 =0.9 v r pu 0.8v cc v ih i l 300 k ? r pu 0.83 0.73 1010 -6 ex.) when vcc = 3v, i l =10 a, v ih = 0.7vcc, from (2) vcc - i l r pu - 0.2vcc v ih bus line capacity cbus figure 41. i/o circuit diagram r pu a b u 9889gul-w sda terminal il il microcontroller downloaded from: http:/// 19/23 datasheet datasheet bu9889gul-w (8kbit) ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 05.sep.2012 rev.001 tsz02201-0r2r0g100490-1-2 cautions on microcontroller connection rs in i 2 c bus, it is recommended that sda port is of open drain input/output. however, when to use cmos input / output of tri state to sda port, insert a series resistance rs between the pull up resistance rpu and the sda terminal of eeprom. this is controls over current that occurs when pmos of the microcontro ller and nmos of eeprom are turned on simultaneously. rs also plays the role of protection of sda terminal against surge. therefore, even when sda port is open drain input/output, rs can be used. maximum value of rs the maximum value of rs is determined by following relations. (1)sda rise time to be determined by the capacity (cbus) of bus line of rpu and sda shoulder be t r or below. and ac timing should be satisfied even when sda rise time is late. (2)the bus electric potential a to be determined by rpu and rs the moment when eeprom outputs 'l' to sda bus should sufficiently secure the input 'l' level (v il ) of microcontroller including recommended noise margin 0.1vcc. maximum value of rs the minimum value of rs is determined by over current at bus collision. when over current flows, noises in power source line, and instantaneous power failure of power source may occur. when allowable over current is defined as i, the following relation must be satisfied. determine the allowable current in consideration of impedance of power source line in set and so forth. set the over current to eeprom 10ma or below. figure 43. input/output collision timing fr (v cc v ol )r s +v ol +0.1v cc v il r s r pu v il v ol 0.1v cc 1.1v cc v il 2010 3 1.67 k ? r pu +r s example when v cc =3v, v il =0.3v cc, v ol =0.4v, r pu =20k , 1.13 0.33 0.33 0.4 0.13 r s r pu microcontroller r s eeprom i ol a bus line capacity cbus v ol v cc v il figure 44. i/o circuit diagram microcontroller eeprom 'l' output r s r pu 'h' output over current figure 45. i/o circuit diagram v cc r s v cc i 300 ?? example when v cc =3v, i=10ma r s 3 1010 -3 i r s figure 42. i/o circuit diagram r pu microcontroller r s eeprom ack 'l' output of eeprom 'h' output of microcontroller over current flows to sda line by 'h' output of microcontroller and 'l' output of eeprom. scl sda downloaded from: http:/// 20/23 datasheet datasheet bu9889gul-w (8kbit) ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 05.sep.2012 rev.001 tsz02201-0r2r0g100490-1-2 tl ow tsu:dat tdh after vcc becomes stable scl v cc sda tsu:dat after vcc becom es stab le i 2 c bus input / output circuit input (a2, scl, wp) input/output (sda) notes on power on at power on, in ic internal circuit and set, vcc rises through unstable low voltage area, and ic inside is not completely reset , and malfunction may occur. to prevent this, functions of po r circuit and lvcc circuit are equipped. to assure the action, observe the following condition at power on. 1. set sda = 'h' and scl ='l' or 'h' 2. start power source so as to satisfy the recommended conditions of t r , t off , and vbot for operating por circuit. recommended conditions of t r , t off , vbot t r t off vbot 10ms or below 10ms or longer 0.3v or below 100ms or below 10ms or longer 0.2v or below 3. set sda and scl so as not to become 'hi-z'. when the above conditions 1 and 2 cannot be obs erved, take the following countermeasures. a) in the case when the above conditions 1 cann ot be observed. when sda becomes 'l' at power on. control scl and sda as shown below, to make scl and sda, 'h' and 'h'. figure 49. when scl='h' and sda='l' figure 50. when scl='h' and sda='l' b) in the case when the above condition 2 cannot be observed. after power source becomes stable, execute software reset(page 16). c) in the case when the above conditions 1 and 2 cannot be observed. carry out a), and then carry out b). figure 46. input pin circuit diagram figure 47. input /output pin circuit diagram t off t r vbo t 0 v cc figure 48. rise waveform diagram downloaded from: http:/// 21/23 datasheet datasheet bu9889gul-w (8kbit) ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 05.sep.2012 rev.001 tsz02201-0r2r0g100490-1-2 low voltage malfunction prevention function lvcc circuit prevents data rewrite action at low power, and prevents wrong write. at lvcc voltage (typ. =1.2v) or below, it prevent data rewrite. vcc noise countermeasures bypass capacitor when noise or surge gets in the power source line, malfunction may occur, therefore, for removing these, it is reco mmended to attach a bypass capacitor (0.1f) between ic vcc and gnd. at that moment, attach it as close to ic as possible. and, it is also recommended to attach a bypass capacitor between board vcc and gnd. cautions on use (1)described numeric values and data are design representative values, and the values are not guaranteed. (2)we believe that application circuit examples are recommendable, however, in actual use, confirm characteristics further sufficiently. in the case of use by changing the fixed number of external parts, make your decision with sufficient margin in consideration of static characteristics and transition charac teristics and fluctuations of external parts and our lsi. (3)absolute maximum ratings if the absolute maximum ratings such as impressed voltage and action temperature range and so forth are exceeded, lsi may be destructed. do not impress voltage and temperature exceeding the absolute maximum ratings. in the case of fear exceeding the absolute maximum ratings, take physical safety countermeasures such as fuses, and see to it that conditions exceeding the absolute maximum ratings should not be impressed to lsi. (4)gnd electric potential set the voltage of gnd terminal lowest at any action condition. make sure that each terminal voltage is lower than that of gnd terminal. (5)terminal design in consideration of permissible loss in actual use condition, carry out heat design with sufficient margin. (6)terminal to terminal shortcircuit and wrong packaging when to package lsi onto a board, pay sufficient attention to lsi direction and displacement. wrong packaging may destruct lsi. and in the case of shortcircuit between lsi terminals and terminals and power source, terminal and gnd owing to foreign matter, lsi may be destructed. (7)use in a strong electromagnetic field may cause malfunction, therefore, evaluate design sufficiently. status of this document the japanese version of this document is formal specification. a customer may use this translation version only for a reference to help reading the formal version. if there are any differences in translation version of this document formal version takes priority. downloaded from: http:/// 22/23 datasheet datasheet bu9889gul-w (8kbit) ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 05.sep.2012 rev.001 tsz02201-0r2r0g100490-1-2 ordering information b u 9 8 8 9 g u l - w e 2 part number package gul: vcsp50l1(bu9889gul-w) packaging and forming specification e2: embossed tape and reel physical dimension tape and reel information marking diagram (unit : mm ) v csp50l1 (bu9889gul-w) s 0.06 s a b ba 0.05 1pin mark 3 0.30 6- 0.250.05 1.600.05 2 ( 0.15)index post 1 0.25 b 0.55max 1.000.05 a 0.100.05 0.5 p=0.5 2 ? order quantity needs to be multiple of the minimum quantity. 23/23 datasheet datasheet bu9889gul-w (8kbit) ? 2012 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 05.sep.2012 rev.001 tsz02201-0r2r0g100490-1-2 revision history date revision changes 05.sep.2012 001 new release downloaded from: http:/// datasheet d a t a s h e e t notice - ge rev.002 ? 2014 rohm co., ltd. all rights reserved. notice precaution on using rohm products 1. our products are designed and manufac tured for application in ordinary elec tronic equipments (such as av equipment, oa equipment, telecommunication equipment, home electroni c appliances, amusement equipment, etc.). if you intend to use our products in devices requiring ex tremely high reliability (such as medical equipment (note 1) , transport equipment, traffic equipment, aircraft/spacecra ft, nuclear power controllers, fuel c ontrollers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property (specific applications), please consult with the rohm sale s representative in advance. unless otherwise agreed in writing by rohm in advance, rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ro hms products for specific applications. (note1) medical equipment classification of the specific applications japan usa eu china class class class b class class class 2. rohm designs and manufactures its products subject to strict quality control system. however, semiconductor products can fail or malfunction at a certain rate. please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe desi gn against the physical injury, damage to any property, which a failure or malfunction of our products may cause. the following are examples of safety measures: [a] installation of protection circuits or other protective devices to improve system safety [b] installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. our products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditio ns, as exemplified below. accordin gly, rohm shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of an y rohms products under any special or extraordinary environments or conditions. if you intend to use our products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] use of our products in any types of liquid, incl uding water, oils, chemicals, and organic solvents [b] use of our products outdoors or in places where the products are exposed to direct sunlight or dust [c] use of our products in places where the products ar e exposed to sea wind or corrosive gases, including cl 2 , h 2 s, nh 3 , so 2 , and no 2 [d] use of our products in places where the products are exposed to static electricity or electromagnetic waves [e] use of our products in proximity to heat-producing components, plastic cords, or other flammable items [f] sealing or coating our products with resin or other coating materials [g] use of our products without cleaning residue of flux (ev en if you use no-clean type fluxes, cleaning residue of flux is recommended); or washing our products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] use of the products in places subject to dew condensation 4. the products are not subjec t to radiation-proof design. 5. please verify and confirm characteristics of the final or mounted products in using the products. 6. in particular, if a transient load (a large amount of load applied in a short per iod of time, such as pulse. is applied, confirmation of performance characteristics after on-boar d mounting is strongly recomm ended. avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading c ondition may negatively affect product performance and reliability. 7. de-rate power dissipation (pd) depending on ambient temper ature (ta). when used in seal ed area, confirm the actual ambient temperature. 8. confirm that operation temperat ure is within the specified range described in the product specification. 9. rohm shall not be in any way responsible or liable for fa ilure induced under deviant condi tion from what is defined in this document. precaution for mounting / circuit board design 1. when a highly active halogenous (chlori ne, bromine, etc.) flux is used, the resi due of flux may negatively affect product performance and reliability. 2. in principle, the reflow soldering method must be used; if flow soldering met hod is preferred, please consult with the rohm representative in advance. for details, please refer to rohm mounting specification downloaded from: http:/// datasheet d a t a s h e e t notice - ge rev.002 ? 2014 rohm co., ltd. all rights reserved. precautions regarding application examples and external circuits 1. if change is made to the constant of an external circuit, pl ease allow a sufficient margin considering variations of the characteristics of the products and external components, including transient characteri stics, as well as static characteristics. 2. you agree that application notes, re ference designs, and associated data and in formation contained in this document are presented only as guidance for products use. theref ore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. precaution for electrostatic this product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. please take proper caution in your manufacturing process and storage so that voltage exceeding t he products maximum rating will not be applied to products. please take special care under dry condit ion (e.g. grounding of human body / equipment / solder iron, isolation from charged objects, se tting of ionizer, friction prevention and temperature / humidity control). precaution for storage / transportation 1. product performance and soldered connections may deteriora te if the products are stor ed in the places where: [a] the products are exposed to sea winds or corros ive gases, including cl2, h2s, nh3, so2, and no2 [b] the temperature or humidity exceeds those recommended by rohm [c] the products are exposed to di rect sunshine or condensation [d] the products are exposed to high electrostatic 2. even under rohm recommended storage c ondition, solderability of products out of recommended storage time period may be degraded. it is strongly recommended to confirm sol derability before using products of which storage time is exceeding the recommended storage time period. 3. store / transport cartons in the co rrect direction, which is indicated on a carton with a symbol. otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. use products within the specified time after opening a humidity barrier bag. baking is required before using products of which storage time is exceeding the recommended storage time period. precaution for product label qr code printed on rohm products label is for rohms internal use only. precaution for disposition when disposing products please dispose them proper ly using an authorized industry waste company. precaution for foreign exchange and foreign trade act since our products might fall under cont rolled goods prescribed by the applicable foreign exchange and foreign trade act, please consult with rohm representative in case of export. precaution regarding intellectual property rights 1. all information and data including but not limited to application example contained in this document is for reference only. rohm does not warrant that foregoi ng information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. rohm shall not be in any way responsible or liable for infringement of any intellectual property rights or ot her damages arising from use of such information or data.: 2. no license, expressly or implied, is granted hereby under any intellectual property rights or other rights of rohm or any third parties with respect to the information contained in this document. other precaution 1. this document may not be reprinted or reproduced, in whol e or in part, without prior written consent of rohm. 2. the products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of rohm. 3. in no event shall you use in any wa y whatsoever the products and the related technical information contained in the products or this document for any military purposes, incl uding but not limited to, the development of mass-destruction weapons. 4. the proper names of companies or products described in this document are trademarks or registered trademarks of rohm, its affiliated companies or third parties. downloaded from: http:/// datasheet datasheet notice C we rev.001 ? 2014 rohm co., ltd. all rights reserved. general precaution 1. before you use our pro ducts, you are requested to care fully read this document and fully understand its contents. rohm shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny rohms products against warning, caution or note contained in this document. 2. all information contained in this docume nt is current as of the issuing date and subj ec t to change without any prior notice. before purchasing or using rohms products, please confirm the la test information with a rohm sale s representative. 3. the information contained in this doc ument is provi ded on an as is basis and rohm does not warrant that all information contained in this document is accurate an d/or error-free. rohm shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. downloaded from: http:/// |
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