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RT9468 ? ds9468-00 may 2017 www.richtek.com 1 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. general description the RT9468 is a switch-mode single cell li-ion/li-polymer battery charger for portable applications. it integrates a synchronous pwm controller, power mosfets, input current sensing and regulation, high-accuracy voltage regulation, and charge termination. the charge current is regulated through integrated sensing resistors. the RT9468 also features usb on-the-go (otg) support. the RT9468 integrates an easy-to-use direct charge function, simply driving an external mosfet to enable a direct charge path, as well as over-voltage protection, over-current protection, and watchdog functions. the RT9468 optimizes for charging task by using a control algorithm to vary the charge rate for different modes, including pre-charge mode, fast charge mode (constant voltage and constant current). the key charge parameters are programmable through an i 2 c interface. the RT9468 will resume the charge cycle whenever the battery voltage falls below an internal recharge threshold, and can automatically enter sleep mode if the input power supply is removed. other features include under-voltage protection, over- voltage protection, thermal regulation and reverse leakage protection. the RT9468 is available in a wqfn-32l 4x4 package. applications ? cellular telephones ? personal information appliances ? tablet pc, power bank ? portable instruments 5a single cell li-ion switching battery charger with direct charge, power path management and usb otg boost mode features ? ? ? ? ? direct charge with over-voltage protection, over- current protection and watchdog ? ? ? ? ? high efficiency 5a, 1.5mhz switching charger with output inductor dfe252012f, toko ? ? ? ? ? charging efficiency 90.25% at ichg = 2a ? ? ? ? ? charging efficiency 88.86% at ichg = 3a ? ? ? ? ? charging efficiency 84.2% at ichg = 5a ? ? ? ? ? synchronous 1.5mhz/0.75mhz fixed-frequency pwm controller with up to 95% duty cycle ? ? ? ? ? power path management by batfet control ? ? ? ? ? support high voltage input (9v/12v) ? ? ? ? ? support high voltage input adapter (pump express 1.0/2.0/3.0) ? ? ? ? ? support ir compensation function from charger output to cell terminal ? ? ? ? ? optimize input sourcing capability to prevent overload ? ? ? ? ? aicr current limit setting via i 2 c ? ? ? ? ? ilim pin for current limit setting ? ? ? ? ? average input current limit measurement ? ? ? ? ? shipping mode for battery leakage reduction ? ? ? ? ? ? ? ? ? ? wake up system, exit shipping mode, and reset system by qon pin ? ? ? ? ? automatic charging ? ? ? ? ? average input current regulation (aicr) : 0.1a to 3.25a in 50ma steps ? ? ? ? ? charge current regulation accuracy : 7% ? ? ? ? ? charge voltage regulation accuracy : 1% (0 to 85 c) ? ? ? ? ? protection for overall system considerations ? ? ? ? ? ? ? ? ? ? thermal regulation for current reduction and over-temperature protection ? ? ? ? ? ? ? ? ? ? input over-voltage protection ? ? ? ? ? ? ? ? ? ? input bad adapter protection ? ? ? ? ? ? ? ? ? ? battery over-voltage protection ? ? ? ? ? support adc conversion for ? ? ? ? ? ? ? ? ? ? vbus, vbat, vsys, regn, ts_bat, ibus, ibat, temp_jc, ts_bus,vbats, ibats ? ? ? ? ? int output for communication with host through i 2 c (watch dog / polling function)
2 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. pin configuration (top view) wqfn-32l 4x4 marking information typical application circuit below are recommended components information pin description part number package manufacturer vbus 2.2 ? f/25v/x5r grm155r61e225ke11 0402 murata pmid 4.7 ? f/25v/x5r grm188r61e475ke11 0603 murata btst 47nf/16v/x5r grm033r61c473ke84 0201 murata sys 10 ? f/6.3v/x5r grm185r60j106me15 0603 murata regn 4.7 ? f/6.3v/x5r grm155r60j475me47 0402 murata ordering information note : richtek products are : ? rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ? suitable for use in snpb or pb-free soldering processes. package type qw : wqfn-32l 4x4 (w-type) RT9468 lead plating system g : green (halogen free and pb free) 5f=ym dnn 5f= : product code ymdnn : date code vbus d+ vbus vbus pgnd sys sys pgnd otg ceb ilim ts_bat pmid pmid vg regn ts_bus d- bat bat int pmid btst scl bat_sp ibat_sn lx ibat_sp lx sda bat_sn 33 24 23 22 21 1 2 3 4 10 11 12 13 31 30 29 28 20 19 5 6 9 32 14 27 18 7 15 26 16 25 17 8 pgnd qon vbus normal charge : 3.9v to 14v direct charge : 3.0v to 7v 4.7f regn scl sda otg ceb bat ts_bat int qon pgnd ilim 1, 2, 3 4 7 8 9 10 11 12 13 14 19, 20 28 23, 24 5 pmid 30, 31, 32 regn ta_ntc ts_bus 6 vg 29 bat_sn bat_sp 17 18 ibat_sn ibat_sp 16 15 d+ d- 4.7f RT9468 2.2f 4.7f to i 2 c bus lx btst sys 10f x 2 to system 21, 22 25, 26 27 47nf 1h regn battery pack 10f ntc 10m ? 698 ?
3 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. functional pin description pin no. pin name pin description 1, 2, 3 vbus power input. 4 d+ usb d+ port connected to usb receptacle. 5 d- usb d- port connected to usb receptacle. 6 ts_bus bus temperature-sense input, connected to a resistor divider for temperature programming. if there is no need for the battery temperature-sense function, a 50k ? resistor is connected to regn and another 50k ? resistor to ground. 7 scl i 2 c interface serial clock input. open-drain. an external pull-up resistor is required. 8 sda i 2 c interface serial data input/output. open-drain. an external pull-up resistor is required. 9 int interrupt output, active-low open-drain. indicator of the charger/boost event for system processor. 10 otg otg boost mode enable control, active-high. act with otg_pin_en (0x01[1]). 11 ceb charger enable input, active-low. 12 ilim input current limit setting pin. a resistor is connected from ilim pin to ground to set the maximum input current limit. the actual input current limit is the lower value set through the ilim pin and iaicr register bits. 13 ts_bat battery temperature-sense input, connected to a resistor divider for temperature programming. if there is no need for the battery temperature-sense function, a 50k ? resistor is connected to regn and another 50k ? resistor to ground. 14 qon internal batfet enable control input. in shipping mode, qon is pulled low for the duration of t shipmode (typical 0.9s) to exit shipping mode. 15 ibat_sn negative battery current sense. 16 ibat_sp positive battery current sense. 17 bat_sn negative battery voltage sense. 18 bat_sp positive battery voltage sense. 19, 20 bat battery connection node. charging current output node. internal batfet is connected between sys and bat. 21, 22 sys system connection node. the internal batfet is connected between sys and bat. connect a 20 ? f ceramic capacitor between sys and ground. 23, 24 pgnd power ground connection. 25, 26 lx switch node for output inductor connection. 27 btst bootstrap capacitor connection for high-side gate driver. connect a capacitor from btst to lx to power the internal gate driver. pin description part number package manufacturer bat 10 ? f/6.3v/x5r grm185r60j106me15 0603 murata lx 1 ? h/20% dfe252012f-1r0 2.5 x 2.0mm toko vg nmos dmt2004ufdf_r0 2.0 x 2.0mm diodes ilim 698 ? /1% rr0306s-6980-fnh 0201 cyntec
4 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. functional block diagram pin no. pin name pin description 28 regn regulated output voltage to supply for the pwm low-side gate driver and the bootstrap capacitor. connect a 4.7 ? f ceramic capacitor from regn to gnd. 1.if vbus is plugged in, regn will be powered by vbus and regulated to 4.9v. 2.if vbus is unplugged, the charger will operate in sleep mode and the regn voltage will be 0v. * for #2. : since the regn voltage is also used to power the ts resistor, when the charger is in sleep mode, the regn will be woken up (be reactivated) if vbat is greater than forward voltage (v f ) of the internal high-side (hs) mos diode by v sleep_exit with all function of the internal adc being activated and i 2 c r/w. the regn wake-up time is 500ms. 29 vg gate driver output for external n-mosfet. 30, 31, 32 pmid connection point between the reverse blocking mosfet and the high-side switching mosfet. 33 (exposed pad) pgnd power ground. the exposed pad must be connected to gnd and well soldered to a large pcb copper area for maximum power dissipation. adc state machine analog base protection charger/otg controller power path controller silicon temp detection uug controller h/l driver vbus lx btst pmid sys bat ts_bat int pgnd ldo regn scl sda vbus vsys vbat/vbats ibus ibat/ibats regn temp_jc sensing amplifier ts_bus bat_sp bat_sn ibat_sp ibat_sn charge pump vg d+ d- usb host/ adapter/quick charge detection i 2 c otg ceb ilim qon
5 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. operation the RT9468 is an integrated single cell li-ion battery switching charger with power path controller. base circuits base circuits provide the internal power, vregn and reference voltage and bias current. protection circuits the protection circuits include the vinovp, vinuvlo, batovp and otp circuits. the protection circuits turn off the charging when the input power or die temperature is in abnormal level. buck regulator for charging and boost regulator as otg the multi-loop controller controls the operation of charging process and current supply to the system. it also controls the circuits as a boost converter for otg applications. battery detection the RT9468 is capable of doing the battery absence detection. the detection protects the charger when battery is removed accidentally. adapter detection if the poor input power source is connected to the RT9468, the operation will be shut down by the adapter detection. power path management and control once the battery voltage increases to a defined system minimum regulation voltage, the internal path between sys and bat will be fully turned on. that is, a better charging efficiency can be achieved. when end of charge occurs, the charging will stop and the internal path will be turned off. usb charger detection the RT9468 can detect and distinguish standard downstream port, charging downstream port and dedicated charging port via dp and dm pins. ts detection the RT9468 detects the temperature of the battery pack via regn and ts pins. the regn pin provides a constant voltage source to drive the voltage divider composed of a pulled-high resister and a ntc resister. the RT9468 reports the sensing results via irq and status bits for cold, cool, warm and hot. i 2 c controller the key parameters of charging and otg are programmable through i 2 c commands.
6 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. electrical characteristics absolute maximum ratings (note 1) ? supply input v oltage, vbus --------------------------------------------------------------------------------------------- ? 0.3v to 22v ? supply input voltage, vbus (peak <100n s duration) ------------------------------------------------------------- ? 2v ? pmid, btst ----------------------------------------------------------------------------------------------------------------- ? 0.3v to 22v ? lx ----------------------------------------------------------------------------------------------------------------------------- - ? 0.3v to 16v ? lx (peak < 100ns duration) ---------------------------------------------------------------------------------------------- ? 2v ? pmid ? vbus, btst ? lx ----------------------------------------------------------------------------------------------- ? 0.3v to 6v ? other pins -------------------------------------------------------------------------------------------------------------------- ? 0.3v to 6v ? power dissipation, p d @ t a = 25 c wqfn-32l 4x4 ------------------------------------------------------------------------------------------------------------- 3.59w ? package thermal resistance (note 2) wqfn-32l 4x4, ja -------------------------------------------------------------------------------------------------------- 27.8 c/w wqfn-32l 4x4, jc ------------------------------------------------------------------------------------------------------- 7 c/w ? lead temperature (soldering, 10 sec.) -------------------------------------------------------------------------------- 260 c ? junction temperature ------------------------------------------------------------------------------------------------------ 150 c ? storage temperature range --------------------------------------------------------------------------------------------- ? 65 c to 150 c ? esd susceptibility (note 3) hbm (human body model) ----------------------------------------------------------------------------------------------- 2kv recommended operating conditions (note 4) ? supply input voltage ------------------------------------------------------------------------------------------------------- 4v to 14v ? maximum input current (vbus), i aicr -------------------------------------------------------------------------------- 3.25a ? maximum vbus to pmid current -------------------------------------------------------------------------------------- 6a ? maximum sys output current (sw), i sys --------------------------------------------------------------------------- 5a ? maximum battery voltage, vbat -------------------------------------------------------------------------------------- 4.71v ? maximum i bat fast charging current ---------------------------------------------------------------------------------- 5a ? maximum i bat discharging current ------------------------------------------------------------------------------------- 6a ? maximum i bat discharging current peak,1se c duration ----------------------------------------------------------- 9a ? junction temperature range --------------------------------------------------------------------------------------------- ? 40 c to 125 c ? ambient temperature range --------------------------------------------------------------------------------------------- ? 40 c to 85 c (v bus = 5v, v bat = 4.2v, l = 1 h, c in = 2.2 f, c bats = 10 f, t a = 25 c, unless otherwise specified) parameter symbol test conditions min typ max unit quiescent current v bus supply current i vbus_sw v lx is switching, v bus = 5v, v sys = 3.8v -- 8 -- ma i vbus_non_sw v lx is non-switching, v bus = 5v, v sys = 4.4v -- -- 5 ma i vbus_hz v lx is in high-impendence mode, v bus = 5v, v sys = 3.8v -- -- 150 ? a battery leakage current i bat_leak power path is off, v bat = 4.2v -- -- 25 ? a boost-mode battery discharge current i bat_boost_sw v bat = 4.2v, boost mode, i vbus = 0a, v lx is switching -- 5 -- ma
7 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. parameter symbol test conditions min typ max unit v bus / v bat power-up sleep-mode entry threshold, v bus -v bat v sleep_enter 2.5v < v bat < v oreg , v bus falling 0 40 100 mv sleep-mode exit threshold, v bus -v bat v sleep_exit 2.5v < v bat < v oreg, v bus rising 40 100 200 mv direct charge sleep-mode entry threshold, v bus -v bat v sleep_enter_dc -- -- 40 mv direct charge sleep-mode exit threshold, v bus -v bat v sleep_exit_dc 40 -- -- mv sleep-mode exit deglitch time t d_sleep_exit exit sleep-mode -- 120 -- ms v bus bad adapter threshold v bad_adp -- 3.8 -- v v bus bad adapter hysteresis v bad_adp_hys -- 150 -- mv v bus bad adapter sink current i bad_adp_sink -- 50 -- ma v bus bad adapter detection time t bad_adp_det -- 30 -- ms input current limit factor k ilim input current regulation 508ma by ilim pin with resistance = 698 ? 320 355 390 a ? input current limit regulation i ilim_min minimum input current for regulation on ilim pin 0.5 -- -- a input power regulation minimum input voltage regulation (mivr) threshold range v mivr i 2 c programmable in 0.1v steps 3.9 -- 13.4 v default minimum input voltage regulation threshold v mivr_def default -- 4.4 -- v minimum input voltage regulation accuracy v mivr_ acc vmivr = 4.4v, 9v ? 3 -- 3 % average input current regulation accuracy i aicr_acc usb charge mode, i aicr = 100ma 86 93 100 ma usb charge mode, i aicr = 500ma 440 470 500 usb charge mode, i aicr = 1000ma 880 940 1000 ma adapter 1.5a charge mode, i aicr = 1500ma 1300 1400 1500 ma direct charge direct charge uc level i dirchg_uc -- 650 -- ma direct charge ov level v dirchg_ov (v dirchg_rising ? v oreg )/v oreg 104 108 112 % direct charge oc setting range i dirchg_oc 4 -- 6.5 a direct charge vbusov setting range v dirchg_vbusov 3.9 -- 7 v
8 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. parameter symbol test conditions min typ max unit direct charge watch dog timer range t dirchg_wdt 0 -- 8 s deviation between vg and battery (v vg ? v bat ) v vg ? v bat v bat > 3.4v,(0x18,bit[1] = 0) 4.5 5 7 v v bat > 3.4v,(0x18,bit[1] = 1) 8 10 12 v protection v bus v bus under-voltage protection threshold v uvlo v bus rising 3.05 3.3 3.55 v v bus under-voltage protection hysteresis v uvlo_hys v bus falling from uvlo -- 150 -- mv v bus over-voltage protection threshold v bus_ovp v bus rising 13.5 14.5 15.5 v v bus over-voltage protection hysteresis v bus_ovp_hys v bus falling -- 250 -- mv v bat battery over-voltage protection threshold v bat_ovp v bat rising, as percentage of v oreg , as (v bat_ovp -v oreg )/v oreg 106 108 110 % battery over-voltage protection hysteresis v bat_ovp_hys v bat falling, as (v bat_ovp_hys )/v oreg -- 4 -- % thermal protection over-temperature protection threshold t otp thermal shutdown threshold temperature -- 160 -- o c over-temperature protection hysteresis t otp_hys thermal shutdown hysteresis temperature -- 30 -- o c thermal regulation threshold t tr charge current starts decreasing -- 120 -- o c v sys v sys over-voltage protection threshold v sys_ovp v sys rising -- 5.25 -- v v sys under-voltage protection threshold v sys_uvp v sys falling -- 2.4 -- v battery charging stages end of charge regulated battery voltage range v oreg i 2 c programmable in 10mv steps 3.9 -- 4.71 v regulated battery voltage v oreg_def default -- 4.2 -- v regulated battery voltage accuracy v oreg_ acc temperature = 0 to 85 o c ? 1 -- 1 % re-charge mode threshold v rech v bat falling, the difference below voreg , (0x0b[2:0] = 00) 50 100 150 mv re-charge deglitch time t d_rech -- 120 -- ms
9 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. parameter symbol test conditions min typ max unit end-of-charge current i eoc i 2 c programmable in 50ma steps 100 -- 850 ma default end-of-charge current i eoc_def default -- 250 -- ma end-of-charge current accuracy i eoc_acc ? 20 -- 20 % default end-of-charge deglitch time t d_eoc default -- 2 -- ms fast charge charge current range i chg i 2 c programmable in 0.1a steps 0.1 -- 5 a charge current accuracy i chg_ acc v bat = 3.8v i chg < 500ma ? 20 -- 20 % 500ma < i chg < 1000ma ? 10 -- 10 % i chg > 1000ma ? 7 -- 7 % pre-charge pre-charge mode threshold v prechg i 2 c programmable in 0.1v steps 2 -- 3.5 v pre-charge mode hysteresis v prechg_hys pre-charge hysteresis, falling -- 0.2 -- v pre-charge mode threshold accuracy v prechg_acc ? 5 -- 5 % pre-charge current range i prechg i 2 c programmable in 50ma steps 100 -- 850 ma default pre-charge current i prechg_def default -- 150 -- ma pre-charge current accuracy i prec_ acc ? 20 -- 20 % trickle charge trickle charge threshold v trichg vbat falling -- ? 2 -- v trickle charge threshold hysteresis v trichg_hys vbat rising -- ? 200 -- mv trickle charge threshold accuracy v trichg_acc ? 5 -- 5 % trickle current i trichg vbat < 2v, charge with icc = 100ma vbat < 1.6v, charge with aicr = 100ma -- 100 -- ma trickle current accuracy i trichg_acc ? 20 -- 20 % v sys system regulation voltage v sysreg minimum system regulation voltage, i 2 c programmable in 0.1v steps 3.3 -- 4 v default system regulation voltage v sysreg_def default minimum system regulation voltage -- 3.6 -- v
10 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. parameter symbol test conditions min typ max unit system regulation accuracy v sysreg_ acc ? 5 -- 5 % battery charger uug on-resistance r on_uug from vbus to pmid -- 15 30 m ? high-side on-resistance r on_uug_ug from vbus to lx -- 42 79 m ? low-side on-resistance r on_lg from lx to pgnd -- 28 40 m ? power-path-side on-resistance r on_ppmos from sys to bat -- 13 30 m ? switching frequency (1.5mhz) f osc1 i 2 c programmable to 1.5 mhz (0x01[7] = 0) -- 1.5 -- mhz switching frequency (750khz) f osc2 i 2 c programmable to 0.75mhz (0x01[7] = 1) -- 0.75 -- mhz frequency accuracy f osc_acc ? 10 -- 10 % maximum duty cycle d max at minimum input voltage -- 97 -- % minimum duty cycle d min 0 -- -- % regn regulation v regn v bus = 5v / 9v / 12v -- 4.9 -- v regn current limit i lim_regn v bus = 5v / 9v / 12v 50 -- -- ma sink current for battery detection i bat_sink -- 300 -- ? a internal qon pull-up resistance qon r -- 200 -- k ? internal qon pull-up qon v battery only -- v bat -- v v bus = 5v/9v -- 4.8 -- qon exit shipping mode time t shipmode qon low for batfet on-time to exit shipping mode -- 0.9 -- sec system reset by qon pin _rst qon t qon low time to enable full system reset -- 10 -- sec batfet reset time t batfet_rst batfet off-time during full system reset -- 0.41 -- sec shipping mode entry deglitch time t d_sm_enter enter shipping mode -- 9 -- sec aicl v aicl v bus rising, i 2 c programmable -- 4.6 -- v aicl hysteresis v aicl_hys -- 50 -- mv otg boost mode operation otg boost-mode output regulation voltage range v otgbst to vbus 4.425 -- 5.825 v otg boost-mode output regulation voltage accuracy v otgbst_acc ? 3 -- 3 % otg boost-mode over-load protection threshold i otg_olp i 2 c programmable 0.5 -- 2.4 a
11 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. parameter symbol test conditions min typ max unit otg boost-mode default over-load protection threshold i otg_olp_def 0x0a [2:0] = 000 -- 0.5 -- a otg low battery protection threshold v otg_lbp i 2 c programmable, hysteresis = 0.4 v 2.3 -- 3.8 v otg default low battery protection threshold v otg_lbp_def otg_lbp = 2.8v (addr0x0a[7:4] = 0101) -- 2.8 -- v otg low battery protection threshold accuracy ? 5 -- 5 % otg pmid over-voltage protection v otg_pmid_ovp v pmid rising -- 6 -- v otg pmid over-voltage protection hysteresis v otg_pmid_ovp_ hys -- 200 -- mv inductor over-current protection threshold i ocp inductor ocp level for both buck and boost modes -- 6 -- a current pulse control, pe1.0 current pulse control stop pulse t pumpx_stop 430 -- 570 ms current pulse control long on pulse t pumpx_on1 240 -- 360 ms current pulse control short on pulse t pumpx_on2 70 -- 130 ms current pulse control off pulse t pumpx_off 70 -- 130 ms current pulse control stop start delay t pumpx_dly 80 -- 225 ms i 2 c characteristics output low threshold voltage v ol_i 2 c i ds = 10ma -- -- 0.4 v scl, sda input logic high threshold voltage v ih_i 2 c 1.3 -- -- v scl, sda input logic low threshold voltage v il_i 2 c -- -- 0.4 v scl clock f scl -- -- 400 khz high-level leakage current i birs v pull_up = 1.8v, sda and scl -- -- 1 ? a load capacitance c load v pull_up = 1.8v -- -- 1 pf default wait time for watch dog reset t wdt_def watch dog timer selection, default : 0x0d[6] = 1 -- 500 -- ms ntc monitor battery temperature hot threshold v vts_hot v ts falling, the ratio of v regn 33.5 34.5 35.5 %
12 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. parameter symbol test conditions min typ max unit battery temperature warm threshold v vts_warm v ts falling, the ratio of v regn 44 45 46 % battery temperature cool threshold v vts_cool v ts rising, the ratio of v regn 67.5 68.5 69.5 % battery temperature cold threshold v vts_cold v ts rising, the ratio of v regn 72.5 73.5 74.5 % battery temperature hysteresis v vts_hys -- 2 -- % control i/o pin (int) output low voltage v ol_ctrl i ds = 10ma -- -- 0.4 v control i/o pin (otg, ceb, qon ) input threshold voltage v ih_ctrl logic high threshold 1.3 -- -- v v il_ctrl logic low threshold -- -- 0.4 battery charge detection spec (d+/d-) vdp_src voltage v dp_src with i dat_src = 0 to 250 ? a 0.5 0.65 0.7 v vdat_ref voltage v dat_ref 0.25 0.325 0.4 v vlgc voltage v lgc 0.8 1.2 2 v idm sink current i dm_sink may be a resistance if desired 50 100 150 ? a data contact timeout t dcdt setting by register 0x12[5:4] -- 600 -- ms adc adc conversion time each channel t conv 35 200 -- ms number of bits for adc resolution res logic high threshold -- 10 -- bit adc accuracy and measurement range vbus_div5 measurement range v vbus_div5adc_ range 1 -- 22 v vbus_div5 resolution v vbus_div5adc_ res -- 25 -- mv vbus_div5 accuracy v vbus_div5adc_ acc ? 2 -- 2 lsb vbus_div2 measurement range v vbus_div2adc_ range 1 -- 9.8 v vbus_div2 resolution v vbus_div2adc_ res -- 10 -- mv vbus_div2 accuracy v vbus_div2adc_ acc ? 2 -- 2 lsb vbat measurement range v vbat adc_range 0 -- 4.9 v vbat resolution v vbat adc_res -- 5 -- mv vbat accuracy v vbat adc_acc ? 2 -- 2 lsb vsys measurement range v vsys adc_range 0 -- 4.9 v
13 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. parameter symbol test conditions min typ max unit vsys resolution v vsys adc_res -- 5 -- mv vsys accuracy v vsys adc_acc ? 2 -- 2 lsb regn measurement range v regn adc_range 0 -- 4.9 v regn resolution v regn adc_res -- 5 -- mv regn accuracy v regn adc_acc ? 2 -- 2 lsb ts_bat measurement range rate ts_bat 0 -- 100 % ts_bat resolution rate ts_bat_res -- 0.25 -- % ts_bat accuracy rate ts_bat acc ? 2 -- 2 lsb ibus measurement range i ibus adc_range 0 -- 5 a ibus resolution i ibus adc_res -- 50 -- ma ibus accuracy i ibus adc_acc ? 2 -- 2 lsb ibat measurement range i ibat adc_range 0 -- 5 a ibat resolution i ibat adc_res -- 50 -- ma ibat accuracy i ibat adc_acc ichg[5:0] setting ? 1000ma ? 2 -- 2 lsb temp_jc measurement range t temp_jc adc_range ? 40 -- 120 o c temp_jc resolution t temp_jc adc_res -- 2 -- o c temp_jc accuracy t temp_jc adc_acc temperature < 85 o c ? 2 -- 2 lsb vbats measurement range v vbats_adc_range 0 -- 4.9 v vbats resolution v vbats_adc_res -- 5 -- mv vbats accuracy v vbats_adc_acc ? 2 -- 2 lsb ts_bus measurement range rate ts_bus 0 -- 100 % ts_bus resolution rate ts_bus_res -- 0.25 -- % ts_bus accuracy rate ts_bus_acc ? 2 -- 2 lsb ibats measurement range i ibat adc_range 0 -- 5 a ibats resolution i ibat adc_res -- 50 -- ma ibats accuracy i ibat adc_acc ? 2 -- 2 lsb external n-mosfet selection specification on-resistance for ds path r ds(on) vgs = 4.5v -- 7 -- m ? drain-to-source voltage (amr) v ds -- -- 24 v gate-to-source voltage (amr) v gs ? 12 -- 12 v continuous drain current i d vgs = 4.5v 8 10 -- a
14 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. note 1. stresses beyond those listed ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions may affect device reliability. note 2. ja is measured under natural convection (still air) at t a = 25 c with the component mounted on a high effective- thermal-conductivity four-layer test board on a jedec 51-7 thermal measurement standard. jc is measured at the exposed pad of the package. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions.
15 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. typical operating characteristics cv vs. temperature 4.15 4.20 4.25 4.30 4.35 4.40 4.45 4.50 -50 -25 0 25 50 75 100 125 temperature (c) cv (v) cv set = 4.44v cv set = 4.36v cv set = 4.2v charging current vs. vbat 0.90 0.92 0.94 0.96 0.98 1.00 1.02 1.04 1.06 1.08 1.10 3.33.43.53.63.73.83.94.04.14.24.34.4 vbat (v) charging current (a ) vbus = 9v vbus = 12v vbus = 14v vbus = 5v i cc = 1a boost efficiency vs. load current 70 72 74 76 78 80 82 84 86 88 90 92 94 96 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 load current (a) efficiency (%) vbat = 4.35v vbat = 4v vbat = 3.8v vbat = 3.5v ) charger efficiency vs. charging current 74 76 78 80 82 84 86 88 90 92 94 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 charging current (a) efficiency (%) vbus = 5v vbus = 9v vbus = 12v vbat = 3.9v
16 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. register description i 2 c slave address : 1011100 (5ch) name function addr reset core_ctrl0 control 0 0x00 0x00 bit mode name reset value description 7 r/w rst_reg 0 all registers reset bit. 0: don't reset all registers. 1: reset all registers. (notice: 1.this bit will be reset to "0" after reset procedure finish. 2. in high-impedance mode, this bit reset all registers after leave high-impedance mode.) [6:0] r/w reserved 0000000 reserved name function addr reset chg_ctrl1 control 1 0x01 0x10 bit mode name reset value description 7 r/w sel_swfreq 0 the switching frequency selection bit (charger/otg) 0 : the switching frequency is 1.5mhz. (default) 1 : the switching frequency is 0.75mhz. 6 r/w fixfreq 0 charger switching frequency 0 : charger switching frequency would be varied if vbus is closed to vbat(default) 1 : charger switching frequency is fixed 5 r/w reserved 0 reserved 4 r/w stat_en 1 charger stat pin function 0 : disable 1 : enable (default) 3 r/w irq_pulse 0 irq reminder function 0 : irq reminder is disabled (default) 1 : irq reminder is enabled. if irq is triggered but no check action, int pin will be released as well as being triggered again with every 2s intervals 2 r/w hz 0 high-impedance selection 0 : no high-impedance mode (default) 1 : high-impedance mode 1 r/w otg_pin_en 0 boost mode enable with otg pin 0 : enable boost mode by opa_mode (default) 1 : enable boost by both opa_mode bit and otg pin 0 r/w opa_mode 0 boost mode enable 0 : charge mode (default) 1 : boost mode for otg
17 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg ctrl 2 charger control 2 0x02 0x07 bit mode name reset value description 7 r/w ship_mode 0 shipping mode enable, force batfet off 0 : allow batfet turn on (default) 1 : force batfet turn off 6 r/w batdet_dis_dly 0 batfet turn off delay 0 : batfet turn off immediately (default) 1 : batfet turn off with 10s delay after ship_mode bit is set 5 r/w bypass_mode 0 "bypass mode enable, disable the buck but force batfet on 0 : bypass mode disable (default) 1 : bypass mode enable" 4 r/w te 0 termination enable 0 : disable charge current termination (default) 1 : enable charge current termination [3:2] r/w iinlmtsel 01 input current limit selection bit 00 : input limit is set as 3.25a 01 : chg_typ results is applied d+d- detection (default) 10 : iaicr[5:0] results is applied 11 : input limit is set by the lowest among above 1 r/w cfo_en 1 charger and otg enable 0 : cfo is disabled 1 : cfo is enabled (default) 0 r/w chg_en 1 charger enable 0 : charger is disabled 1 : charger is enabled (default) name function addr reset chg_ctrl3 control 3 0x03 0x23 bit mode name reset value description [7:2] r/w iaicr[5:0] 001000 aicr setting 000000 : 100ma 000001 : 150ma 000010 : 200ma 000011 : 250ma ... 001000 : 500ma (default) 001001 : 550ma ... 100110 : 2a ... 111010 : 3a ... 111111 : 3.25a 1 r/w aicr_en 1 aicr loop enable 0 : aicr loop disable 1 : aicr loop enable (default) 0 r/w ilim_en 1 ilim function enable 0 : ilim function disable 1 : ilim function enable (default)
18 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg_ctrl4 control 4 0x04 0x3c bit mode name reset value description [7:1] r/w voreg[6:0] 0011110 battery regulation voltage. the battery regulation voltage step is 10mv. 0000000 : 3.9v 0000001 : 3.91v 0000010 : 3.92v 0000011 : 3.93v ? 0011101 : 4.19v 0011110 : 4.2v (def ault) 0011111 : 4.21v ? 0101100 : 4.34v 0101101 : 4.35v 0101110 : 4.36v ... 1010001 : 4.71v 1010001 ~ 11 11111 : 4.71v 0 r/w reserved 0 reserved name function addr reset chg_ctrl5 control 5 0x05 0x67 bit mode name reset value description [7:2] r/w votgbst[5:0] 011001 otg boost-mode output regulation voltage. the otg regulation voltage step is 25mv. 000000 : 4.425v 000001 : 4.45v 000010 : 4.475v ? 010111 : 5v 011000 : 5.025v 011001 : 5.05v (default) 011010 : 5.075v 011011 : 5.1v ... 111000 : 5.825v 111001 to 111111 : 5. 825v [1:0] r/w threg[1:0] 11 charger thermal regulation threshold 00 : 60c 01 : 80c 10 : 100c 11 : 120c (default)
19 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg_ctrl6 control 6 0x06 0x0b bit mode name reset value description [7:1] r/w vmivr[6:0] 0000101 input mivr threshold setting 0000000 : 3.9v 0000001 : 4v 0000010 : 4.1v 0000011 : 4.2v 0000100 : 4.3v 0000101 : 4.4v (default) 0000110 : 4.5v ? 0011110 : 6.9v 0011111 : 7v ? 0110010 : 8.9v 0110011 : 9v ? 1010000 : 11.9v 1010001 : 12v ? 1011111 : 13.4v 1100000 to 1111111 : 13.4v 0 r/w mivr_en 1 mivr loop enable 0 : mivr loop disable 1 : mivr loop enable (default)
20 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg_ctrl7 control 7 0x07 0x4c bit mode name reset value description [7:2] r/w ichg[5:0] 010011 charging regulation current 000000 : 0.1a 000001 : 0.2a 000010 : 0.3a ... 001000 : 0.9a 001001 : 1a 001010 : 1.1a ... 010010 : 1.9a 010011 : 2a (default) ... 011100 : 2.9a 011101 : 3a ? 100110 : 3.9a 100111 : 4a ? 110000 : 4.9a 110001 : 5a 110010 to 111111 : 5a note : when ichg is set above 2.5a, recommend the ocp to set higher level. (addr 0x0d[2] = 1) [1:0] r/w eoc_timer[1:0] 00 eoc back-charge time 00 : 0mins (default) 01 : 30mins 10 : 45mins 11 : 60mins
21 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg_ctrl8 control 8 0x08 0xa1 bit mode name reset value description [7:4] r/w vprec[3:0] 1010 pre-charge voltage threshold 0000 : 2v 0001 : 2.1v 0010 : 2.2v 0011 : 2.3v 0100 : 2.4v 0101 : 2.5v 0110 : 2.6v 0111 : 2.7v 1000 : 2.8v 1001 : 2.9v 1010 : 3.0v (default) 1011 : 3.1v 1100 : 3.2v 1101 : 3.3v 1110 : 3.4v 1111 : 3.5v [3:0] r/w iprec[3:0] 0001 pre-charge current threshold 0000 : 100ma 0001 : 150ma (default) 0010 : 200ma 0011 : 250ma 0100 : 300ma 0101 : 350ma 0110 : 400ma 0111 : 450ma 1000 : 500ma 1001 : 550ma 1010 : 600ma 1011 : 650ma 1100 : 700ma 1101 : 750ma 1110 : 800m a 1111 : 850m a
22 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg_ctrl9 control 9 0x09 0x3c bit mode name reset value description [7:4] r/w ieoc[3:0] 0011 eoc current setting 0000 : 100ma 0001 : 150ma 0010 : 200ma 0011 : 250ma (default) 0100 : 300ma 0101 : 350ma 0110 : 400ma 0111 : 450ma 1000 : 500ma 1001 : 550ma 1010 : 600ma 1011 : 650ma 1100 : 700ma 1101 : 750ma 1110 : 800m a 1111 : 850m a 3 r/w eoc_en 1 ieoc enable/disable 0: disable 1: enable (default) [2:0] r/w chg_tdeg_eoc[ 2:0] 100 eoc deglitch time 000 : 32 ? s 001 : 64 ? s 010 : 128 ? s 011 : 256 ? s 100 : 2ms (default) 101 : 4ms 110 : 8ms 111 : 16m s
23 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg_ctrl10 control 10 0x0a 0x58 bit mode name reset value description [7:4] r/w otg_lbp[3:0] 0101 otg low battery protection voltage selection (falling edge threshold, hysteresis voltage = 0.4v) 0000 : 2.3v 0001 : 2.4v 0010 : 2.5v 0011 : 2.6v 0100 : 2.7v 0101 : 2.8v (default) 0110 : 2.9v 0111 : 3.0v 1000 : 3.1v 1001 : 3.2v 1010 : 3.3v 1011 : 3.4v 1100 : 3.5v 1101 : 3.6v 1110 : 3.7v 1111 : 3.8v 3 r/w otg_lbp_en 1 otg low-battery protection (lbp) enable/disable 0 : disable 1 : enable (default) [2:0] r/w otg_olp[2:0] 000 otg over-load threshold (minimum) 000 : 0.5a (default) 001 : 0.7a 010 : 1.1a 011 : 1.3a 100 : 1.8a 101 : 2.1a 110 : 2.4a 111 : reserv ed note : when otg_olp is set 2.1a or 2.4a, recommend the ocp to set higher level. (addr 0x0d[2] = 1)
24 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg_ctrl11 control 11 0x0b 0x2c bit mode name reset value description 7 r/w adp_dis 0 charger adapter-detection disable 0 : adapter-detection is enabled (default) 1 : adapter-detection is disabled 6 r/w batd_en 0 charger battery-detection when charge done 0 : battery-detection is disabled (default) 1 : battery-detection is enabled 5 r/w sysuv_hw_sel 1 system under-voltage protection (uvp) selection bit 0 : buck switching is not turned off when system uvp occurs 1 : buck switching is turned off when system uvp occurs (default) [4:2] r/w sysreg[2:0] 011 minimum system regulation voltage 000 : 3.3v 001 : 3.4v 010 : 3.5v 011 : 3.6v (default) 100 : 3.7v 101 : 3.8v 110 : 3.9v 111 : 4.0v [1:0] r/w vrech 00 recharge voltage threshold with voreg 00 : 100mv (default) 01 : 200mv 10 : 300mv 11 : 400mv
25 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg_ctrl12 control 12 0x0c 0x02 bit mode name reset value description [7:5] r/w wt_fc[2:0] 000 fast charge timer 000 : 4hrs (default) 001 : 6hrs 010 : 8hrs 011 : 10hrs 100 : 12hrs 101 : 14hrs 110 : 16hrs 111 : 20hrs [4:3] r/w wt_prc[1:0] 00 pre-charge timer 00 : 30mins (default) 01 : 45mins 10 : 60mins 11 : 60mins 2 r/w tmr2x_en 0 double charger timer during mivr, aicr, and thermal regulation 0 : disable 2x extended charger timer (default) 1 : enable 2x extended charger timer 1 r/w tmr_en 1 charger timer enable/disable 0 : disable 1 : enable (default) 0 r/w tmr_pause 0 timer control bit 0 : timer is active (default) 1 : timer is paused
26 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg_ctrl13 control 13 0x0d 0x52 bit mode name reset value description 7 r/w wdt_en 0 watch dog timer enable/disable 0 : disable (default) 1 : enable 6 r/w wdt_trst 1 waiting timer to reset i 2 c setup after watchdog is asserted 0 : 200ms 1 : 500ms (default) [5:4] r/w wdt[1:0] 01 watch dog timer, from wdten is enabled to watchdog irq 00 : 8s 01 : 40s (default) 10 : 80s 11 : 160s 3 r/w ajita 0 charge current setting for jeita 0 : ichg value is kept (default) 1 : ichg value is half of the default value 2 r/w ocp 0 inductor ocp current level for both buck and boost modes 0 : ocp = 6a (default) 1 : ocp = 8a 1 r/w uug_on 1 uug enable/disable control 0 : force uug turn off 1 : allow uug turn on (default) 0 r/w int_rez 0 int pin re-trigger control. any event triggers but system does not check 0 : no action (default) 1 : release int pin, then will re-triggers after 2ms if any event exists (this bit will auto reset to 0 when the re-trigger is done)
27 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg ctrl 14 charger control 14 0x0e 0x05 bit mode name reset value description 7 r/w aicl_meas 0 aicl measurement mechanism 0 : no operation (default) 1 : execute aicl measurement [6:5] r/w tdeg_aicl_meas[1:0] 00 comparator output deglitch time 00 : 2ms (default) 01 : 4ms 10 : 8ms 11 : 16m s [4:3] r/w aicl_max_meas_intvl 00 detection internal time 00 : 50ms (default) 01 : 100ms 10 : 200ms 11 : 400ms [2:0] r/w aicl_vth[2:0] 101 detection comparator threshold 000 : 4.1v 001 : 4.2v 010 : 4.3v 011 : 4.4v 100 : 4.5v 101 : 4.6v (default) 110 : 4.7v 111 : 4.8v
28 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg ctrl 15 charger control 15 0x0f 0x02 bit mode name reset value description 7 r/w ichg_meas 0 ichg measurement mechanism 0 : no operation (default) 1 : execute ichg measurement [6:3] r ichg_rpt[3:0] 0000 report the ichg measurement result 0000 : 100ma 0001 : 150ma 0010 : 200ma 0011 : 250ma 0100 : 300ma 0101 : 350ma 0110 : 400ma 0111 : 450ma 1000 : 500ma 1001 : 550ma 1010 : 600ma 1011 : 650ma 1100 : 700ma 1101 : 750ma 1110 : 800ma 1111 : 850ma 2 r/w reserved 0 reserved 1 r/w ibats_r_sel 1 off-chip current sensing resistor setting (ibat_sp and ibat_sn) 0 : 5m ? 1 : 10m ? 0 r/w reserved 0 reserved name function addr reset chg ctrl 16 charger control 16 0x10 0x10 bit mode name reset value description [7:5] r/w reserved 000 reserved 4 r/w jeita_en 1 jeita function enable/disable 0 : disable 1 : enable (default) 3 r/w jeita_cool_iset 0 jeita current setting in cool region 0 : set charge current to ichg/2 (default) 1 : set charge current to ichg 2 r/w jeita_warm_iset 0 jeita current setting in warm region 0 : set charge current to ichg/2 (default) 1 : set charge current to ichg 1 r/w jeita_cool_vset 0 jeita voltage setting in cool region 0 : set charge voltage to voreg-0.2v (default) 1 : set charge voltage to voreg 0 r/w jeita_warm_vset 0 jeita voltage setting in warm region 0 : set charge voltage to voreg-0.2v (default) 1 : set charge voltage to voreg
29 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg adc adc 0x11 0x00 bit mode name reset value description [7:4] r/w adc_in_sel[3:0] 0000 adc channel selection 0000 : reserved (default) 0001 : vbus/5 0010 : vbus/2 0011 : vsys 0100 : vbat 0101 : vbats 0110 : ts_bat 0111 : ts_bus 1000 : ibus 1001 : ibat 1010 : ibats 1011 : regn 1100 : temp_jc 1101 to 1111 : reserved [3:1] r/w reserved 000 reserved 0 r/w adc_start 0 adc start control 0 : adc conversion not active (default) 1 : start adc conversion (auto clear when conversion done) name function addr reset chg dpdm1 dpdm1 0x12 0xd0 bit mode name reset value description 7 r/w usbchgen 1 usb charger detection flow enable/disable 0: disable usb charger detection flow 1: enable usb charger detection flow (default) 6 r/w reserved 1 reserved [5:4] r/w dcd_timeout 01 data contact detection timeout 00 : 300ms 01 : 600ms (default) 10 : 900ms 11 : 1200ms 3 r reserved 0 reserved 2 r dcp std 0 report of the standard dcp detection 0 : standard dcp is not detected (default) 1 : standard dcp is detected 1 r cdp 0 report of the charging downstream port detection 0 : charging downstream port is not detected (default) 1 : charging downstream port is detected 0 r sdp 0 report of the standard usb port detection 0 : standard usb port is not detected (default) 1 : standard usb port is detected
30 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg dpdm2 dpdm2 0x13 0x20 bit mode name reset value bit [7:5] r/w reserved 001 reserved [4:3] r reserved 00 reserved [2:0] r usb status 000 usb status 000 : no vbus (default) 001 : vbus flow is under going 010 : sdp (ssdport_chd = 1 & dcdt=0) 011 : sdp nstd (ssdport_chd = 1 & dcdt = 1) 100 : dcp (sdcport_chd = 1) 101 : cdp (scdport_chd = 1) name function addr reset chg dpdm3 dpdm3 0x14 0x20 bit mode name reset value description [7:2] r/w reserved 001000 reserved 1 r dcdt_status 0 data contact timeout status 0 : data contact timeout is not expired 1 : date contact timeout is expired 0 r chgdet_status 0 bc detection output 0 : charger port (dcp and cdp) is not detected 1 : charger port (dcp and cdp) is detected name function addr reset chg_pump pump 0x18 0x20 bit mode name reset value description 7 r/w ppoff_rst_dis 0 system reset function disable bit 0 : system reset enable (default) 1 : system reset disable [6:2] r/w reserved 001000 reserved 1 r/w vg_lvl_sel 0 charge pump pumping level selection 0 : 5v (default) 1 : 10v 0 r/w vg_en 0 charge pump enable/disable 0 : disable (default) 1 : enable
31 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg_ctrl17 charger control 17 0x19 0x00 bit mode name reset value description 7 r/w en_pumpx 0 enable mtk pump express pulse 0 : disable (default) 1 : allow mtk pump express pulse 6 r/w pumpx_2.0_1.0 0 mtk pump express 2.0 / 1.0 enable 0 : pe1.0 enable (default) 1 : pe 2.0 enable 5 r/w pumpx_up_dn 0 mtk pump express 1.0 voltage up/down enable 0 : pe 1.0 voltage down enable (default) 1 : pe 1.0 voltage up enable [4:0] r/w pumpx_dec 00000 mtk pump express 2.0 voltage request setting 00000 : 5.5v (default) 00001 : 6v 00010 : 6.5v ? 00111 : 9v ? 01101 : 12v 01110 : 12.5v 01111 : 13v 10000 : 13.5v 10001 : 14v 10010 : 14.5v 10011 : reserved ? 11101 : reserved 11110 : adapter healthy self-testing 11111 : disable cable drop compensation
32 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg_ctrl18 charger control 18 0x1a 0x40 bit mode name reset value description [7:6] r/w reserved 01 reserved [5:3] r/w bat_comp 000 battery ir compensation resistor setting 000 : 0m ? (default) 001 : 25m ? 010 : 50m ? 011 : 75m ? 100 : 100m ? 101 : 125m ? 110 : 150m ? 111 : 175m ? [2:0] r/w vclamp 000 battery ir compensation maximum voltage clamp 000 : 0mv (default) 001 : 32mv 010 : 64mv 011 : 96mv 100 : 128mv 101 : 160mv 110 : 192mv 111 : 224m v name function addr reset chg_dirchg1 dirchg1 0x1b 0x58 bit mode name reset value description 7 r/w sdirchg_uc_en 0 direct charge under-current (uc) protection enable 0 : disable (default) 1 : enable 6 r/w sdirchg_ov_en 1 direct charge over-voltage protection enable 0 : disable 1 : enable (default) [5:4] r/w sdirchg_ov_lvl[1:0] 01 direct battery ovp protection level selection 00 : 104% of voreg 01 : 108% of voreg (default) 10 : 119% of voreg 11 : disable 3 r/w sdirchg_oc_en 1 direct charge over-current (oc) protection enable 0 : disable 1 : enable (default) [2:0] r/w sdirchg_oc_lvl[2:0] 000 direct charge over-current protection level setting 000 : 4a (default) 001 : 4.5a 010 : 5a 011 : 5.5a 100 : 6a 101~111 : 6.5a
33 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg_dirchg2 dirchg2 0x1c 0xb1 bit mode name reset value description 7 r/w dirchg_wdt_trst 1 waiting timer to disable direct charge path after watchdog is asserted 0 : 200ms 1 : 500ms (default) [6:4] r/w dirchg_wdt[2:0] 011 direct charge watch dog timer setting: 000 : disable 001 : 0.125s 010 : 0.25s 011 : 0.5s (default) 100 : 1s 101 : 2s 110 : 4s 111 : 8s [3:2] r/w dirchg_vdeg[1:0] 00 direct charge ov protection deglitch time 00 : 0us (default) 01 : 2us 10 : 8us 11 : 16us [1:0] r/w dirchg_ideg[1:0] 01 direct charge oc and uc protection deglitch time 00 : 0ms 01 : 1ms (default) 10 : 5ms 11 : 10m s name function addr reset chg_dirchg3 dirchg3 0x1d 0x24 bit mode name reset value description 7 r/w sdirchg_vbusov_ en 0 direct charge vbusov protection enable 0 : disable (default) 1 : enable [6:2] r/w sdirchg_vbusov_ lvl[4:0] 01001 direct charge vbusov protection level 00000 : 3.9v 00001 : 4.0v ??? 00110 : 4.5v 00111 : 4.6v 01000 : 4.7v 01001 : 4.8v (default) ??? 11110 : 6.9v 11111 : 7.0v [1:0] r/w reserved 00 reserved
34 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg_stat chg stat 0x42 0x00 bit mode name reset value description [7:6] r chg_stat 00 charger status bit 00 : ready 01 : charge in progress 10 : charge done 11 : fault 5 r vbat_lvl 0 battery voltage level for operation mode 0 : charger operate in pre-charge 1 : charger operate in fast-charge level 4 r vbat_trickle 0 battery voltage level for operation mode 0 : charger does not operate in trickle level 1 : charger operates in trickle level 3 r boost_stat 0 boost mode status 0 : not in boost mode 1 : in boost mode 2 r bst_vbusov_stat 0 boost mode vbus over-voltage protection (vbus ovp) status 0 : boost vbus ovp does not occur 1 : boost vbus ovp occurs 1 r dirchg_fault 0 direct charge fault status 0 : fault does not occurs in direct charge mode 1 : fault occurs in direct charge mode 0 r adc_stat 0 adc status 0 : adc is idle 1 : adc is under conversion name function addr reset device_id device_id 0x40 0xa3 bit mode name reset value description [7:4] r vendor[3:0] 1010 vendor ic [3:0] r chip_rev[3:0] 0011 chip version : 0001 = a, 0010 = b, 0011 = c?etc
35 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg_ntc chg ntc 0x43 0x00 bit mode name reset value description 7 r reserved 0 reserved [6:4] r bat_ntc_fault[2:0] 000 bat ntc fault status 000 : normal 010 : warm 011 : cool 101 : cold 110 : hot 3 r reserved 0 reserved [2:0] r bus_ntc_fault[2:0] 000 bus ntc fault status 000 : normal 010 : warm 011 : cool 101 : cold 110 : hot name function addr reset adc_data_h adc data h 0x44 0x00 bit mode name reset value description [7:0] r adc_codeh[7:0] 00000000 adc high-byte code name function addr reset adc_data_l adc data l 0x45 0x00 bit mode name reset value description [7:0] r adc_codel[7:0] 00000000 adc low-byte code
36 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg_statc chg statc 0x50 0x00 bit mode name reset value description 7 r pwr_rdy 0 power ready status bit 0 : input power is bad, vbus > vovp or vbus < vuvlo or vbus < bats + vslp 1 : input power is good, uvlo < vbus < vovp & vbus > bats + vslp 6 r chg_mivr 0 charger warning status. input voltage mivr loop active. 0 : mivr loop is not active 1 : mivr loop is active 5 r chg_aicr 0 charger warning status. input current aicr loop active. 0 : aicr loop is not active 1 : aicr loop is active 4 r chg_treg 0 charger warning. thermal regulation loop active. 0 : thermal regulation loop is not active 1 : thermal regulation loop is active [3:1] r reserved 000 reserved 0 r dirchg_on 0 direct charge path on/off status 0 : direct charge path is off 1 : direct charge path is on name function addr reset chg_fault chg fault 0x51 0x00 bit mode name reset value description 7 r chg_vbusov 0 vbus over-voltage protection. set when vbus > vbus_ovp is detected. 0 : vbus is not over voltage 1 : vbus is over voltage 6 r chg_vbatov 0 charger fault. battery ovp. 0 : battery is not ovp 1 : battery is ovp 5 r chg_vsysov 0 charger fault. system ovp. 0 : system is not ovp 1 : system is ovp 4 r chg_vsysuv 0 charger fault. system uvp. 0 : system is not uvp 1 : system is uvp [3:0] r reserved 0000 reserved
37 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset ts_statc ts statc 0x52 0x00 bit mode name reset value description 7 r ts_bat_hot 0 bat temperature status indication 0 : normal temperature 1 : temperature is hot 6 r ts_bat_warm 0 bat temperature status indication 0 : normal temperature 1 : temperature is warm 5 r ts_bat_cool 0 bat temperature status indication 0 : normal temperature 1 : temperature is cool 4 r ts_bat_cold 0 bat temperature status indication 0 : normal temperature 1 : temperature is cold 3 r ts_bus_hot 0 bus temperature status indication 0 : normal temperature 1 : temperature is hot 2 r ts_bus_warm 0 bus temperature status indication 0 : normal temperature 1 : temperature is warm 1 r ts_bus_cool 0 bus temperature status indication 0 : normal temperature 1 : temperature is cool 0 r ts_bus_cold 0 bus temperature status indication 0 : normal temperature 1 : temperature is cold
38 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg_irq1 chg irq 1 0x53 0x00 bit mode name reset value description 7 r/c otpi 0 thermal shutdown fault 0 : no operation 1 : event occurs 6 r/c chg_rvpi 0 charger reverse protection fault 0 : no event occurs 1 : event occurs 5 r/c chg_adpbadi 0 charger bad adapter fault 0 : no event occurs 1 : event occurs 4 r/c chg_batabsi 0 battery absence fault 0 : no event occurs 1 : event occurs 3 r/c chg_tmri 0 charger timer time-out fault 0 : no event occurs 1 : event occurs 2 r/c chg_statci 0 status of each chg_statc register (reg0x50) is changed 0 : no event occurs 1 : event occurs 1 r/c chg_faulti 0 status of each chg_fault register (reg0x51) is changed 0 : no event occurs 1 : event occurs 0 r/c ts_statci 0 status of each ts_statc register (reg0x52) is changed 0 : no event occurs 1 : event occurs
39 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg_irq2 chg irq 2 0x54 0x00 bit mode name reset value description 7 r/c chg_ieoci 0 charging current is lower than eoc current ever occurs 0 : no event occurs 1 : event occurs 6 r/c chg_termi 0 charge terminated event 0 : no event occurs 1 : event occurs 5 r/c chg_rechgi 0 re-charge behavior ever occurs. 0 : no event occurs 1 : event occurs 4 r/c ssfinishi 0 charger or boost?mode soft-start finishes event 0 : no event occurs 1 : event occurs 3 r/c wdtmri 0 watch dog timer timeout fault 0 : no event occurs 1 : event occurs 2 r/c chgdet_donei 0 charger-type detection done event 0 : no event occurs 1 : event occurs 1 r/c chg_ichgmeasi 0 ichg measurement function done event 0 : no event occurs 1 : event occurs 0 r/c chg_aiclmeasi 0 aicl measurement function done event 0 : no event occurs 1 : event occurs name function addr reset chg_irq3 chg irq 3 0x55 0x00 bit mode name reset value description 7 r/c bst_olpi 0 boost over-load protection event 0 : no event occurs 1 : event occurs 6 r/c bst_midovi 0 boost pmid ovp fault event 0 : no event occurs 1 : event occurs 5 r/c bst_batuvi 0 boost low voltage input fault event 0 : no event occurs 1 : event occurs [4:2] r/w reserved 000 reserved 1 r/c pumpx_donei 0 mtk pump express function done event 0 : no event occurs 1 : event occurs 0 r/c adc_donei 0 adc measurement done event 0 : no event occurs 1 : event occurs
40 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset dpdm_irq dpdm irq 0x56 0x00 bit mode name reset value description 7 r/c dcdti 0 data contact detection event 0 : data contact detection timeout is not detected 1 : data contact detection timeout is detected when dcdt goes from 0 to 1 6 r/c chgdeti 0 output of usb charger detection. the bit will be set to 1 if comn > vdat_ref & comn < vlgc 0 : comn < vdat_ref or comn > vlgc (charger port is not detected) 1 : comn > vdat_ref & comn < vlgc (charger port is detected) when chgdet goes from 0 to 1 5 r/c hvdcp deti 0 hvdcp detect event 0 : hvdcp not detected by dcp?s pulling d- to gnd 1 : hvdcp detected by dcp?s pulling d- to gnd [4:2] r/c reserved 000 reserved 1 r/c detach_i 0 vbus detach, when vbuspg_d goes from 1 to 0 0 : no event occurs 1 : event occurs 0 r/c attach_i 0 vbus attach, when dcp std (reg0x12[2]) goes from 0 to 1 or when cdp (reg0x12[1]) goes from 0 to 1 or when sdp (reg0x12[0]) goes from 0 to 1 0 : no event occurs 1 : event occurs name function addr reset dpdm_irq dpdm irq 0x58 0x00 bit mode name reset value description 7 r/c dirchg_ovi 0 direct charge ov protection event 0 : no event occurs 1 : event occurs 6 r/c dirchg_oci 0 direct charge oc protection event 0 : no event occurs 1 : event occurs 5 r/c dirchg_uci 0 direct charge uc protection event 0 : no event occurs 1 : event occurs 4 r/c dirchg_wdtmri 0 direct charge watch dog timer event 0 : no event occurs 1 : event occurs 3 r/c dirchg_vgoki 0 direct charge path ready indicator event 0 : no event occurs 1 : direct charge path is ready 2 r/c dirchg_vbusovi 0 direct charge vbus ov protection event 0 : no event occurs 1 : event occurs [1:0] r/c reserved 000 reserved
41 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg_statc_ctrl chg statc ctrl 0x60 0xff bit mode name reset value description 7 r/w pwr_rdym 1 power ready interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 6 r/w chg_mivrm 1 input voltage mivr loop active interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 5 r/w chg_aicrm 1 input current aicr loop active interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 4 r/w chg_tregm 1 thermal regulation loop active interrupt mask 0 : interrupt is not masked 1 : interrupt is masked [3:1] r/w reserved 111 reserved 0 r dirchg_onm 1 direct charge path on/off interrupt mask 0 : interrupt is not masked 1 : interrupt is masked name function addr reset chg_fault_ctrl chg fault ctrl 0x61 0xf0 bit mode name reset value description 7 r/w chg_vbusovm 1 vbus over-voltage protection interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 6 r/w chg_vbatovm 1 battery ovp interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 5 r/w chg_vsysovm 1 system ovp interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 4 r/w chg_vsysuvm 1 system uvp interrupt mask 0 : interrupt is not masked 1 : interrupt is masked [3:0] r/w reserved 0000 reserved
42 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset ts_statc_ctrl ts statc ctrl 0x62 0xff bit mode name reset value description 7 r/w ts_bat_hotm 1 bat temperature status interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 6 r/w ts_bat_warmm 1 bat temperature status interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 5 r/w ts_bat_coolm 1 bat temperature status interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 4 r/w ts_bat_coldm 1 bat temperature status interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 3 r/w ts_bus_hotm 1 bus temperature status interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 2 r/w ts_bus_warmm 1 bus temperature status interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 1 r/w ts_bus_coolm 1 bus temperature status interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 0 r/w ts_bus_coldm 1 bus temperature status interrupt mask 0 : interrupt is not masked 1 : interrupt is masked
43 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg_irq1_ctrl chg irq 1 ctrl 0x63 0xff bit mode name reset value description 7 r/w otpm 1 thermal shutdown fault interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 6 r/w chg_rvpm 1 charger reverse protection fault interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 5 r/w chg_adpbadm 1 charger bad adapter fault interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 4 r/w chg_batabsm 1 battery absence fault interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 3 r/w chg_tmrm 1 charger timer time-out fault interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 2 r/w chg_statcm 1 status of each chg_statc register (0x50) changed interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 1 r/w chg_faultm 1 status of each chg_fault register (0x51) changed interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 0 r/w ts_statcm 1 status of each ts_statc register (0x52) changed interrupt mask 0 : interrupt is not masked 1 : interrupt is masked
44 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg_irq2_ctrl chg irq 2 ctrl 0x64 0xff bit mode name reset value description 7 r/w chg_ieocm 1 charging current is lower than eoc current interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 6 r/w chg_termm 1 charge termination event interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 5 r/w chg_rechgm 1 re-charge behavior interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 4 r/w ssfinishm 1 charger or boost-mode soft-start finishes event interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 3 r/w wdtmrm 1 watch dog timer timeout fault interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 2 r/w chgdet_donem 1 charger-type detection done event interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 1 r/w chg_ichgmeasm 1 ichg measurement function done event interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 0 r/w chg_aiclmeasm 1 aicl measurement function done event interrupt mask 0 : interrupt is not masked 1 : interrupt is masked
45 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg_irq3_ctrl chg irq 3 ctrl 0x65 0xff bit mode name reset value description 7 r/w bst_olpm 1 boost overload protection event interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 6 r/w bst_midovm 1 boost pmid ovp fault event interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 5 r/w bst_batuvm 1 boost low-voltage input fault event interrupt mask 0 : interrupt is not masked 1 : interrupt is masked [4:2] r/w reserved 111 reserved 1 r/w pumpx_donem 1 mtk pump express function done event interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 0 r/w adc_donem 1 adc measurement done event interrupt mask 0 : interrupt is not masked 1 : interrupt is masked name function addr reset dpdm_irq_ctrl dpdm irq ctrl 0x66 0xff bit mode name reset value description 7 r/w dcdtm 1 data contact detection event interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 6 r/w chgdetm 1 output of usb charger detection interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 5 r/w hvdcp detm 1 hvdcp detection event interrupt mask 0 : interrupt is not masked 1 : interrupt is masked [4:2] r/w reserved 111 reserved 1 r/w detach_m 1 vbus detach event interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 0 r/w attach_m 1 vbus attach event interrupt mask 0 : interrupt is not masked 1 : interrupt is masked
46 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. name function addr reset chg_irq5_ctrl chg irq 5 ctrl 0x68 0xff bit mode name reset value description 7 r/w dirchg_ovm 1 direct charge ov protection event interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 6 r/w dirchg_ocm 1 direct charge oc protection event interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 5 r/w dirchg_ucm 1 direct charge uc protection event interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 4 r/w dirchg_wdtmr m 1 direct charge watch dog timer event interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 3 r/w dirchg_vgokm 1 direct charge path ready indicator event interrupt mask 0 : interrupt is not masked 1 : interrupt is masked 2 r/w dirchg_vbuso vm 1 direct charge vbus ov event interrupt mask 0 : interrupt is not masked 1 : interrupt is masked [1:0] r/w reserved 11 reserved
47 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. application information direct charge transition from fast charge to direct charge : (1) bypass_mode = 1 (0x02, bit5), the switching charger is disabled, and the batfet will be turned on to sustain the system loading to prevent shutdown. (2) vg_en = 1 (0x18, bit0), the internal charge pump is enabled to turn on the external nmosfet, enabling the direct charge path, which is through pmid to bat. transition from direct charge to fast charge : (1) vg_en = 0 (0x18, bit0), the internal charge pump is disabled, and the batfet is kept turned on for continuous system operation. (2) bypass_mode = 0 (0x02, bit5), the switching charger is enabled. protections for direct charge (1) uc : low charge current (around 600ma) protection in direct charge mode against input source having been removed. (2) ovp of battery : 0x1b (bit 6-4) is for battery-ovp- related setting, including this function is enabled or not and user-programmable vbatov range, from 104% to 119%. (3) ovp of vbus : 0x1d byte is for vbus-ovp-related setting, including this function is enabled or not and user- programmable vbusov range, from 3.9v to 7v . (4) oc : 0x1b (bit 3-0) is for direct-charge-current-related setting, including this function is enabled or not and user- programmable direct-charge over-current range, from 4a to 6.5a. (5) watch dog timer (wdt) : to prevent system from shutdown in direct charge status, the RT9468 also provide watch dog function which can set by 0x1c (bit 7 - 4). (6) protect deglitch time : the user-programmable deglitch time of the above protections can be set by 0x1c (bit 3 - 0) switching charger the switching charger integrates a synchronous pwm controller with power mosfets to provide minimum input voltage regulation (mivr), average input current regulation (aicr), high-accuracy current and voltage regulation, and charge termination. the charger also features otg (on-the-go) boost mode. the switching charger has three operation modes: charge mode, boost mode (otg-boost), and high-impedance mode. in charge mode, the charger supports a precision charging system for single cell batteries. in boost mode, the charger works as a boost converter to boost the battery voltage back to the vbus pin for sourcing otg devices. in high-impedance mode, the charger stops charging or boosting and operates at a low current sinking from the vbus pin or the battery to reduce power consumption when the device is in standby mode. charge mode operation minimum input voltage regulation (mivr) the switching charger features minimum input voltage regulation function to prevent input voltage drop due to insufficient current provided from the adapter or usb input. if mivr function is enabled, the input voltage decreases when the over-current condition of the input power source occurs. the vbus voltage is regulated at a predetermined voltage level which can be set as 3.9v to 13.4v per 0.1v by i2c interface. at this time, the current drawn by the switching charger equals to the maximum current value that the input power can provide at the predetermined voltage level, instead of the set value. pre-charge mode for life-cycle consideration, the battery cannot be charged with large current under low-battery condition. when the bat voltage is below pre-charge threshold voltage, the charger is in pre-charge mode with a weak charge current, which equals to the pre-charge current. there are two control loops in pre-charge mode : ichg and sysreg. if the battery voltage is lower than the sys voltage, the mosfet will not be fully turned on so that
48 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. charge current (i chg ) the charge current into a battery is determined by the power path sensing ron and ichg setting by i 2 c. the voltage between the sys and bat pins is regulated to the voltage control by ichg setting and the fast-charge currents are 100ma to 5000ma in a step of 100ma, programmed by i 2 c constant voltage mode the switching charger enters constant voltage mode when the bat voltage is closed to the output-charge voltage (v oreg ). in this mode, the charge current begins to decrease. for default settings (charge current termination is disabled), the switching charger does not turn off and always regulates the battery voltage at v oreg . however, once the charge current termination is enabled, the charger terminates if the charge current is below termination current (i eoc ) in constant-voltage mode. the output-charge voltage is set by the i 2 c interface. its range is from 3.9v to 4.71v in a step of 10mv. end-of-charge current (i eoc ) if the charger current termination is enabled, the end-of- charge current is determined by the termination current sense voltage (v eoc ). i eoc is set by the i 2 c interface from 100ma to 850ma in a step of 50ma. charge trip when input power source is plugged in, the RT9468 checks the current sourcing capability of the input power source when v bus exceeds 3.3v. the following conditions should be met to start battery charge. 1. v bus is below 14v (i.e. v bus_ovp ). the v sys is not equal to v bat . that is, the v sys can be powered from the buck rather than the low battery, which is in pre-charge mode. as a result, the system power can be guaranteed in this low-battery condition. fast-charge mode and settings as the bat voltage rises above v prechg , the charger enters fast-charge mode and starts charging. notice that the muic integrates input power source (ac adapter or usb input) detection. thus, the switching charger can set the charge current via options automatically. unlike the linear charger (ldo), the switching charger (buck converter) is like a current amplifier, where the current drawn by the switching charger is different from the current into the battery. average input current regulation (aicr) level and output charge current (i chg ) can be set independently. cycle-by-cycle current limit the switching charger has included a cycle-by-cycle current limit for output inductor. once the inductor current reaches the current limit, the charger stops charging immediately to prevent from over-current condition and damaging the device. note that this protection can never be disabled. average input current regulation (aicr) the aicr levels can be set via the i 2 c interface. for example, aicr100 mode limits the input current to 100ma, and aicr500 mode to 500ma. this function can be disabled, if not needed. the aicr current levels are in the range of 100ma to 3250ma with a resolution of 50ma. average input current level (aicl) the aicl levels can be set via the i 2 c interface (0x0e[7:0]). when iaicr is set to large current and the vbus voltage drops to the vmivr level, aicl measurement mechanism will decrease iaicr level step by step automatically until the vbus voltage exceeds aicl threshold voltage. iaicr aicl_vth[2:0] vbus vmivr chg_aiclmea sl (chg irq 2) tdeg_aicl_meas[1:0] aicl_max_meas_intvl
49 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. battery voltage level v bat battery charge current i bat trickle mode v bat < 2v 100ma pre-charge mode v bat < vprec (0x08, bit[7:4]) iprec (0x08, bit[3:0]) fast-charge mode v bat < voreg (0x04, bit[7:1]) charge current is determined by several control loops end-of-charge mode v bat = voreg (0x04, bit[7:1]) charge current decreases naturally 2. v bus is above 3.8v (i.e. v bad_adp ) when sinking 50ma (i.e. i bad_adp_sink ) during 30ms of detection period, t badadp_det . and this detection function can be disabled by adp_dis (0x0b, bit7) register bit. the charge modes as below, and the charge mode which the charger operates in will be determined according to the v bat level : in fast-charge mode, the input current limit can be selected by iinlmtsel (0x02, bit[3:2]). this flexible setting is suitable for wide applications of adapters. in addition, the RT9468 also provides charger warning statuses, such as mivr, aicr and treg (0x50, bit[6:4]), to host. there are 2 register bits, related to the lx switching of the RT9468 : 1. sel_swfreq (0x01, bit7) : ? if sel_swfreq is disabled (set to 0), the switching frequency is 1.5mhz (default). ? if sel_swfreq is enabled (set to 1), the switching frequency is 0.75mhz. 2. fixfreq (0x01, bit6) : ? if fixfreq is disable (set to 0), the charge switching frequency would be varied when vbus is closed to vbat. ? if fixfreq is enable (set to 1), the charger switching frequency is fixed. there are 3 enable bits, related to the charger. 1. cfo_en (0x02, bit1) : this bit is used to enable or disable the charger and boost. 2. chg_en (0x02, bit0) : when chg_en bit is disabled, power path mos will be turned off so that the zero charging current is derived. at this time, input power source continuously delivers power to the system without charging the battery. however, if the system load is larger than the input source current limit, the power path mos will be turned back on immediately to supply power to system. the chg_en bit function is same as ceb pin. 3. hz (0x01, bit2) : when hz bit is enabled, the most of the charger internal circuits will be turned off in order to reduce quiescent current. in end-of-charge mode, if eoc_en (0x09, bit3) is enabled, once the charge current is lower than ieoc (0x09, bit[7:4]) level and within chg_tedg_eoc (0x09, bit[2:0]), the RT9468 will send out int and chg_ieoci = 1 (0x54, bit7). then, the RT9468 will start to check statuses of the following three bits. 1. te (0x02, bit4) : if this bit is enabled, the power path will be turned off, and the buck of the charger will keep providing power to the system. 2. eoc_timer (0x07, bit[1:0]) : with chg_ieoc1 = 1, the power path will not be turned off. the RT9468 can keep charging the battery for 30 to 60 minutes to extend battery charging capacity. 3. batd_en (0x0b, bit6) : after charge is done, the RT9468 will start to sink a sink current of i bat_sink 375 a for about 256ms from the battery. if v bat drops to trigger the recharge function, it is to say the battery is not connected to the charger. the RT9468 will continue on battery detection for every two seconds. otg mode the RT9468 also supports otg mode. it not only provides several output current limit protection levels, but also has low battery protection for overall system considerations. the RT9468 can select switching frequency via sel_swfreq (0x01, bit7), whether the RT9468 already operates in otg mode or not. there are two ways to enable otg mode : 1. by way of software : through i 2 c to set opa_mode (0x01, bit0).
50 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. thermal condition of a battery can be monitored by ts pin. there are four sections which are implemented for jeita protection. based on r hot and r cold , r t1 and r t2 can be calculated with equation (1) and equation (2). herein, r hot is the ntc resistance of the battery over- temperature threshold, and r cold is the ntc resistance of the battery under-temperature threshold. r t1 = v regn x [ (1/ v t1 - 1/ v t4 )/(1 / r cold - 1 / r hot )] (1) r t2 = r t1 x [ 1 / (v regn / v t1 - r t1 / r cold - 1)] (2) v regn rt1 rt2 rth v ts qon temp. t1 t2 t3 t4 i chg /2 i chg charge current temp. t1 t2 t3 t4 v oreg -0.2v v oreg charge voltage norma l cool cold hot warm norma l cool cold hot warm vts low vts high 2. by way of hardware : through i 2 c to set otg_pin_en (0x01, bit1) and opa_mode (0x01, bit0). users can then use gpio to change the otg pin level to enter / exit otg mode. the RT9468 also provides uug_on (0x0d, bit1) bit, which can be applied to different applications 1. if otg mode and uug_on are enabled, the boost-mode output is on the vbus pin, which can be used for otg (on-the-go) mode in mobile phones. 2. if otg mode is enabled and uug_on bit is disabled, the boost-mode output is on the pmid pin. , which can be used in power banks, that is, adapter power can be delivered to pd (powered device) directly. shipping mode from manufacture to an end user, it may take long time for products to travel. in view of this, the RT9468 provides shipping mode to further minimize battery leakage. after enabling ship_mode (0x02, bit7), the RT9468 will shut down internal circuits to reduce quiescent current. the delay time for batfet to be turned off can be selected by batdet_dis_dly (0x02, bit6). below list several ways to exit shipping mode. 1. input power source is plugged in. 2. disable ship_mode bit. 3. pin is pulled from logic high to logic low within 1 second. 4. enable rst_reg (0x00, bit7) to reset all registers to default values. meidatek pump express+ (mtk, pe+) the RT9468 can provides an input current pulse to communicate with an mtk-pe+ high voltage adapter. when en_pumpx (0x19, bit7) is enabled, the host can increase or decrease adapter output voltage by setting pumpx_up_dn to the de sired value. after enabling either one of them, the RT9468 will generate a vbus current pattern for the mtk-pe+ adapter to automatically identify whether to increase or decrease output voltage (vbus pin). once the current pattern is finished, int will be triggered accordingly to request the processor to read the registers. jeita protection jeita protection is implemented in the RT9468 to achieve battery thermal protection. jeita guidelines were released in 2007. it includes warm and cool protection (cool section is between t1 and t2; warm section is between t3 and t4, see the figure below). when battery temperature is in warm section, the RT9468 will lower the charge voltage (v oreg ) by 200mv. if the battery is in cool section, the charger will reduce charge current (by half of cc mode current). the RT9468 will stop charging the battery if the battery temperature is lower than t1 or higher than t4.
51 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. the respective percentages of the voltages at t1~t4 are shown in the following table. no. parameter symbol condition ts regn v v units 1 t1 (0c) threshold v t1 v ts rising, as percentage to v regn 73.5 % 2 t1 hysteresis v t1_hys hysteresis, v ts falling 2 % 3 t2 (10c) threshold v t2 v ts rising, as percentage to v regn 68.5 % 4 t2 hysteresis v t2_hys hysteresis, v ts falling 2 % 5 t3 (45c) threshold v t3 v ts falling, as percentage to v regn 45 % 6 t3 hysteresis v t3_hys hysteresis, v ts rising 2 % 7 t4 (60c) threshold v t4 v ts falling, as percentage to v regn 34.5 % 8 t4 hysteresis v t4_hys hysteresis, v ts rising 2 % analog ir drop compensation since resistance between charger output and battery cell terminal will force to move from constant current mode to constant voltage mode too early and increase charging time. to speed up charging cycle, RT9468 provides analog ir drop compensation function to delivery maximum power to battery for extend constant current mode charging time. host(ap) can set ir compensation function by bat_com (0x1a bit[5:3]) and vclamp (0x1a bit[2:0]). v actual = v + min (i chg_actural x bat_com, v clamp ) chg stat there is one way to check RT9468's status : the RT9468 status is indicated in the register of address 0x42 as below. ? chg_stat : charger status ? boost_stat : boost mode status ? adc_stat : adc status. check whether adc is active or idle
52 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. int system read int_rez i ii iii 2ms there is no new event during system reading one event is triggered 0x51 triggers there is a new event during system reading one event is triggered one event is triggered int_rez trigger int 0x51 0x52 0x53 0x54 0x55 0x51 0x52 0x53 0x54 0x55 0x51 0x52 0x53 0x54 0x55 interrupt the RT9468 reports status to host (cpu, mcu, ec, or...etc.) by the int (interrupt to host) pin, which is an open-drain output. the int pin goes low when any fault occurs. it will be automatically reset when all the fault flags are cleared. the irq_pulse (0x01, bit3) provides a reminder function. if the system interrupts by the interrupt signal but does not take any action to check the registers, the int pin will be released with every 2 seconds and be triggered again. ilim pin for hardware protection, the RT9468 supports input current limit setting on the ilim pin by way of a resistor from ilim pin to ground. i inmax = k ilim / r ilim for example, if the input current limit is to be set as 2a with a typical input current limit factor k ilim as 355a , a resistor of 180 will then be chosen as the resistor from the ilim pin to ground. the actual input current limit is the minimum between the result of iinlmtsel (0x02, bit[3:2]) and ilim. the RT9468 int pin is used to indicate whether the any charging events occur. when ap (access point) detects a falling edge on the int pin, ap starts to read the int register 0x51 to 0x58 sequentially. however, if any of the events is triggered again during this checking period, it will be a miss. if any of the int registers does not be checked, the int_rez bit can help release the int pin with 2ms then reset it again in order to remind hot the missing events again. adc conversion operation flow the figure below shows the flow chart of adc conversion operation. adc conversion starts from selecting an adc channel by setting adc_in_sel (0x11, bit[7:4]) and enabling adc_start (0x11, bit0). after about 200ms of adc conversion time for a conversion to be completed, adc_donei (0x55, bit0) will be enabled and adc_stat (0x42, bit 0) will be disabled. the host can be informed that adc conversion is completed by reading the register bits.
53 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. the host can read adc high-byte codes from adc_codeh (0x44, bit 7-0) and low-byte codes from adc_codel (0x45, bit 7-0) to calculate the measured voltage /current /temperature data with respect to each adc channel. the table below shows measurement equations for various adc channels. when measuring ibus, the aicr setting need large 350ma at least. when measuring ibat, the ichg setting need large 1a at least. set adc channel adc_in_sel (0x11, bit[7-4]) and start adc conversion adc_start (0x11, bit[0]) = 1 adc conversion starts finish adc conversion check adc conversion complete adc_donei (0x55, bit0) = 1 or adc_stat (0x42, bit0) = 0 read adc code adc_codeh[7:0] adc_codel[7:0] and calculate measurement adc channel measurement equation measurement range vbus_div5 [(adc_codeh x 256) + adc_codel] * 25mv 1v to 22v vbus_div2 [(adc_codeh x 256) + adc_codel] * 10mv 1v to 9.8v vbat/vbats [(adc_codeh x 256) + adc_codel] * 5mv 0v to 4.9v vsys [(adc_codeh x 256) + adc_codel] * 5mv 0v to 4.9v regn [(adc_codeh x 256) + adc_codel] * 5mv 0v to 4.9v ts_bat/ts_bus [(adc_codeh x 256) + adc_codel] * 0.25% 0% to 100% ibus iaicr[5:0] setting ?? 400ma [(adc_codeh x 256) + adc_codel] * 50ma * 0.67 0a to 0.4a ibus iaicr[5:0] setting ?? 400ma [(adc_codeh x 256) + adc_codel] * 50ma 0a to 5a ibat / ibats ichg[5:0] setting 100 ma to 450ma [(adc_codeh x 256) + adc_codel] * 50ma * 0.57 0a to 0.45a ibat / ibats ichg[5:0] setting 500ma to 850ma [(adc_codeh x 256) + adc_codel] * 50ma * 0.63 0a to 0.85a ibat / ibats ichg[5:0] setting ? 900ma [(adc_codeh x 256) + adc_codel] * 50ma 0a to 5a temp_jc [(adc_codeh x 256) + adc_codel] * 2 o c - 40 o c ? 40 to 120 o c
54 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. i 2 c interface timing diagram the RT9468 acts as an i 2 c -bus slave. the i 2 c -bus master configures the settings for charge mode and boost mode by sending command bytes to the RT9468 via the 2-wire7 i 2 c -bus. after the start condition, the i 2 c master sends b7 12345678912 b6 b2 b1 b0 3456789123456789 c5 c4 c3 c2 c1 c0 w ack ack s p 0b4 ack scl sda a0 a1 a2 a3 a4 a5 a6 b5 c7 c6 b3 start 1 1 0 1 0 1 0 r/w b7 b6 b5 b4 b3 b2 b1 b0 c7 c6 c5 c4 c3 c2 c1 c0 stop the 2nd byte (data address, data) the 3rd byte (data) the 1st byte (slave address, r/w) a chip address. this address is seven bits long followed by an eighth bit which is a data direction bit (r/w). the second byte selects the register to which the data will be written. the third byte contains data to the selected register. figure 1. derating curve of maximum power dissipation thermal considerations the junction temperature should never exceed the absolute maximum junction temperature t j(max) , listed under absolute maximum ratings, to avoid permanent damage to the device. the maximum allowable power dissipation depends on the thermal resistance of the ic package, the pcb layout, the rate of surrounding airflow, and the difference between the junction and ambient temperatures. the maximum power dissipation can be calculated using the following formula : p d(max) = (t j(max) ? t a ) / ja where t j(max) is the maximum junction temperature, t a is the ambient temperature, and ja is the junction-to-ambient thermal resistance. for continuous operation, the maximum operating junction temperature indicated under recommended operating conditions is 125 c. the junction-to-ambient thermal resistance, ja , is highly package dependent. for a wqfn-32l 4x4 package, the thermal resistance, ja , is 27.8 c/w on a standard jedec 51-7 high effective-thermal- conductivity four-layer test board. the maximum power dissipation at t a = 25 c can be calculated as below : p d(max) = (125 c ? 25 c) / (27.8 c/w) = 3.59w for a wqfn-32l 4x4 package. the maximum power dissipation depends on the operating ambient temperature for the fixed t j(max) and the thermal resistance, ja . the derating curves in figure 1 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0 255075100125 ambient temperature (c) maximum power dissipation (w) 1 four-layer pcb layout consideration the RT9468 layout guideline is shown as follow. there are several suggestion are provided. ? agnd should be connected to pgnd at gnd plane. ? the capacitor of pmid should be as close as possible to RT9468 for reduce emi. ? the gnd path of pmid and vbus capacitor needs to connect directly at top layer. ? pgnd connects to thermal heat sink can improve thermal performance.
55 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. figure 2. pcb layout guide 0603r 0201c 7 6 5 4 3 2 sda scl d- d+ vbus RT9468 1 8 vbus vbus ts_bus 15 14 13 12 11 10 9 16 26 27 28 29 30 31 32 25 18 19 20 21 22 23 24 17 int otg ceb ilim ts_bat /qon ibat_sn ibat_sp bat_sn bat_sp bat sys pgnd pgnd sys bat pmid pmid pmid vg regn btst lx lx top layer inner layer1 inner layer2 bottom layer 0 4 0 2 c 0 6 0 3 c 0 6 0 3 c 0 6 0 3 c 0603c 0201c 2520l 0402c pmid gnd sys gnd vbus direct charge 0201c bat_sp detection i2c s s s g battery pack current sensing 5 6 7 8 1 2 3 4 gnd d d d d gnd bat_sn vg
56 ds9468-00 may 2017 www.richtek.com RT9468 ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. outline dimension symbol dimensions in millimeters dimensions in inches min max min max a 0.700 0.800 0.028 0.031 a1 0.000 0.050 0.000 0.002 a3 0.175 0.250 0.007 0.010 b 0.150 0.250 0.006 0.010 d 3.900 4.100 0.154 0.161 d2 2.650 2.750 0.104 0.108 e 3.900 4.100 0.154 0.161 e2 2.650 2.750 0.104 0.108 e 0.400 0.016 l 0.300 0.400 0.012 0.016 w-type 32l qfn 4x4 package note : the configuration of the pin #1 identifier is optional, but must be located within the zone indicated. det ail a pin #1 id and tie bar mark options 1 1 2 2
57 ds9468-00 may 2017 www.richtek.com RT9468 richtek technology corporation 14f, no. 8, tai yuen 1 st street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 richtek products are sold by description only. richtek reserves the right to change the circuitry and/or specifications without notice at any time. customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a richtek product. information furnish ed by richtek is believed to be accurate and reliable. however, no responsibility is assumed by richtek or its subsidiaries for its use; nor for any infringeme nts of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of r ichtek or its subsidiaries. footprint information p axaybxbyc*32c1*8d sxsy v/w/u/xqfn4*4-32 32 0.40 4.80 4.80 3.20 3.20 0.80 0.75 0.20 2.80 2.80 0.05 tolerance footprint dimension (mm) package number of pin

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