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Xilinx, Inc.
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| Part No. |
XC3S400AN-4FG484C XC3S400AN-4FG676C XC3S400AN-4FGG676C XC3S400AN-4FG676I XC3S400AN-4FGG484C XC3S400AN-4TQ144I XC3S400AN-4TQ144C XC3S400AN-4FGG676I XC3S400AN-4TQG144C XC3S400AN-4TQG144I
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| OCR Text |
...3s200an 200k 4,032 448 1792 28k 288k 16 4 195 90 1,168k 4m xc3s400an 400k 8,064 896 3,584 56k 360k 20 4 311 142 1,842k 4m xc3s700an 700k 13,...bit binary numbers as inputs and calculate the product. ? digital clock manager (dcm) blocks provi... |
| Description |
FPGA, 896 CLBS, 400000 GATES, 667 MHz, PBGA484 FBGA-484
FPGA, 896 CLBS, 400000 GATES, 667 MHz, PBGA676 FBGA-676
FPGA, 896 CLBS, 400000 GATES, 667 MHz, PBGA676 ROHS COMPLIANT, FBGA-676
FPGA, 896 CLBS, 400000 GATES, 667 MHz, PBGA484 ROHS COMPLIANT, FBGA-484
FPGA, 896 CLBS, 400000 GATES, 667 MHz, PQFP144 TQFP-144
FPGA, 896 CLBS, 400000 GATES, 667 MHz, PQFP144 ROHS COMPLIANT, TQFP-144
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| File Size |
1,691.31K /
112 Page |
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Xilinx, Inc.
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| Part No. |
XC3S400AN-4FGG400C XC3S400AN-4FG400C XC3S400AN-4FGG400I XC3S400AN-4FT256I XC3S400AN-4FG400I XC3S400AN-4FTG256C XC3S400AN-4FTG256I
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| OCR Text |
...s200an 200k 4,032 448 1,792 28k 288k 16 4 195 90 1,168k 4m xc3s400an 400k 8,064 896 3,584 56k 360k 20 4 311 142 1,842k 4m xc3s700an 700k 13,...bit binary numbers as inputs and calculate the product. ? digital clock manager (dcm) blocks provi... |
| Description |
Extended Spartan-3A FPGAs, Package: 4FGG400C FPGA, 896 CLBS, 400000 GATES, 280 MHz, PBGA400
FPGA, 896 CLBS, 400000 GATES, 280 MHz, PBGA400 21 X 21 MM, FBGA-400
FPGA, 896 CLBS, 400000 GATES, 280 MHz, PBGA400 21 X 21 MM, ROHS COMPLIANT, FBGA-400
FPGA, 896 CLBS, 400000 GATES, 667 MHz, PBGA256 FTBGA-256
FPGA, 896 CLBS, 400000 GATES, 667 MHz, PBGA256 ROHS COMPLIANT, FTBGA-256
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| File Size |
3,503.31K /
123 Page |
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Cypress Semiconductor, Corp.
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| Part No. |
CY39100V388B-83MGC CY39100V208B-125NTXC CY39050V208-125NTC
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| OCR Text |
... 302 222 7.5 10 ma 39k200 92k ? 288k 3072 384 96 428 181 8.5 20 ma notes: 1. upper limit of typical gates is calculated by as suming only 10...bit, 66-mhz pci core. the architecture is based on l ogic block clusters (lbc) that are connected ... |
| Description |
Delta39K™ ISR™ CPLDs at FPGA Densities™ LOADABLE PLD, 15 ns, PBGA388
Delta39K™ ISR™ CPLDs at FPGA Densities™ LOADABLE PLD, 10 ns, PQFP208
CPLDs at FPGA Densities LOADABLE PLD, 10 ns, PQFP208
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| File Size |
1,758.79K /
86 Page |
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it Online |
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Xilinx, Inc.
XILINX INC
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| Part No. |
XC3S50A-4VQ100C XC3S700A-5FG400C XC3S700A-5FT256C XC3S700A-4FGG484C XC3S50A-4VQ100I XC3S1400A-4FT256C XC3S1400A-5FTG256C
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| OCR Text |
... 200k 4,032 32 16 448 1,792 28k 288k 16 4 248 112 xc3s400a 400k 8,064 40 24 896 3,584 56k 360k 20 4 311 142 xc3s700a 700k 13,248 48 32 1,472...bit binary numbers as inputs and calculate the product. ? digital clock manager (dcm) blocks provi... |
| Description |
Extended Spartan-3A FPGAs, Package: 4VQ100C FPGA, PQFP100
FPGA, 1472 CLBS, 700000 GATES, 280 MHz, PBGA400
FPGA, PBGA256
Extended Spartan-3A FPGAs, Package: 4FGG484C
Extended Spartan-3A FPGAs, Package: 4FT256C
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| File Size |
2,317.13K /
128 Page |
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Xilinx, Inc.
XILINX INC
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| Part No. |
XC3S200-4VQ100I XC3S1000-4FTG256I XC3S200-4PQ208C XC3S200-4PQ208I XC3S200-4VQG100I XC3S200-5VQG100C XC3S200-4PQG208I XC3S50-4CPG132I XC3S5000-4FG900C XC3S1500-4FGG320I XILINXINC-XC3S2000-4FG456I
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| OCR Text |
...00 (2) 400k 8,064 32 28 896 56k 288k 16 4 264 116 xc3s1000 (2) 1m 17,280 48 40 1,920 120k 432k 24 4 391 175 xc3s1500 1.5m 29,952 64 52 3,328...bit binary numbers as inputs and calculate the product. ? digital clock manager (dcm) blocks provide... |
| Description |
200000 SYSTEM GATE 1.2 VOLT FPGA FPGA, 480 CLBS, 200000 GATES, 630 MHz, PQFP100
1000000 SYSTEM GATE 1.2 VOLT FPGA FPGA, 1920 CLBS, 1000000 GATES, 630 MHz, PBGA256
200000 SYSTEM GATE 1.2 VOLT FPGA FPGA, 480 CLBS, 200000 GATES, 630 MHz, PQFP208
200000 SYSTEM GATE 1.2 VOLT FPGA FPGA, 480 CLBS, 200000 GATES, 725 MHz, PQFP100
XC3S50-4CPG132I FPGA, 192 CLBS, 50000 GATES, 630 MHz, PBGA132
5000000 SYSTEM GATE 1.2 VOLT FPGA FPGA, 8320 CLBS, 5000000 GATES, 630 MHz, PBGA900
1500000 SYSTEM GATE 1.2 VOLT FPGA FPGA, 3328 CLBS, 1500000 GATES, 630 MHz, PBGA320
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| File Size |
2,193.63K /
217 Page |
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it Online |
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Xilinx
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| Part No. |
XC2S200E
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| OCR Text |
... features include block ram (to 288k bits), distributed ram (to 221,184 bits), 19 select- able i/o standards, and four dlls (delay-locked lo...bit true dual-port block ram fast interfaces to external ram - fully 3.3v pci compliant to 64 bits ... |
| Description |
(XC2SxxxE) Spartan IIE 1.8V FPGA Family
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| File Size |
836.47K /
103 Page |
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it Online |
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Xilinx
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| Part No. |
XC2S400E6FXXX
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| OCR Text |
... Features include block RAM (to 288K bits), distributed RAM (to 221,184 bits), 19 selectable I/O standards, and four DLLs (Delay-Locked Loop...bit synchronous RAM. Furthermore, the two LUTs within a slice can be combined to create a 16 x 2-bit... |
| Description |
Spartan-IIE 1.8V FPGA Family
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| File Size |
780.94K /
103 Page |
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it Online |
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XILINX INC
Xilinx, Inc.
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| Part No. |
XC2S200E-6FG676C XC2S200E-6FG676I XC2S200E-6FGG456C XC2S200E-6FGG456I XC2S200E-6FGG676C XC2S200E-6FGG676I XC2S200E-6FTG256C XC2S200E-6FTG256I XC2S200E-6PQG208C XC2S200E-6PQG208I XC2S200E-6TQG144C XC2S200E-6TQG144I XC2S400E XC2S400E-6FG456C XC2S400E-6FG456I XC2S400E-6FG676C XC2S400E-6FG676I XC2S400E-6FGG456C XC2S400E-6FGG456I XC2S400E-6FGG676C XC2S400E-6FGG676I XC2S400E-6FT256C XC2S400E-6FT256I XC2S400E-6FTG256C XC2S400E-6FTG256I XC2S400E-6PQ208C XC2S400E-6PQ208I XC2S400E-6PQG208C XC2S400E-6PQG208I XC2S400E-6TQ144C XC2S400E-6TQ144I XC2S400E-6TQG144C XC2S400E-6TQG144I XC2S400E-7FG456C XC2S400E-7FG456I XC2S400E-7FG676C XC2S400E-7FG676I XC2S400E-7FGG456C XC2S400E-7FGG456I XC2S400E-7FGG676C XC2S50E-6FTG256C XC2S50E-7FTG256C XC2S100E-6FTG256C XC2S100E-7FTG256C XC2S150E-6FTG256C XC2S150E-7FTG256C XC2S200E-7FTG256C XC2S300E-6FTG256C XC2S300E-7FTG256C XC2S400E-7FTG256C XC2S600E-6FTG256C XC2S600E-7FTG256C XC2S600E XC2S600E-6FG456C XC2S600E-6FG456I XC2S600E-6FG676C XC2S600E-6FG676I XC2S600E-6FGG456C XC2S600E-6FGG456I XC2S600E-6FGG676C XC2S600E-6FGG676I XC2S600E-6FT256C XC2S600E-6FT256I XC2S600E-6FTG256I XC2S600E-6PQ208C XC2S600E-6PQ208I XC2S600E-6PQG208C XC2S600E-6PQG208I XC2S600E-6TQ144C XC2
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| OCR Text |
... Features include block RAM (to 288K bits), distributed RAM (to 221,184 bits), 19 selectable I/O standards, and four DLLs (Delay-Locked Loop...bit true dual-port block RAM
Typical System Gate Range (Logic and RAM) 23,000 - 50,000 37,000 - 100... |
| Description |
Second generation ASIC replacement technology
FPGA, 864 CLBS, 52000 GATES, 357 MHz, PBGA676
100,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN FPGA, 864 CLBS, 52000 GATES, 357 MHz, PBGA256
400000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN FPGA, 864 CLBS, 52000 GATES, 357 MHz, PBGA456
300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN FPGA, 1536 CLBS, 93000 GATES, 400 MHz, PBGA456
Spartan-IIE FPGA
Product Availability
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| File Size |
957.68K /
108 Page |
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it Online |
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