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Xilinx
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| Part No. |
XC2S300E-6PQ208C
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| OCR Text |
... Features include block RAM (to 288K bits), distributed RAM (to 221,184 bits), 19 selectable I/O standards, and four DLLs (Delay-Locked Loops). Fast, predictable interconnect means that successive design iterations continue to meet timing r... |
| Description |
IC,FPGA,6912-CELL,CMOS,QFP,208PIN,PLASTIC
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| File Size |
41.78K /
4 Page |
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it Online |
Download Datasheet
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Xilinx, Inc.
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| Part No. |
XC2S50E-6PQG208C XC2S300E-6PQG208I
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| OCR Text |
... features include block ram (to 288k bits), distributed ram (to 221,184 bits), 19 select- able i/o standards, and four dlls (delay-locked lo...bit true dual-port block ram fast interfaces to external ram - fully 3.3v pci compliant to 64 bits ... |
| Description |
50,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN FPGA, 384 CLBS, 23000 GATES, 357 MHz, PQFP208
300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN FPGA, 1536 CLBS, 93000 GATES, 357 MHz, PQFP208
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| File Size |
810.82K /
103 Page |
View
it Online |
Download Datasheet |
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