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For depth Found Datasheets File :: 10567    Search Time::1.094ms    
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    Micron Technology, Inc.
Part No. MT58L128L32D1
OCR Text ...? three chip enables for simple depth expansion and address pipelining ? clock-controlled and registered addresses, data i/os and control signals ? internally self-timed write cycle ? burst control pin (interleaved or linear burst) ? automa...
Description 128K x 32锛?.3V I/O Pipelined, DCD SyncBurst SRAM(4Mb锛?.3V杈??/杈??锛??姘寸嚎寮????惊???娑???╋??????????瀛???ī

File Size 418.97K  /  24 Page

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    CYPRESS SEMICONDUCTOR CORP
Part No. MT58L128L32D1F-6
OCR Text ... three chip enables for simple depth expansion and address pipelining  clock-controlled and registered addresses, data i/os and control signals  internally self-timed write cycle  burst control pin (interleaved or linear burst)  automa...
Description 128K X 32 CACHE SRAM, 3.5 ns, PBGA165

File Size 437.01K  /  26 Page

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    CYPRESS SEMICONDUCTOR CORP
Part No. MT58L128L32D1F-5
OCR Text ...? three chip enables for simple depth expansion and address pipelining ? clock-controlled and registered addresses, data i/os and control signals ? internally self-timed write cycle ? burst control pin (interleaved or linear burst) ? automa...
Description 128K X 32 STANDARD SRAM, 2.8 ns, PBGA165

File Size 429.23K  /  25 Page

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    QL8050 QL8150 QL8250 QL8025 QL8325

ETC[ETC]
Part No. QL8050 QL8150 QL8250 QL8025 QL8325
OCR Text ...lly to increase their effective depth as shown in )LJXUH . 2,304-bit RAM Module MODE[1:0] WA[9:0] WD[17:0] WE WCLK ASYNCRD RA[9:0] RD[17:0] RE RCLK )LJXUH ELW 5$0 0RGXOH The number of RAM modules varies from 4 to 24 blocks for a ...
Description LOW POWER FPGA COMBINING PERFORMANCE DENSITY AND EMBEDED RAM

File Size 442.48K  /  49 Page

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    SAMSUNG SEMICONDUCTOR CO. LTD.
SAMSUNG[Samsung semiconductor]
Part No. M366S1724CT0-C1L M366S1724CT0-C1H
OCR Text ...ge) Manufacturer part # (Module depth) ...... Manufacturer part # (Module depth) Manufacturer part # (Refresh, # of banks in Comp. & interface) Manufacturer part # (Composition component) Manufacturer part # (Component revision) Manufacture...
Description PC100 Unbuffered DIMM(168pin) SPD Specification(128Mb C-die base)

File Size 54.11K  /  7 Page

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    RENESAS[Renesas Electronics Corporation]
Part No. M5M5V5636GP-16
OCR Text ...* Three chip enables for simple depth expansion PART NAME M5M5V5636GP-16 Operate frequency Access Cycle Active Current (max.) Standby Current (max.) 167MHz 133MHz 3.8ns 4.2ns 6.0ns 7.5ns 380mA 350mA 30mA 30mA 1/18 M5M5V...
Description Memory>Fast SRAM>Network SRAM
18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM

File Size 684.36K  /  18 Page

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    RENESAS[Renesas Electronics Corporation]
Part No. M5M5V5A36GP-85 M5M5V5A36GP M5M5V5A36GP-75
OCR Text ...* Three chip enables for simple depth expansion FUNCTION Synchronous circuitry allows for precise cycle control triggered by a positive edge clock transition. Synchronous signals include : all Addresses, all Data Inputs, all Chip Enable...
Description Memory>Fast SRAM>Network SRAM
18874368-BIT(524288-WORD BY 36-BIT) Flow-Through NETWORK SRAM

File Size 373.96K  /  19 Page

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    ECO350UPS

List of Unclassifed Manufacturers
List of Unclassifed Man...
Part No. ECO350UPS
OCR Text ...y form factor (height x width x depth / inches) 3 x 8 x 6.4 ups / power module dimensions in primary form factor (height x width x depth / cm) 7.5 x 20.4 x 16.1 ups / power module weight (lbs) 5.2 ups / power module weight (kg) 2.4 ups ship...
Description Eco 350VA Energy-saving Standby 120V UPS with USB port

File Size 517.27K  /  6 Page

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    CYRS1542AV18 CYRS1544AV18

Cypress Semiconductor
Part No. CYRS1542AV18 CYRS1544AV18
OCR Text ...orts separate port selects for depth expansion synchronous internally self-timed writes qdr ? ii operates with 2.0 cycle r ead latency w hen delay lock loop (dll) is enabled available in 18 and 36 configurations full data coherenc...
Description 72-Mbit QDR II SRAM Two-Word Burst Architecture

File Size 422.24K  /  33 Page

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    Dynex Semiconductor Ltd.
DYNEX[Dynex Semiconductor]
Part No. MA1916
OCR Text ...ach of 223 bytes. An interleave depth of 5 is the maximum recommended by the CCSDS standard. This will allow correction of up to 80 sequencial bytes in a data packet. The RS encoder operates from a clock input CLK which must be driven at tw...
Description Radiation Hard Reed-Solomon & Convolution Encoder

File Size 94.45K  /  11 Page

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