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| Part No. |
JTD125ID
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| OCR Text |
...ing time delay jtd_id offers a patented, true dual-element design that is ideal for use in circuits with high, in-rush currents. the superior performance characteristics of jtd_id indicator fuses reduce nuisance fuse opening, and the blo... |
| Description |
TIME DELAY BLOW ELECTRIC FUSE, 125A, 600VAC, 500VDC, 200000A (IR), INLINE/HOLDER
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| File Size |
251.06K /
3 Page |
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STMicroelectronics N.V.
Atmel Corp
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| Part No. |
AT40K05 AT40K05LV AT40K10LV AT40K20LV AT40K40LV
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| OCR Text |
...The AT40K/AT40KLV FPGA offers a patented distributed 10 ns SRAM capability where the RAM can be used without losing logic resources. Multiple independent, synchronous or asynchronous, dual-port or single-port RAM functions (FIFO, scratch pa... |
| Description |
AT40K05/10/20/40(LV) Summary [Updated 5/02. 4 Pages] 5K - 50K Gate FPGA with DSP Optimized Core Cell and Distributed FreeRam. AT40K05/10/20/40（吕）摘要[更新5 / 024页] 5K - 5万门的FPGA与DSP优化的核心细胞和分布式FreeRam
From old datasheet system
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| File Size |
54.84K /
4 Page |
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Atmel corp
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| Part No. |
AT40KELNBSP AT40KEL
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| OCR Text |
...s. The AT40KAL/EL FPGA offers a patented distributed 11 - 13 ns SRAM capability where the RAM can be used without losing logic resources. Multiple independent, synchronous or asynchronous, dual port or single port RAM functions (FIFO, scrat... |
| Description |
Rad Tolerant FPGAs with FreeRAM
From old datasheet system
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| File Size |
451.96K /
40 Page |
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it Online |
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Price and Availability
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