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Intel, Corp.
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Part No. |
80960CF
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OCR Text |
...ltiplexed 32-bit burst bus with pipelining y 32-bit parallel architecture e two instructions/clock execution e load/store architecture e sixteen 32-bit global registers e sixteen 32-bit local registers e manipulate 64-bit bit fields e 11 ad... |
Description |
32-Bit High-Performance Superscalar Processor(32位高性能超标量处理器) 32位高性能超标量处理器2位高性能超标量处理器
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File Size |
1,014.42K /
62 Page |
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Intel, Corp.
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Part No. |
INTEL386DX
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OCR Text |
...perating systems. instruc- tion pipelining, on-chip address translation, ensure short average instruction execution times and maximum system throughput. the intel386 dx cpu offers new testability and debugging features. testability features... |
Description |
32-Bit CHMOS Microprocessor With Integrated Memory Management(32位CHMOS 微处理器带集成存储管 32位CHMOS微处理器集成内存管理2位CHMOS微处理器带集成存储管理)
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File Size |
1,620.63K /
139 Page |
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Holtek
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Part No. |
HT82K72A
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OCR Text |
...n and enhanced performance. the pipelining scheme is implemented in such a way that instruction fetching and instruction exe - cution are overlapped, hence instructions are effectively executed in one cycle, with the exception of branch or ... |
Description |
One Channel Keyboard
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File Size |
399.88K /
44 Page |
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it Online |
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Intel Corp.
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Part No. |
80960CA-25 80960CA-16
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OCR Text |
...ltiplexed 32-bit burst bus with pipelining y 32-bit parallel architecture e two instructions/clock execution e load/store architecture e sixteen 32-bit global registers e sixteen 32-bit local registers e manipulates 64-bit bit fields e 11 a... |
Description |
SPECIAL ENVIRONMENT 80960CA-25, -16 32-BIT HIGH-PERFORMANCE EMBEDDED PROCESSOR
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File Size |
1,266.25K /
62 Page |
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Intel Corp.
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Part No. |
MILITARYI386
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OCR Text |
...tes/sec bus bandwidth e address pipelining allows use of slower/cheaper memories y integrated memory management unit e virtual memory support e optional on-chip paging e 4 levels of hardware enforced protection e mmu fully compatible with t... |
Description |
Military i386 SX Microprocessor(军用I386SX微处理器)
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File Size |
1,392.50K /
98 Page |
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Intel Corp.
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Part No. |
INTEL386SX
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OCR Text |
... two-clock bus cycles e address pipelining allows use of slower/cheaper memories y integrated memory management unit e virtual memory support e optional on-chip paging e 4 levels of hardware enforced protection e mmu fully compatible with t... |
Description |
32-Bit CPU With a 16-Bit External Data Bus And a 24-bit External Address Bus(6位内部数据总线4位内部地址总线32位微处理
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File Size |
1,190.17K /
102 Page |
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Holtek Semiconductor
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Part No. |
HT95R22
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OCR Text |
...n and enhanced performance. the pipelining scheme is implemented in such a way that instruction fetching and instruction execution are overlapped, hence instructions are effectively executed in one cycle, with the exception of branch or cal... |
Description |
I/O Type Phone 8-Bit MCU
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File Size |
459.12K /
52 Page |
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it Online |
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