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N/A
Altera Corp
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| Part No. |
EPM7032SLC44-10 EPM7128ELC84-20 EPM7128ELC84-15 EPM7128ELC84-10P EPM7128ELC84-10 EPM7064SLI44-7
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| OCR Text |
...sed programmable logic devices (plds) based on second-generation MAX(R) architecture 5.0-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available in MAX 7000S devices - ISP c... |
| Description |
MAX 7000 Programmable Logic Device
COMPLEX-EEPLD,128-CELL,10NS PROP DELAY,LDCC,84PIN,PLASTIC
COMPLEX-EEPLD,128-CELL,15NS PROP DELAY,LDCC,84PIN,PLASTIC
COMPLEX-EEPLD,128-CELL,20NS PROP DELAY,LDCC,84PIN,PLASTIC
COMPLEX-EEPLD,32-CELL,10NS PROP DELAY,LDCC,44PIN,PLASTIC
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| File Size |
436.37K /
62 Page |
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it Online |
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Altera
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| Part No. |
EPM7128SLC84-10
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| OCR Text |
...sed programmable logic devices (plds) based on second-generation MAX(R) architecture 5.0-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available in MAX 7000S devices - ISP c... |
| Description |
IC,COMPLEX-EEPLD,128-CELL,10NS PROP DELAY,LDCC,84PIN,PLASTIC
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| File Size |
473.32K /
66 Page |
View
it Online |
Download Datasheet |
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Lattice Semiconductor Corporation
LATTICE[Lattice Semiconductor]
http://
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| Part No. |
ISPLSI1024 ISPLSI1024EA-200LT100 1024EA ISPLSI1024EA-100LT100 ISPLSI1024EA-125LT100 ISPLSI1024EA ISPLS1024-100LT100 ISPLS1024-200LT100
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| OCR Text |
...OF USE AND FAST SYSTEM SPEED OF plds WITH THE DENSITY AND FLEXIBILITY OF FIELD PROGRAMMABLE GATE ARRAYS -- Complete Programmable Device Can Combine Glue Logic and Structured Designs -- Enhanced Pin Locking Capability -- Four Dedicated Clock... |
| Description |
200 MHz in-system prommable high density PLD
Shielded Paired Cable; Number of Conductors:8; Conductor Size AWG:28; No. Strands x Strand Size:7 x 36; Jacket Material:Polyethylene; Number of Pairs:4; Features:Alumunium Foil Polyester/Tinned Copper Braid; Impedance:120ohm RoHS Compliant: Yes
In-System Programmable High Density PLD
100 MHz in-system prommable high density PLD
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| File Size |
159.21K /
13 Page |
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it Online |
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lattice
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| Part No. |
LC4128V-10T100I
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| OCR Text |
...mable SuperFAST TM High Density plds
Data Sheet
Features
High Performance
Broad Device Offering
* Multiple temperature range support - Commercial: 0 to 90C junction (Tj) - Industrial: -40 to 105C junction (Tj) - Automotive: -40 t... |
| Description |
IC,COMPLEX-EEPLD,128-CELL,10.5NS PROP DELAY,QFP,100PIN,PLASTIC
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| File Size |
264.92K /
83 Page |
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it Online |
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Lattice Semiconductor Corp
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| Part No. |
LC4256 LC4384V75T176C LC4512 LC4128 LC4064 LC4032
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| OCR Text |
...mable SuperFAST TM High Density plds
Data Sheet
Features
High Performance
Broad Device Offering
* fMAX = 400MHz maximum operating frequency * tPD = 2.5ns propagation delay * Up to four global clock pins with programmable clock ... |
| Description |
IC,COMPLEX-EEPLD,256-CELL,3.8NS PROP DELAY,QFP,100PIN,PLASTIC
IC,COMPLEX-EEPLD,384-CELL,10NS PROP DELAY,QFP,176PIN,PLASTIC
IC,COMPLEX-EEPLD,512-CELL,4.5NS PROP DELAY,QFP,176PIN,PLASTIC
System Programmable Super Fast High Density plds
IC,COMPLEX-EEPLD,64-CELL,3.2NS PROP DELAY,QFP,100PIN,PLASTIC
IC,COMPLEX-EEPLD,32-CELL,3.2NS PROP DELAY,TQFP,48PIN,PLASTIC
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| File Size |
740.67K /
91 Page |
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it Online |
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XILINX INC
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| Part No. |
XCR3032A DS039 XCR3032A-6VQ44C
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| OCR Text |
...technique that has been used in plds since the bipolar era) with a cascaded chain of pure CMOS gates, the dynamic power is also substantially lower than any competing CPLD. These devices are the first TotalCMOS plds, as they use both a CMOS... |
| Description |
EE PLD, 6 ns, PQFP44
From old datasheet system
Product Specification
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| File Size |
297.55K /
16 Page |
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it Online |
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XILINX INC
Xilinx, Inc.
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| Part No. |
XCR3032C DS040 XCR3032C-12VQ44C
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| OCR Text |
...technique that has been used in plds since the bipolar era) with a cascaded chain of pure CMOS gates, the dynamic power is also substantially lower than any competing CPLD. These devices are the first TotalCMOS plds, as they use both a CMOS... |
| Description |
EE PLD, 12 ns, PQFP44
32 Macrocell CPLD with Enhanced Clocking(带增强时钟控制的32宏单元复杂可编程逻辑器件) 32宏单元CPLD增强型时钟（带增强时钟控制的32个宏单元复杂可编程逻辑器件
From old datasheet system
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| File Size |
297.73K /
16 Page |
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it Online |
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Philips
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| Part No. |
ISP1102
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| OCR Text |
...and Programmable Logic Devices (plds) with power supply voltages from 1.65 to 3.6 V to interface with the physical layer of the USB. The transceiver has an integrated 5 V-to-3.3 V voltage regulator for direct powering via the USB supply lin... |
| Description |
Advanced Universal Serial Bus transceiver
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| File Size |
118.75K /
23 Page |
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it Online |
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