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INTEGRATED DEVICE TECHNOLOGY INC
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| Part No. |
IDTCV115-4PV
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| OCR Text |
...tion, down and center ? support smbus block read/write, index read/write ? selectable output strength for ref, pci, and 48mhz ? available in ssop package functional block diagram description: idtcv115-4 is a 56 pin clock device, complying t... |
| Description |
400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
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| File Size |
103.26K /
19 Page |
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it Online |
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Integrated Device Techn...
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| Part No. |
9DBV0441 9DBV0441AKILF
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| OCR Text |
...omplished with strapping pins; smbus interface not required for device control ? 3.3v tolerant smbus interface works with legacy controller...selectable smbus addresses; mu ltiple devices can easily share an smbus segment block diagram contr... |
| Description |
4 O/P 1.8V PCIe Gen1-2-3 ZDB/FOB
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| File Size |
207.27K /
17 Page |
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it Online |
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Integrated Circuit Syst...
Integrated Device Techn...
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| Part No. |
9DBV0431
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| OCR Text |
...k management, and 3 selectable smbus addresses. recommended application 1.8v pcie gen1-2-3 zero-del ay/fan-out buffer (zdb/fob) output features ? 4 - 1-200hz low-power (lp) hcsl dif pairs w/z o =100ohms key specifications ? dif cycle-to-c... |
| Description |
LP-HCSL outputs save 8 resistors; minimal board space and BOM cost
HCSL compatible differential input
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| File Size |
208.15K /
17 Page |
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it Online |
Download Datasheet |
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Price and Availability
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